- Name: perl-Hardware-Verilog-Parser
- Version: 0.13
- Release: 7m.mo7
- Epoch:
- Group: Development/Libraries
- License: GPL+ or Artistic
- Url: http://search.cpan.org/dist/Hardware-Verilog-Parser/
- Summary: Complete grammar for parsing Verilog code using perl
- Architecture: noarch
- Size: 7314006
- Distribution:
- Vendor:
- Packager:
Description:
This module defines the complete grammar needed to parse any Verilog code.
By overloading this grammar, it is possible to easily create perl scripts
which run through Verilog code and perform specific functions.
- OptFlags: -O2 -pipe -Wp,-D_FORTIFY_SOURCE=2 -fstack-protector --param=ssp-buffer-size=4 -m64 -mtune=generic -fPIC
- Cookie: natsuki.momonga-linux.org 1283640756
- Buildhost: natsuki.momonga-linux.org
