From: Wang Zhenyu <zhenyu.z.wang@intel.com> Date: Tue, 5 Jun 2007 18:42:43 +0000 (-0700) Subject: Add PCI IDs for the G33, Q33, and Q35 chipsets. X-Git-Url: http://gitweb.freedesktop.org/?p=mesa/mesa.git;a=commitdiff;h=8331d9d7aa7cde7126d38d4e1eb5fe8a168077f3 Add PCI IDs for the G33, Q33, and Q35 chipsets. --- --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -491,13 +491,19 @@ static void i915SetTexImages( i915Contex abort(); } - - if (i915->intel.intelScreen->deviceID == PCI_CHIP_I945_G || - i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GM || - i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GME) - i945LayoutTextureImages( i915, tObj ); - else - i915LayoutTextureImages( i915, tObj ); + switch (i915->intel.intelScreen->deviceID) { + case PCI_CHIP_I945_G: + case PCI_CHIP_I945_GM: + case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q33_G: + case PCI_CHIP_Q35_G: + i945LayoutTextureImages( i915, tObj ); + break; + default: + i915LayoutTextureImages( i915, tObj ); + break; + } t->Setup[I915_TEXREG_MS3] = (((tObj->Image[0][t->intel.base.firstLevel]->Height - 1) << MS3_HEIGHT_SHIFT) | --- a/src/mesa/drivers/dri/i915/intel_context.c +++ b/src/mesa/drivers/dri/i915/intel_context.c @@ -125,6 +125,12 @@ const GLubyte *intelGetString( GLcontext chipset = "Intel(R) 945GM"; break; case PCI_CHIP_I945_GME: chipset = "Intel(R) 945GME"; break; + case PCI_CHIP_G33_G: + chipset = "Intel(R) G33"; break; + case PCI_CHIP_Q35_G: + chipset = "Intel(R) Q35"; break; + case PCI_CHIP_Q33_G: + chipset = "Intel(R) Q33"; break; default: chipset = "Unknown Intel Chipset"; break; } --- a/src/mesa/drivers/dri/i915/intel_context.h +++ b/src/mesa/drivers/dri/i915/intel_context.h @@ -455,6 +455,9 @@ extern int INTEL_DEBUG; #define PCI_CHIP_I945_G 0x2772 #define PCI_CHIP_I945_GM 0x27A2 #define PCI_CHIP_I945_GME 0x27AE +#define PCI_CHIP_G33_G 0x29C2 +#define PCI_CHIP_Q35_G 0x29B2 +#define PCI_CHIP_Q33_G 0x29D2 /* ================================================================ --- a/src/mesa/drivers/dri/i915/intel_screen.c +++ b/src/mesa/drivers/dri/i915/intel_screen.c @@ -515,6 +515,9 @@ static GLboolean intelCreateContext( con case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q35_G: + case PCI_CHIP_Q33_G: return i915CreateContext( mesaVis, driContextPriv, sharedContextPrivate ); --- a/src/mesa/drivers/dri/i915/intel_tex.c +++ b/src/mesa/drivers/dri/i915/intel_tex.c @@ -678,7 +678,10 @@ static void intelUploadTexImage( intelCo */ else if (intel->intelScreen->deviceID == PCI_CHIP_I945_G || intel->intelScreen->deviceID == PCI_CHIP_I945_GM || - intel->intelScreen->deviceID == PCI_CHIP_I945_GME) { + intel->intelScreen->deviceID == PCI_CHIP_I945_GME || + intel->intelScreen->deviceID == PCI_CHIP_G33_G || + intel->intelScreen->deviceID == PCI_CHIP_Q33_G || + intel->intelScreen->deviceID == PCI_CHIP_Q35_G) { GLuint row_len = image->Width * image->TexFormat->TexelBytes; GLubyte *dst = (GLubyte *)(t->BufAddr + offset); GLubyte *src = (GLubyte *)image->Data; --- a/src/mesa/drivers/dri/i915tex/intel_context.c +++ b/src/mesa/drivers/dri/i915tex/intel_context.c @@ -133,6 +133,15 @@ intelGetString(GLcontext * ctx, GLenum n case PCI_CHIP_I945_GME: chipset = "Intel(R) 945GME"; break; + case PCI_CHIP_G33_G: + chipset = "Intel(R) G33"; + break; + case PCI_CHIP_Q35_G: + chipset = "Intel(R) Q35"; + break; + case PCI_CHIP_Q33_G: + chipset = "Intel(R) Q33"; + break; default: chipset = "Unknown Intel Chipset"; break; --- a/src/mesa/drivers/dri/i915tex/intel_context.h +++ b/src/mesa/drivers/dri/i915tex/intel_context.h @@ -386,6 +386,9 @@ extern int INTEL_DEBUG; #define PCI_CHIP_I945_G 0x2772 #define PCI_CHIP_I945_GM 0x27A2 #define PCI_CHIP_I945_GME 0x27AE +#define PCI_CHIP_G33_G 0x29C2 +#define PCI_CHIP_Q35_G 0x29B2 +#define PCI_CHIP_Q33_G 0x29D2 /* ================================================================ --- a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c @@ -80,6 +80,9 @@ intel_miptree_create(struct intel_contex case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q33_G: + case PCI_CHIP_Q35_G: ok = i945_miptree_layout(mt); break; case PCI_CHIP_I915_G: --- a/src/mesa/drivers/dri/i915tex/intel_screen.c +++ b/src/mesa/drivers/dri/i915tex/intel_screen.c @@ -753,6 +753,9 @@ intelCreateContext(const __GLcontextMode case PCI_CHIP_I945_G: case PCI_CHIP_I945_GM: case PCI_CHIP_I945_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q35_G: + case PCI_CHIP_Q33_G: return i915CreateContext(mesaVis, driContextPriv, sharedContextPrivate); default: