v 20031011 1
B 300 200 1300 1500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 1600 1500 1900 1500 1 0 1
{
T 1700 1500 5 10 1 1 0 0 1
pinnumber=8
T 1700 1500 5 10 0 0 0 0 1
pinseq=8
}
P 1600 1200 1900 1200 1 0 1
{
T 1700 1200 5 10 1 1 0 0 1
pinnumber=7
T 1700 1200 5 10 0 0 0 0 1
pinseq=7
}
P 1600 800 1900 800 1 0 1
{
T 1700 800 5 10 1 1 0 0 1
pinnumber=6
T 1700 800 5 10 0 0 0 0 1
pinseq=6
}
P 1600 400 1900 400 1 0 1
{
T 1700 400 5 10 1 1 0 0 1
pinnumber=5
T 1700 400 5 10 0 0 0 0 1
pinseq=5
}
P 0 1500 300 1500 1 0 0
{
T 200 1500 5 10 1 1 0 0 1
pinnumber=1
T 200 1500 5 10 0 0 0 0 1
pinseq=1
}
P 0 1200 300 1200 1 0 0
{
T 200 1200 5 10 1 1 0 0 1
pinnumber=2
T 200 1200 5 10 0 0 0 0 1
pinseq=2
}
P 0 800 300 800 1 0 0
{
T 200 800 5 10 1 1 0 0 1
pinnumber=3
T 200 800 5 10 0 0 0 0 1
pinseq=3
}
P 0 400 300 400 1 0 0
{
T 200 400 5 10 1 1 0 0 1
pinnumber=4
T 200 400 5 10 0 0 0 0 1
pinseq=4
}
T 400 1500 9 10 1 0 0 0 1
GND
T 400 800 9 10 1 0 0 0 1
GND
T 1500 400 9 10 1 0 0 6 1
GND
T 1500 1200 9 10 1 0 0 6 1
GND
T 1500 1500 9 10 1 0 0 6 1
A
T 1500 800 9 10 1 0 0 6 1
B
T 400 1200 9 10 1 0 0 0 1
C
T 400 400 9 10 1 0 0 0 1
D
T 400 0 9 10 1 0 0 0 1
SN75240PW
T 300 1800 8 10 1 1 0 0 1
refdes=U?
T 400 1000 8 10 0 1 0 0 1
device=SN75240PW
T 700 1000 8 10 0 1 0 0 1
footprint=SO8