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<h1>usrp2::usrp2 Class Reference<div class="ingroups"><a class="el" href="group__usrp2.html">USRP2</a></div></h1> </div>
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<p>standard C++ interface to USRP2
<a href="#_details">More...</a></p>
<p><code>#include <<a class="el" href="usrp2_8h_source.html">usrp2.h</a>></code></p>
<p><a href="classusrp2_1_1usrp2-members.html">List of all members.</a></p>
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<tr><td colspan="2"><h2><a name="nested-classes"></a>
Classes</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2_1_1impl.html">impl</a></td></tr>
<tr><td colspan="2"><h2><a name="pub-types"></a>
Public Types</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="classboost_1_1shared__ptr.html">boost::shared_ptr</a>< <a class="el" href="classusrp2_1_1usrp2.html">usrp2</a> > </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a495be65b27a7096b8de897b0a033c3ab">sptr</a></td></tr>
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Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a40577de9cf7226d231e048bd8f66cbec">~usrp2</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">std::string </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a94b9b36e7740874af7fae96198bbbb46">mac_addr</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">std::string </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#adaf0f547244415fc982a7b177358ca11">interface_name</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ac2726fe4d9071afeb5fde690d31fe7bc">set_rx_gain</a> (double gain)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ac75be9cf7591eb34ee20a9c8a2bb7737">rx_gain_min</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return minimum Rx gain <a href="#ac75be9cf7591eb34ee20a9c8a2bb7737"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ae371035411d10fab287fbcdac98ff5f5">rx_gain_max</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return maximum Rx gain <a href="#ae371035411d10fab287fbcdac98ff5f5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a48a79f89af26ef21cfdb168527946b0b">rx_gain_db_per_step</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return Rx gain db_per_step <a href="#a48a79f89af26ef21cfdb168527946b0b"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a26ca99959366c7d2ceba3df8435a89e5">set_rx_lo_offset</a> (double frequency)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set receive daughterboard LO offset frequency. <a href="#a26ca99959366c7d2ceba3df8435a89e5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a64706690819e7d25c85a3c2bb3171100">set_rx_center_freq</a> (double frequency, <a class="el" href="classusrp2_1_1tune__result.html">tune_result</a> *result)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a1acb81b5b6bcff145ab35be1c72d5114">rx_freq_min</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return minimum Rx center frequency <a href="#a1acb81b5b6bcff145ab35be1c72d5114"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ac0bbc275573f647df2d898051fe60e8a">rx_freq_max</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return maximum Rx center frequency <a href="#ac0bbc275573f647df2d898051fe60e8a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a0e4330e851a12f2de3044a9abeb5125f">set_rx_decim</a> (int decimation_factor)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a67b1f9df5af54a95db4e68adb85d53c3">rx_decim</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return current decimation factor. <a href="#a67b1f9df5af54a95db4e68adb85d53c3"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ac77b97e74940641d531f204422656ea3">set_rx_scale_iq</a> (int scale_i, int scale_q)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a99811f59a38aa3097e0be6196cf3790a">start_rx_streaming</a> (unsigned int channel=0, unsigned int items_per_frame=0)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a75c9dc7c14da792f8fb6a73b8caaabb1">stop_rx_streaming</a> (unsigned int channel=0)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#adc5c23804bb1277b89ec51c519275c42">rx_samples</a> (unsigned int channel, <a class="el" href="classusrp2_1_1rx__sample__handler.html">rx_sample_handler</a> *handler)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Receive data from the specified channel This method is used to receive all data: streaming or discrete. <a href="#adc5c23804bb1277b89ec51c519275c42"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a268b49a605a2cc001e753052b91367a1">rx_overruns</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a4586604bf3d2614e5d7533e22549aaa9">rx_missing</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a8f3512a284bcdb566e9f33d2b58eec7c">set_tx_gain</a> (double gain)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a0534b619c93788c66686268983da34c7">tx_gain_min</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return minimum Tx gain <a href="#a0534b619c93788c66686268983da34c7"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#abfd17a980f1450e4c6cb9bfb9a54d413">tx_gain_max</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return maximum Tx gain <a href="#abfd17a980f1450e4c6cb9bfb9a54d413"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a17abc39bc29e3d1d13e7d8082e1e577a">tx_gain_db_per_step</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return Tx gain db_per_step <a href="#a17abc39bc29e3d1d13e7d8082e1e577a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aca5cd4b1f1943c17b93e664c441d7126">set_tx_lo_offset</a> (double frequency)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a187858c2d829c319f44a1e3db6ca38d8">set_tx_center_freq</a> (double frequency, <a class="el" href="classusrp2_1_1tune__result.html">tune_result</a> *result)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a23803477520e7d6a470c445c70a2c60b">tx_freq_min</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return minimum Tx center frequency <a href="#a23803477520e7d6a470c445c70a2c60b"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a21a76cc4ab69185d796bf5602c9cb8ff">tx_freq_max</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return maximum Tx center frequency <a href="#a21a76cc4ab69185d796bf5602c9cb8ff"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a97a89168fa7801f6681c499210cc08f3">set_tx_interp</a> (int interpolation_factor)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#afcd40f8eb490f95f3b88e403beb95db7">tx_interp</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return current interpolation factor. <a href="#afcd40f8eb490f95f3b88e403beb95db7"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a4cf2cc57c170200e09b45da8f82b990b">default_tx_scale_iq</a> (int interpolation_factor, int *scale_i, int *scale_q)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aa458137a015f61fb400e626b594e2852">set_tx_scale_iq</a> (int scale_i, int scale_q)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a6a11fb6a5567d69e584cf16b02e510ca">tx_32fc</a> (unsigned int channel, const std::complex< float > *samples, size_t nsamples, const <a class="el" href="structusrp2_1_1tx__metadata.html">tx_metadata</a> *metadata)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">transmit complex<float> samples to USRP2 <a href="#a6a11fb6a5567d69e584cf16b02e510ca"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aa90bd651ad3c2750dccff12444b48282">tx_16sc</a> (unsigned int channel, const std::complex< int16_t > *samples, size_t nsamples, const <a class="el" href="structusrp2_1_1tx__metadata.html">tx_metadata</a> *metadata)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">transmit complex<int16_t> samples to USRP2 <a href="#aa90bd651ad3c2750dccff12444b48282"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a9853a8439165f467814d472024c4c551">tx_raw</a> (unsigned int channel, const uint32_t *items, size_t nitems, const <a class="el" href="structusrp2_1_1tx__metadata.html">tx_metadata</a> *metadata)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">transmit raw uint32_t data items to USRP2 <a href="#a9853a8439165f467814d472024c4c551"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a5a547f128bb1129445e90f029c36d63c">config_mimo</a> (int flags)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">MIMO configuration. <a href="#a5a547f128bb1129445e90f029c36d63c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a91771bfb13bb9e7e7534310204b9192e">fpga_master_clock_freq</a> (long *freq)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Get frequency of master oscillator in Hz. <a href="#a91771bfb13bb9e7e7534310204b9192e"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a49bc0d8a533ad7259e5574acfd027d68">adc_rate</a> (long *rate)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ac1e9dd22b54da3bd44fa6d46b43293b8">dac_rate</a> (long *rate)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aef3c674c9f2c7495e197a5c6130a2cce">tx_daughterboard_id</a> (int *dbid)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Get Tx daughterboard ID. <a href="#aef3c674c9f2c7495e197a5c6130a2cce"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#acd497e686236e986d2a7c9708101fc94">rx_daughterboard_id</a> (int *dbid)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Get Rx daughterboard ID. <a href="#acd497e686236e986d2a7c9708101fc94"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aa1e646a4b9695438a3175eb1c3b7a324">burn_mac_addr</a> (const std::string &new_addr)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a6407149eaf9535bac0642889d0c67a6f">sync_to_pps</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ac57859c598d0b2f7fec17731fdf1f333">sync_every_pps</a> (<a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> enable)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classstd_1_1vector.html">std::vector</a>< uint32_t > </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a3d89fc2845a564ab3b3077699f434e1a">peek32</a> (uint32_t addr, uint32_t words)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a8f386b5781d5a675eaa647cc0b2c54fe">poke32</a> (uint32_t addr, const <a class="el" href="classstd_1_1vector.html">std::vector</a>< uint32_t > &data)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aee3d2e654c22198430c7626ee65676e1">set_gpio_ddr</a> (int bank, uint16_t value, uint16_t mask)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#af2893ac8a6f56e62b05fc486740ffacb">set_gpio_sels</a> (int bank, std::string sels)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#ac4f19c8609dfde67d0b1cfbb80f9d90c">write_gpio</a> (int bank, uint16_t value, uint16_t mask)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aef356a85afe76aa2938b022b73c38ddd">read_gpio</a> (int bank, uint16_t *value)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#acf667cea17739ba8b8ede8cf162a7272">enable_gpio_streaming</a> (int bank, int enable)</td></tr>
<tr><td colspan="2"><h2><a name="pub-static-methods"></a>
Static Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static <a class="el" href="classboost_1_1shared__ptr.html">sptr</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#aca00b5a1e9ff0b801e321bd6a3250d92">make</a> (const std::string &ifc, const std::string &addr="", size_t rx_bufsize=0)</td></tr>
<tr><td colspan="2"><h2><a name="pub-static-attribs"></a>
Static Public Attributes</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static const unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp2_1_1usrp2.html#a0e992c0ab2d8b0c8a99723ed9fe55d2e">MAX_CHAN</a> = 30</td></tr>
</table>
<hr/><a name="_details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>standard C++ interface to USRP2 </p>
</div><hr/><h2>Member Typedef Documentation</h2>
<a class="anchor" id="a495be65b27a7096b8de897b0a033c3ab"></a><!-- doxytag: member="usrp2::usrp2::sptr" ref="a495be65b27a7096b8de897b0a033c3ab" args="" -->
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<td class="memname">typedef <a class="el" href="classboost_1_1shared__ptr.html">boost::shared_ptr</a><<a class="el" href="classusrp2_1_1usrp2.html">usrp2</a>> <a class="el" href="classboost_1_1shared__ptr.html">usrp2::usrp2::sptr</a></td>
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<div class="memdoc">
<p>Shared pointer to this class </p>
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</div>
<hr/><h2>Constructor & Destructor Documentation</h2>
<a class="anchor" id="a40577de9cf7226d231e048bd8f66cbec"></a><!-- doxytag: member="usrp2::usrp2::~usrp2" ref="a40577de9cf7226d231e048bd8f66cbec" args="()" -->
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<td class="memname">usrp2::usrp2::~usrp2 </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
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<div class="memdoc">
<p>Class destructor </p>
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<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a49bc0d8a533ad7259e5574acfd027d68"></a><!-- doxytag: member="usrp2::usrp2::adc_rate" ref="a49bc0d8a533ad7259e5574acfd027d68" args="(long *rate)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::adc_rate </td>
<td>(</td>
<td class="paramtype">long * </td>
<td class="paramname"><em>rate</em></td><td>)</td>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::burn_mac_addr </td>
<td>(</td>
<td class="paramtype">const std::string & </td>
<td class="paramname"><em>new_addr</em></td><td>)</td>
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<p>Burn new mac address into EEPROM on USRP2</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">new_addr</td><td>Network mac address, e.g., "01:23:45:67:89:ab" or "89:ab". If <code>addr</code> is HH:HH, it's treated as if it were 00:50:c2:85:HH:HH </td></tr>
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</dd>
</dl>
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<a class="anchor" id="a5a547f128bb1129445e90f029c36d63c"></a><!-- doxytag: member="usrp2::usrp2::config_mimo" ref="a5a547f128bb1129445e90f029c36d63c" args="(int flags)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::config_mimo </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>flags</em></td><td>)</td>
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<p>MIMO configuration. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">flags</td><td>from usrp2_mimo_config.h</td></tr>
</table>
</dd>
</dl>
<pre>
one of these:</pre><pre> MC_WE_DONT_LOCK
MC_WE_LOCK_TO_SMA
MC_WE_LOCK_TO_MIMO</pre><pre> and optionally this:</pre><pre> MC_PROVIDE_CLK_TO_MIMO
</pre>
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<a class="anchor" id="ac1e9dd22b54da3bd44fa6d46b43293b8"></a><!-- doxytag: member="usrp2::usrp2::dac_rate" ref="ac1e9dd22b54da3bd44fa6d46b43293b8" args="(long *rate)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::dac_rate </td>
<td>(</td>
<td class="paramtype">long * </td>
<td class="paramname"><em>rate</em></td><td>)</td>
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<a class="anchor" id="a4cf2cc57c170200e09b45da8f82b990b"></a><!-- doxytag: member="usrp2::usrp2::default_tx_scale_iq" ref="a4cf2cc57c170200e09b45da8f82b990b" args="(int interpolation_factor, int *scale_i, int *scale_q)" -->
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<td class="memname">void usrp2::usrp2::default_tx_scale_iq </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>interpolation_factor</em>, </td>
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<td class="paramtype">int * </td>
<td class="paramname"><em>scale_i</em>, </td>
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<td class="paramtype">int * </td>
<td class="paramname"><em>scale_q</em> </td>
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<a class="anchor" id="acf667cea17739ba8b8ede8cf162a7272"></a><!-- doxytag: member="usrp2::usrp2::enable_gpio_streaming" ref="acf667cea17739ba8b8ede8cf162a7272" args="(int bank, int enable)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::enable_gpio_streaming </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>bank</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>enable</em> </td>
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<p>Set GPIO streaming mode</p>
<p>Individually enables streaming GPIO pins through LSBs of DSP samples.</p>
<p>On receive, io_rx[15] replaces I[0], io_rx[14] replaces Q[0] On transmit, I[0] maps to io_tx[15], Q[0] maps to io_tx[14] (Transmit streaming is not yet implemented.)</p>
<p>The selected GPIO pins must have been set as inputs or outputs and, for transmit, set to software control.</p>
<p>When enabled, the replaced DSP sample LSBs become 0.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">bank</td><td>GPIO_TX_BANK or GPIO_RX_BANK </td></tr>
<tr><td class="paramname">enable</td><td>enable[0] controls I channel LSB enable[1] controls Q channel LSB</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful</dd></dl>
<p>WARNING: Improper usage of this function may result in damage to the USRP2 </p>
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<a class="anchor" id="a91771bfb13bb9e7e7534310204b9192e"></a><!-- doxytag: member="usrp2::usrp2::fpga_master_clock_freq" ref="a91771bfb13bb9e7e7534310204b9192e" args="(long *freq)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::fpga_master_clock_freq </td>
<td>(</td>
<td class="paramtype">long * </td>
<td class="paramname"><em>freq</em></td><td>)</td>
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<p>Get frequency of master oscillator in Hz. </p>
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<td class="memname">std::string usrp2::usrp2::interface_name </td>
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<p>Returns the GbE interface name associated with this USRP </p>
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<p>Returns the MAC address associated with this USRP </p>
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<a class="anchor" id="aca00b5a1e9ff0b801e321bd6a3250d92"></a><!-- doxytag: member="usrp2::usrp2::make" ref="aca00b5a1e9ff0b801e321bd6a3250d92" args="(const std::string &ifc, const std::string &addr="", size_t rx_bufsize=0)" -->
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<td class="paramtype">const std::string & </td>
<td class="paramname"><em>ifc</em>, </td>
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<td class="paramkey"></td>
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<td class="paramname"><em>addr</em> = <code>""</code>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">size_t </td>
<td class="paramname"><em>rx_bufsize</em> = <code>0</code> </td>
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<td></td><td><code> [static]</code></td>
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<p>Static function to return an instance of <a class="el" href="classusrp2_1_1usrp2.html" title="standard C++ interface to USRP2">usrp2</a> as a shared pointer</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">ifc</td><td>Network interface name, e.g., "eth0" </td></tr>
<tr><td class="paramname">addr</td><td>Network mac address, e.g., "01:23:45:67:89:ab", "89:ab" or "". If <code>addr</code> is HH:HH, it's treated as if it were 00:50:c2:85:HH:HH "" will autoselect a USRP2 if there is only a single one on the local ethernet. </td></tr>
<tr><td class="paramname">rx_bufsize</td><td>is the length in bytes of the kernel networking buffer to allocate. </td></tr>
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</dd>
</dl>
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<a class="anchor" id="a3d89fc2845a564ab3b3077699f434e1a"></a><!-- doxytag: member="usrp2::usrp2::peek32" ref="a3d89fc2845a564ab3b3077699f434e1a" args="(uint32_t addr, uint32_t words)" -->
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<td class="memname"><a class="el" href="classstd_1_1vector.html">std::vector</a><uint32_t> usrp2::usrp2::peek32 </td>
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<td class="paramname"><em>addr</em>, </td>
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<td class="paramtype">uint32_t </td>
<td class="paramname"><em>words</em> </td>
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<p>Read memory from Wishbone bus as 32-bit words. Handles endian swapping if needed.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">addr</td><td>32-bit aligned address. Only the lower 16-bits are significant. </td></tr>
<tr><td class="paramname">words</td><td>Number of 32-bit words</td></tr>
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</dd>
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<dl class="return"><dt><b>Returns:</b></dt><dd>Vector of 32-bit read values</dd></dl>
<p>WARNING: Attempts to read memory from addresses that do not correspond to RAM or memory-mapped peripherals may cause the USRP2 to hang, requiring a power cycle. </p>
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<td>(</td>
<td class="paramtype">uint32_t </td>
<td class="paramname"><em>addr</em>, </td>
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<p>Write memory to Wishbone bus as 32-bit words. Handles endian swapping if needed.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">addr</td><td>32-bit aligned address. Only the lower 16-bits are significant </td></tr>
<tr><td class="paramname">data</td><td>Vector of 32-bit values to write.</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful</dd></dl>
<p>WARNING: Attempts to read memory from addresses that do not correspond to RAM or memory-mapped peripherals may cause the USRP2 to hang, requiring a power cycle. </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::read_gpio </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>bank</em>, </td>
</tr>
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<td class="paramkey"></td>
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<td class="paramtype">uint16_t * </td>
<td class="paramname"><em>value</em> </td>
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<td></td>
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<p>Read daughterboard GPIO pin values</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">bank</td><td>GPIO_TX_BANK or GPIO_RX_BANK </td></tr>
<tr><td class="paramname">value</td><td>pointer to uint16_t to hold read results</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful </dd></dl>
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<a class="anchor" id="acd497e686236e986d2a7c9708101fc94"></a><!-- doxytag: member="usrp2::usrp2::rx_daughterboard_id" ref="acd497e686236e986d2a7c9708101fc94" args="(int *dbid)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::rx_daughterboard_id </td>
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<p>Get Rx daughterboard ID. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramdir">[out]</td><td class="paramname">dbid</td><td>returns the daughterboard id.</td></tr>
</table>
</dd>
</dl>
<p>daughterboard id >= 0 if successful, -1 if no daugherboard installed, -2 if invalid EEPROM on daughterboard. </p>
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<td class="memname">int usrp2::usrp2::rx_decim </td>
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<td class="paramname"></td><td>)</td>
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<p>Return current decimation factor. </p>
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<a class="anchor" id="ac0bbc275573f647df2d898051fe60e8a"></a><!-- doxytag: member="usrp2::usrp2::rx_freq_max" ref="ac0bbc275573f647df2d898051fe60e8a" args="()" -->
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<td class="memname">double usrp2::usrp2::rx_freq_max </td>
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<td class="paramname"></td><td>)</td>
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<p>return maximum Rx center frequency </p>
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<a class="anchor" id="a1acb81b5b6bcff145ab35be1c72d5114"></a><!-- doxytag: member="usrp2::usrp2::rx_freq_min" ref="a1acb81b5b6bcff145ab35be1c72d5114" args="()" -->
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<td class="memname">double usrp2::usrp2::rx_freq_min </td>
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<td class="paramname"></td><td>)</td>
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<p>return minimum Rx center frequency </p>
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<a class="anchor" id="a48a79f89af26ef21cfdb168527946b0b"></a><!-- doxytag: member="usrp2::usrp2::rx_gain_db_per_step" ref="a48a79f89af26ef21cfdb168527946b0b" args="()" -->
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<td class="memname">double usrp2::usrp2::rx_gain_db_per_step </td>
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<p>return Rx gain db_per_step </p>
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<td class="memname">double usrp2::usrp2::rx_gain_max </td>
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<p>return maximum Rx gain </p>
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<td class="memname">double usrp2::usrp2::rx_gain_min </td>
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<p>return minimum Rx gain </p>
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<a class="anchor" id="a4586604bf3d2614e5d7533e22549aaa9"></a><!-- doxytag: member="usrp2::usrp2::rx_missing" ref="a4586604bf3d2614e5d7533e22549aaa9" args="()" -->
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<td class="memname">unsigned int usrp2::usrp2::rx_missing </td>
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<p>Returns total number of missing frames from overruns. </p>
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<td class="memname">unsigned int usrp2::usrp2::rx_overruns </td>
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<p>Returns number of times receive overruns have occurred </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::rx_samples </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>channel</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype"><a class="el" href="classusrp2_1_1rx__sample__handler.html">rx_sample_handler</a> * </td>
<td class="paramname"><em>handler</em> </td>
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<p>Receive data from the specified channel This method is used to receive all data: streaming or discrete. </p>
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<a class="anchor" id="aee3d2e654c22198430c7626ee65676e1"></a><!-- doxytag: member="usrp2::usrp2::set_gpio_ddr" ref="aee3d2e654c22198430c7626ee65676e1" args="(int bank, uint16_t value, uint16_t mask)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_gpio_ddr </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>bank</em>, </td>
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<td class="paramtype">uint16_t </td>
<td class="paramname"><em>value</em>, </td>
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<td class="paramtype">uint16_t </td>
<td class="paramname"><em>mask</em> </td>
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<p>Set daughterboard GPIO data direction register.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">bank</td><td>GPIO_TX_BANK or GPIO_RX_BANK </td></tr>
<tr><td class="paramname">value</td><td>16-bits, 0=FPGA input, 1=FPGA output </td></tr>
<tr><td class="paramname">mask</td><td>16-bits, 0=ignore, 1=set</td></tr>
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</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful</dd></dl>
<p>WARNING: Improper usage of this function may result in damage to the USRP2 </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_gpio_sels </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>bank</em>, </td>
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<td class="paramtype">std::string </td>
<td class="paramname"><em>sels</em> </td>
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<p>Set daughterboard GPIO output selection register. For those GPIO pins that are configured as outputs in the DDR, this settings configures the source of the pin value.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">bank</td><td>GPIO_TX_BANK or GPIO_RX_BANK </td></tr>
<tr><td class="paramname">sels</td><td>Exactly 16 character MSB->LSB string. For each position: '.' = ignore this bit, i.e., leave current value 'a' = Output ATR value 's' = Output host software controlled value '0' = Output FPGA debug bus 0 value '1' = Output FPGA debug bus 1 value</td></tr>
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<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful</dd></dl>
<p>WARNING: Improper usage of this function may result in damage to the USRP2 </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_rx_center_freq </td>
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<td class="paramtype">double </td>
<td class="paramname"><em>frequency</em>, </td>
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<td class="paramtype"><a class="el" href="classusrp2_1_1tune__result.html">tune_result</a> * </td>
<td class="paramname"><em>result</em> </td>
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<p>Set receiver center frequency </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_rx_decim </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>decimation_factor</em></td><td>)</td>
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<p>Set receiver sample rate decimation </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_rx_gain </td>
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<td class="paramtype">double </td>
<td class="paramname"><em>gain</em></td><td>)</td>
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<p>Set receiver gain </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">gain</td><td>in dB (more or less) </td></tr>
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</dd>
</dl>
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<a class="anchor" id="a26ca99959366c7d2ceba3df8435a89e5"></a><!-- doxytag: member="usrp2::usrp2::set_rx_lo_offset" ref="a26ca99959366c7d2ceba3df8435a89e5" args="(double frequency)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_rx_lo_offset </td>
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<td class="paramtype">double </td>
<td class="paramname"><em>frequency</em></td><td>)</td>
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<p>Set receive daughterboard LO offset frequency. </p>
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<a class="anchor" id="ac77b97e74940641d531f204422656ea3"></a><!-- doxytag: member="usrp2::usrp2::set_rx_scale_iq" ref="ac77b97e74940641d531f204422656ea3" args="(int scale_i, int scale_q)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_rx_scale_iq </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>scale_i</em>, </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>scale_q</em> </td>
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<p>Set receiver IQ magnitude scaling </p>
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<a class="anchor" id="a187858c2d829c319f44a1e3db6ca38d8"></a><!-- doxytag: member="usrp2::usrp2::set_tx_center_freq" ref="a187858c2d829c319f44a1e3db6ca38d8" args="(double frequency, tune_result *result)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_tx_center_freq </td>
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<td class="paramtype">double </td>
<td class="paramname"><em>frequency</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classusrp2_1_1tune__result.html">tune_result</a> * </td>
<td class="paramname"><em>result</em> </td>
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<p>Set transmitter center frequency </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_tx_gain </td>
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<td class="paramtype">double </td>
<td class="paramname"><em>gain</em></td><td>)</td>
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<p>Set transmitter gain </p>
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<a class="anchor" id="a97a89168fa7801f6681c499210cc08f3"></a><!-- doxytag: member="usrp2::usrp2::set_tx_interp" ref="a97a89168fa7801f6681c499210cc08f3" args="(int interpolation_factor)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_tx_interp </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>interpolation_factor</em></td><td>)</td>
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<p>Set transmitter sample rate interpolation </p>
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<a class="anchor" id="aca5cd4b1f1943c17b93e664c441d7126"></a><!-- doxytag: member="usrp2::usrp2::set_tx_lo_offset" ref="aca5cd4b1f1943c17b93e664c441d7126" args="(double frequency)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_tx_lo_offset </td>
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<td class="paramtype">double </td>
<td class="paramname"><em>frequency</em></td><td>)</td>
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<a class="anchor" id="aa458137a015f61fb400e626b594e2852"></a><!-- doxytag: member="usrp2::usrp2::set_tx_scale_iq" ref="aa458137a015f61fb400e626b594e2852" args="(int scale_i, int scale_q)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::set_tx_scale_iq </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>scale_i</em>, </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>scale_q</em> </td>
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<p>Set transmit IQ magnitude scaling </p>
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<a class="anchor" id="a99811f59a38aa3097e0be6196cf3790a"></a><!-- doxytag: member="usrp2::usrp2::start_rx_streaming" ref="a99811f59a38aa3097e0be6196cf3790a" args="(unsigned int channel=0, unsigned int items_per_frame=0)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::start_rx_streaming </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>channel</em> = <code>0</code>, </td>
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<td class="paramtype">unsigned int </td>
<td class="paramname"><em>items_per_frame</em> = <code>0</code> </td>
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<p>Set received sample format</p>
<p>domain: complex or real type: floating, fixed point, or raw depth: bits per sample</p>
<p>Sets format over the wire for samples from USRP2.</p>
<p>Start streaming receive mode. USRP2 will send a continuous stream of DSP pipeline samples to host. Call rx_samples(...) to access.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">channel</td><td>Stream channel number (0-30) </td></tr>
<tr><td class="paramname">items_per_frame</td><td>Number of 32-bit items per frame. </td></tr>
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</dd>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::stop_rx_streaming </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>channel</em> = <code>0</code></td><td>)</td>
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<p>Stop streaming receive mode. </p>
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::sync_every_pps </td>
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<p>Reset master time to 0 at every PPS edge </p>
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<p>Reset master time to 0 at next PPS edge </p>
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<a class="anchor" id="aa90bd651ad3c2750dccff12444b48282"></a><!-- doxytag: member="usrp2::usrp2::tx_16sc" ref="aa90bd651ad3c2750dccff12444b48282" args="(unsigned int channel, const std::complex< int16_t > *samples, size_t nsamples, const tx_metadata *metadata)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::tx_16sc </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>channel</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::complex< int16_t > * </td>
<td class="paramname"><em>samples</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">size_t </td>
<td class="paramname"><em>nsamples</em>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">const <a class="el" href="structusrp2_1_1tx__metadata.html">tx_metadata</a> * </td>
<td class="paramname"><em>metadata</em> </td>
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<td>)</td>
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<p>transmit complex<int16_t> samples to USRP2 </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">channel</td><td>specifies the channel to send them to </td></tr>
<tr><td class="paramname">samples</td><td>are the samples to transmit </td></tr>
<tr><td class="paramname">nsamples</td><td>is the number of samples to transmit </td></tr>
<tr><td class="paramname">metadata</td><td>provides the timestamp and flags</td></tr>
</table>
</dd>
</dl>
<p>The complex<int16_t> samples are converted to the appropriate "on the wire" representation, depending on the current USRP2 configuration. Typically, this is big-endian 16-bit I & Q. </p>
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<a class="anchor" id="a6a11fb6a5567d69e584cf16b02e510ca"></a><!-- doxytag: member="usrp2::usrp2::tx_32fc" ref="a6a11fb6a5567d69e584cf16b02e510ca" args="(unsigned int channel, const std::complex< float > *samples, size_t nsamples, const tx_metadata *metadata)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::tx_32fc </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>channel</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::complex< float > * </td>
<td class="paramname"><em>samples</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">size_t </td>
<td class="paramname"><em>nsamples</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const <a class="el" href="structusrp2_1_1tx__metadata.html">tx_metadata</a> * </td>
<td class="paramname"><em>metadata</em> </td>
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<td></td>
<td>)</td>
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<p>transmit complex<float> samples to USRP2 </p>
<p>Set transmit sample format</p>
<p>domain: complex or real type: floating, fixed point, or raw depth: bits per sample</p>
<p>Sets format over the wire for samples to USRP2.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">channel</td><td>specifies the channel to send them to </td></tr>
<tr><td class="paramname">samples</td><td>are the samples to transmit. They should be in the range [-1.0, +1.0] </td></tr>
<tr><td class="paramname">nsamples</td><td>is the number of samples to transmit </td></tr>
<tr><td class="paramname">metadata</td><td>provides the timestamp and flags</td></tr>
</table>
</dd>
</dl>
<p>The complex<float> samples are converted to the appropriate "on the wire" representation, depending on the current USRP2 configuration. Typically, this is big-endian 16-bit I & Q. </p>
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<a class="anchor" id="aef3c674c9f2c7495e197a5c6130a2cce"></a><!-- doxytag: member="usrp2::usrp2::tx_daughterboard_id" ref="aef3c674c9f2c7495e197a5c6130a2cce" args="(int *dbid)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::tx_daughterboard_id </td>
<td>(</td>
<td class="paramtype">int * </td>
<td class="paramname"><em>dbid</em></td><td>)</td>
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<p>Get Tx daughterboard ID. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramdir">[out]</td><td class="paramname">dbid</td><td>returns the daughterboard id.</td></tr>
</table>
</dd>
</dl>
<p>daughterboard id >= 0 if successful, -1 if no daugherboard installed, -2 if invalid EEPROM on daughterboard. </p>
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<a class="anchor" id="a21a76cc4ab69185d796bf5602c9cb8ff"></a><!-- doxytag: member="usrp2::usrp2::tx_freq_max" ref="a21a76cc4ab69185d796bf5602c9cb8ff" args="()" -->
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<td class="memname">double usrp2::usrp2::tx_freq_max </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>return maximum Tx center frequency </p>
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<td class="memname">double usrp2::usrp2::tx_freq_min </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
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<div class="memdoc">
<p>return minimum Tx center frequency </p>
</div>
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<a class="anchor" id="a17abc39bc29e3d1d13e7d8082e1e577a"></a><!-- doxytag: member="usrp2::usrp2::tx_gain_db_per_step" ref="a17abc39bc29e3d1d13e7d8082e1e577a" args="()" -->
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<td class="memname">double usrp2::usrp2::tx_gain_db_per_step </td>
<td>(</td>
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<p>return Tx gain db_per_step </p>
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<a class="anchor" id="abfd17a980f1450e4c6cb9bfb9a54d413"></a><!-- doxytag: member="usrp2::usrp2::tx_gain_max" ref="abfd17a980f1450e4c6cb9bfb9a54d413" args="()" -->
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<td class="memname">double usrp2::usrp2::tx_gain_max </td>
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<p>return maximum Tx gain </p>
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<a class="anchor" id="a0534b619c93788c66686268983da34c7"></a><!-- doxytag: member="usrp2::usrp2::tx_gain_min" ref="a0534b619c93788c66686268983da34c7" args="()" -->
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<td class="memname">double usrp2::usrp2::tx_gain_min </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
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<div class="memdoc">
<p>return minimum Tx gain </p>
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<a class="anchor" id="afcd40f8eb490f95f3b88e403beb95db7"></a><!-- doxytag: member="usrp2::usrp2::tx_interp" ref="afcd40f8eb490f95f3b88e403beb95db7" args="()" -->
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<td class="memname">int usrp2::usrp2::tx_interp </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
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<p>Return current interpolation factor. </p>
</div>
</div>
<a class="anchor" id="a9853a8439165f467814d472024c4c551"></a><!-- doxytag: member="usrp2::usrp2::tx_raw" ref="a9853a8439165f467814d472024c4c551" args="(unsigned int channel, const uint32_t *items, size_t nitems, const tx_metadata *metadata)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::tx_raw </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>channel</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const uint32_t * </td>
<td class="paramname"><em>items</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">size_t </td>
<td class="paramname"><em>nitems</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const <a class="el" href="structusrp2_1_1tx__metadata.html">tx_metadata</a> * </td>
<td class="paramname"><em>metadata</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
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<p>transmit raw uint32_t data items to USRP2 </p>
<p>The caller is responsible for ensuring that the items are formatted appropriately for the USRP2 and its configuration. This method is used primarily by the system itself. Users should call tx_32fc or tx_16sc instead.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">channel</td><td>specifies the channel to send them to </td></tr>
<tr><td class="paramname">items</td><td>are the data items to transmit </td></tr>
<tr><td class="paramname">nitems</td><td>is the number of items to transmit </td></tr>
<tr><td class="paramname">metadata</td><td>provides the timestamp and flags </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="ac4f19c8609dfde67d0b1cfbb80f9d90c"></a><!-- doxytag: member="usrp2::usrp2::write_gpio" ref="ac4f19c8609dfde67d0b1cfbb80f9d90c" args="(int bank, uint16_t value, uint16_t mask)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp2::usrp2::write_gpio </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>bank</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint16_t </td>
<td class="paramname"><em>value</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint16_t </td>
<td class="paramname"><em>mask</em> </td>
</tr>
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<td></td>
<td>)</td>
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</tr>
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<p>Set daughterboard GPIO pin values.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">bank</td><td>GPIO_TX_BANK or GPIO_RX_BANK </td></tr>
<tr><td class="paramname">value</td><td>16 bits, 0=low, 1=high </td></tr>
<tr><td class="paramname">mask</td><td>16 bits, 0=ignore, 1=set</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful</dd></dl>
<p>WARNING: Improper usage of this function may result in damage to the USRP2 </p>
</div>
</div>
<hr/><h2>Member Data Documentation</h2>
<a class="anchor" id="a0e992c0ab2d8b0c8a99723ed9fe55d2e"></a><!-- doxytag: member="usrp2::usrp2::MAX_CHAN" ref="a0e992c0ab2d8b0c8a99723ed9fe55d2e" args="" -->
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<td class="memname">const unsigned int <a class="el" href="classusrp2_1_1usrp2.html#a0e992c0ab2d8b0c8a99723ed9fe55d2e">usrp2::usrp2::MAX_CHAN</a> = 30<code> [static]</code></td>
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<div class="memdoc">
</div>
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<hr/>The documentation for this class was generated from the following file:<ul>
<li><a class="el" href="usrp2_8h_source.html">usrp2.h</a></li>
</ul>
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<li class="navelem"><b>usrp2</b> </li>
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<li class="footer">Generated on Thu Feb 17 2011 for GNU Radio 3.2.2 C++ API by 
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