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Sophie

distrib > Fedora > 14 > x86_64 > media > updates > by-pkgid > 6e7a2755bd78c9deedab199b86e675f3 > files > 2984

gnuradio-doc-3.2.2-9.fc14.x86_64.rpm

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<h1>usrp_base Member List</h1>  </div>
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This is the complete list of members for <a class="el" href="classusrp__base.html">usrp_base</a>, including all inherited members.<table>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a3dffad1d9abee16832cb4b93ed6e215b">_read_9862</a>(int which_codec, int regno) const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a8828d4f70099bc51b5bfbfe67efd8a38">_read_fpga_reg</a>(int regno, int *value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a7f673041f0b9f86cd7e1c2b86f0ae537">_read_fpga_reg</a>(int regno)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#abbf9428906a60ef12d9caf1a5d85ca26">_read_spi</a>(int optional_header, int enables, int format, int len)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a8e1b09413d341b59ca57d85509a48041">_set_led</a>(int which_led, bool on)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a269fbb5a5dc3925c85d2512c14ea58c5">_write_9862</a>(int which_codec, int regno, unsigned char value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a3b90832c8b58bebd9372b29119583880">_write_fpga_reg</a>(int regno, int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#abd64d521f2583f50b1860ee90ca8291c">_write_fpga_reg_masked</a>(int regno, int value, int mask)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a2ca3c433f29876b1f480ab0fad1d16d3">_write_oe</a>(int which_side, int value, int mask)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#aef540d3249b7b319b56d8035772080cd">_write_spi</a>(int optional_header, int enables, int format, std::string buf)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a2503eb6922db0bf2a442dcd2d14670c9">basic_block</a>()</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a5c90b7c003ddd61f8df6bef2aceeab3da0abd1c82699481ffa502e5bb8d7bdaec">BLACK</a> enum value</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a50a714df9c3ce8c03854a09ac84e589b">check_topology</a>(int ninputs, int noutputs)</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline, virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a1cedb1704b6c00977c681b378ede384c">color</a>() const </td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline, protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#ac76b4c53af762a819bca003d5b5cb4d1">consume</a>(int which_input, int how_many_items)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a64e9a2096975841b72ff3c1662d27df9">consume_each</a>(int how_many_items)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a4d9437597a0765bb108d4edb4a214a59">converter_rate</a>() const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a7fb7e692e3b98a82410b396ef263bb41">d_color</a></td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a2c8da0c28bbbfb0e759278c9b9459e96">d_input_signature</a></td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#afd352cc073ef28012d4d079a863f5401">d_name</a></td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a76d64ed7a79566e3310306ae6f194d75">d_output_signature</a></td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a0d2999c04f47327f93dd7def5dc704f8">d_unique_id</a></td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a13688f5471fd3fe48ac66738b879ad5c">daughterboard_id</a>(int which_side) const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#adc92a29a1a00b5239170aab7d22be47a">db</a>()</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a49eb44ab01919d61ac2efb54182445eb">db</a>(int which_side)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a17b526d6a6c02925a668b368e26c94dd">db</a>(int which_side, int which_dev)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#afb276858409ac55d62fca1c87d7d4083">detail</a>() const </td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#ab4eeb29440f674815ab3b44b4fb0c34d">fixed_rate</a>() const </td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__sync__block.html#a0cbbc0ce275498411248e678038710b2">fixed_rate_ninput_to_noutput</a>(int ninput)</td><td><a class="el" href="classgr__sync__block.html">gr_sync_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__sync__block.html#adaecb00ae09408c22e46c44d09aad53e">fixed_rate_noutput_to_ninput</a>(int noutput)</td><td><a class="el" href="classgr__sync__block.html">gr_sync_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__sync__block.html#a1327e83509baf039aa3c816ea81a8f22">forecast</a>(int noutput_items, gr_vector_int &amp;ninput_items_required)</td><td><a class="el" href="classgr__sync__block.html">gr_sync_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a35ea1e5801c3f612823f0d002b3ea817">fpga_master_clock_freq</a>() const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__sync__block.html#a56ca60b6bc20a3510f71d961891fa81b">general_work</a>(int noutput_items, gr_vector_int &amp;ninput_items, gr_vector_const_void_star &amp;input_items, gr_vector_void_star &amp;output_items)</td><td><a class="el" href="classgr__sync__block.html">gr_sync_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a1183eee484f58953a2fed4c792e46245">gr_basic_block</a>(const std::string &amp;name, gr_io_signature_sptr input_signature, gr_io_signature_sptr output_signature)</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a268510acce1f94c0a60c5273f4948641">gr_block</a>(const std::string &amp;name, gr_io_signature_sptr input_signature, gr_io_signature_sptr output_signature)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a69b41e361328cea911d69e1ec0bc50ff">gr_flat_flowgraph</a> class</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [friend]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#adf5bf4523d6dd698aa770e3da8f2b30d">gr_flowgraph</a> class</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [friend]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__sync__block.html#a832d8dad2dbd38e8e9cfa0b954d37c87">gr_sync_block</a>(const std::string &amp;name, gr_io_signature_sptr input_signature, gr_io_signature_sptr output_signature)</td><td><a class="el" href="classgr__sync__block.html">gr_sync_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a5c90b7c003ddd61f8df6bef2aceeab3daa6cce7ec34a3f9cf917e545a743dc89f">GREY</a> enum value</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#ad3b305a663f4b5b5c4e17070d00f05d9">history</a>() const </td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a58f6d05e85931200f3771d3e50741281">input_signature</a>() const </td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#aa12a20d8b8eab341da935530d29299d2">name</a>() const </td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#ade8590e9cba9ccfe1b870be46b1416c2">output_multiple</a>() const </td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#add68b96f012dfe352700b4fd1c3a184a">output_signature</a>() const </td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#abfbb58de567e58af22f16ff4083dde3b">pga</a>(int which_amp) const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#afd3b0eea695796add6f25066552d0a0d">pga_db_per_step</a>() const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a545bdec261ae9781e2122212f67603d3">pga_max</a>() const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a90754c12fcf8735c90fe9991bbbe7ea9">pga_min</a>() const </td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#addca06bac380d27ae98676e14cd63d9c">pick_subdev</a>(std::vector&lt; int &gt; candidates=std::vector&lt; int &gt;(0))</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ae4401c31c817f38c94285840c1c5d332">read_aux_adc</a>(int which_side, int which_adc)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#aae9b2540add7e6a98070eff0f657511d">read_eeprom</a>(int i2c_addr, int eeprom_offset, int len)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a88a19bcca08ead6124f8df5fe2ede14d">READ_FAILED</a></td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td><code> [static]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#af28754a9cc4e02e16112b571cc35c1e6">read_i2c</a>(int i2c_addr, int len)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a026ecc14a69ccc684479e39c7fac29ac">read_io</a>(int which_side)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#aa9df8c4d3fb92bde98900831546f8b97">relative_rate</a>() const </td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a600e9883d93981fb80f19fbb352f77c6">selected_subdev</a>(usrp_subdev_spec ss)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ae4c4e3153e0a8c8be943427f3cea8e7a">serial_number</a>()</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ada0d27d0d5e792a39b8a72d78aee78b1">set_adc_buffer_bypass</a>(int which_adc, bool bypass)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a9cdc4e19aa2556e4f965f6452411f613">set_adc_offset</a>(int which_adc, int offset)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a0821ef947158670d53bf0739f3c8877b">set_color</a>(vcolor color)</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline, protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#acea0344a032d204813856e6f36dbb781">set_dac_offset</a>(int which_dac, int offset, int offset_pin)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a76785d2dfcbe9ffab380cb37480094a0">set_dc_offset_cl_enable</a>(int bits, int mask)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a26b61f2c2ca308c3bde82f01d3e9650b">set_detail</a>(gr_block_detail_sptr detail)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a176a95343488a9a760c8edf8bb08db20">set_fixed_rate</a>(bool fixed_rate)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline, protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a5bb059ba83dd6b99526be0ff48841edc">set_fpga_master_clock_freq</a>(long master_clock)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a7c1c85a2d47f72255efd821a6f98f7ba">set_history</a>(unsigned history)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a419d0fbba0ca02d822cbc299b979de54">set_input_signature</a>(gr_io_signature_sptr iosig)</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline, protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a14e8b799f920e52afb93fac413b1a729">set_output_multiple</a>(int multiple)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a949b6ad69ebfdf423835265db99cf63d">set_output_signature</a>(gr_io_signature_sptr iosig)</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline, protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ab62fd985de42e9404bbcd0b728186af0">set_pga</a>(int which_amp, double gain_in_db)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#ab9dc7e6d30692bbfa65fc7c4eef6fc9d">set_relative_rate</a>(double relative_rate)</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ab21be360b351e521dcb26061223cc5ae">set_usrp_basic</a>(boost::shared_ptr&lt; usrp_basic &gt; u)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a5a95a06f100f28a93787a41836e8874a">set_verbose</a>(bool on)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a49ea94a86f3199f23563bb837633ea1f">start</a>()</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a53c2c89c037e4e393b75414d605e36b1">stop</a>()</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#aa2a2947744d418c5470fbf4e623b58fe">unique_id</a>() const </td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [inline]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a503172dda763fb3692d4c4edb8fa8be0">usrp_base</a>(const std::string &amp;name, gr_io_signature_sptr input_signature, gr_io_signature_sptr output_signature)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td><code> [inline, protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a5c90b7c003ddd61f8df6bef2aceeab3d">vcolor</a> enum name</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a5c90b7c003ddd61f8df6bef2aceeab3da476d594a077e729bad0f2cfa2008c899">WHITE</a> enum value</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [protected]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__sync__block.html#a0c523f4285a6eb690f677ee6295ab117">work</a>(int noutput_items, gr_vector_const_void_star &amp;input_items, gr_vector_void_star &amp;output_items)=0</td><td><a class="el" href="classgr__sync__block.html">gr_sync_block</a></td><td><code> [pure virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ac55d0d482f4f489cd983ec5a8446968a">write_atr_mask</a>(int which_side, int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a08493c5d327ffe70afdf94e814aa9092">write_atr_rx_delay</a>(int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a46fe4d6b66cde8b52f7a3a9dc69974bb">write_atr_rxval</a>(int which_side, int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ab7c20403b12e1c3d672f386fbe6e8fa7">write_atr_tx_delay</a>(int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#aaf04ba05b35db8a0ec6e73bd6be2708c">write_atr_txval</a>(int which_side, int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a2e92aee3eb6019e0593537162930b3b3">write_aux_dac</a>(int which_side, int which_dac, int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a9aeb17081719fa96a28e640133e9dc5a">write_eeprom</a>(int i2c_addr, int eeprom_offset, const std::string buf)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a5d5fcdd2af4e16d45d9b862b2f721ad9">write_i2c</a>(int i2c_addr, const std::string buf)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#ad67d8025f46a96f6206d2e066b75a77c">write_io</a>(int which_side, int value, int mask)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#a00599c4d08010481f4db7254f1135f48">write_refclk</a>(int which_side, int value)</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__basic__block.html#a5bc14d27d53b7b57a960a47cc255e3f9">~gr_basic_block</a>()</td><td><a class="el" href="classgr__basic__block.html">gr_basic_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classgr__block.html#a19133eeffa5f8e6743342f375551ad0c">~gr_block</a>()</td><td><a class="el" href="classgr__block.html">gr_block</a></td><td><code> [virtual]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classusrp__base.html#aec7be50c39bb469377afce7b29340d12">~usrp_base</a>()</td><td><a class="el" href="classusrp__base.html">usrp_base</a></td><td><code> [virtual]</code></td></tr>
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