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<a href="#pub-methods">Public Member Functions</a> |
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<h1>usrp_base Class Reference</h1> </div>
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<!-- doxytag: class="usrp_base" --><!-- doxytag: inherits="gr_sync_block" -->
<p>base class for GNU Radio interface to the USRP
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<p><code>#include <<a class="el" href="usrp__base_8h_source.html">usrp_base.h</a>></code></p>
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Inheritance diagram for usrp_base:</div>
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<area shape="rect" id="node9" href="classusrp__sink__base.html" title="abstract interface to Universal Software Radio Peripheral Tx path (Rev 1)" alt="" coords="104,315,216,344"/><area shape="rect" id="node15" href="classusrp__source__base.html" title="abstract interface to Universal Software Radio Peripheral Rx path (Rev 1)" alt="" coords="240,315,368,344"/><area shape="rect" id="node2" href="classgr__sync__block.html" title="synchronous 1:1 input to output with historyOverride work to provide the signal processing implementa..." alt="" coords="179,160,285,189"/><area shape="rect" id="node4" href="classgr__block.html" title="The abstract base class for all 'terminal' processing blocks.A signal processing flow is cons..." alt="" coords="197,83,267,112"/><area shape="rect" id="node6" href="classgr__basic__block.html" title="The abstract base class for all signal processing blocks.Basic blocks are the bare abstraction of an ..." alt="" coords="177,5,287,35"/><area shape="rect" id="node11" href="classusrp__sink__c.html" title="Interface to Universal Software Radio Peripheral Tx pathinput: gr_complex." alt="" coords="5,392,96,421"/><area shape="rect" id="node13" href="classusrp__sink__s.html" title="Interface to Universal Software Radio Peripheral Tx pathinput: short." alt="" coords="120,392,211,421"/><area shape="rect" id="node17" href="classusrp__source__c.html" title="Interface to Universal Software Radio Peripheral Rx pathoutput: 1 stream of complex<float>" alt="" coords="240,392,347,421"/><area shape="rect" id="node19" href="classusrp__source__s.html" title="Interface to Universal Software Radio Peripheral Rx pathoutput: 1 stream of short." alt="" coords="371,392,477,421"/></map>
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<p><a href="classusrp__base-members.html">List of all members.</a></p>
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<tr><td colspan="2"><h2><a name="pub-methods"></a>
Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">virtual </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#aec7be50c39bb469377afce7b29340d12">~usrp_base</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classstd_1_1vector.html">std::vector</a>< <a class="el" href="classstd_1_1vector.html">std::vector</a><br class="typebreak"/>
< <a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> > > </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#adc92a29a1a00b5239170aab7d22be47a">db</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classstd_1_1vector.html">std::vector</a>< <a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> > </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a49eb44ab01919d61ac2efb54182445eb">db</a> (int which_side)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a17b526d6a6c02925a668b368e26c94dd">db</a> (int which_side, int which_dev)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a600e9883d93981fb80f19fbb352f77c6">selected_subdev</a> (<a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> ss)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">given a <a class="el" href="structusrp__subdev__spec.html" title="specify a daughterboard and subdevice on a daughterboard.">usrp_subdev_spec</a>, return the corresponding daughterboard object. <a href="#a600e9883d93981fb80f19fbb352f77c6"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">long </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a35ea1e5801c3f612823f0d002b3ea817">fpga_master_clock_freq</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return frequency of master oscillator on USRP <a href="#a35ea1e5801c3f612823f0d002b3ea817"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a5bb059ba83dd6b99526be0ff48841edc">set_fpga_master_clock_freq</a> (long master_clock)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a5a95a06f100f28a93787a41836e8874a">set_verbose</a> (<a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> on)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a9aeb17081719fa96a28e640133e9dc5a">write_eeprom</a> (int i2c_addr, int eeprom_offset, const std::string buf)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write EEPROM on motherboard or any daughterboard. <a href="#a9aeb17081719fa96a28e640133e9dc5a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">std::string </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#aae9b2540add7e6a98070eff0f657511d">read_eeprom</a> (int i2c_addr, int eeprom_offset, int len)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read EEPROM on motherboard or any daughterboard. <a href="#aae9b2540add7e6a98070eff0f657511d"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a5d5fcdd2af4e16d45d9b862b2f721ad9">write_i2c</a> (int i2c_addr, const std::string buf)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write to I2C peripheral. <a href="#a5d5fcdd2af4e16d45d9b862b2f721ad9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">std::string </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#af28754a9cc4e02e16112b571cc35c1e6">read_i2c</a> (int i2c_addr, int len)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read from I2C peripheral. <a href="#af28754a9cc4e02e16112b571cc35c1e6"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a9cdc4e19aa2556e4f965f6452411f613">set_adc_offset</a> (int which_adc, int offset)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set ADC offset correction. <a href="#a9cdc4e19aa2556e4f965f6452411f613"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#acea0344a032d204813856e6f36dbb781">set_dac_offset</a> (int which_dac, int offset, int offset_pin)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set DAC offset correction. <a href="#acea0344a032d204813856e6f36dbb781"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ada0d27d0d5e792a39b8a72d78aee78b1">set_adc_buffer_bypass</a> (int which_adc, <a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> bypass)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Control ADC input buffer. <a href="#ada0d27d0d5e792a39b8a72d78aee78b1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a76785d2dfcbe9ffab380cb37480094a0">set_dc_offset_cl_enable</a> (int bits, int mask)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Enable/disable automatic DC offset removal control loop in FPGA. <a href="#a76785d2dfcbe9ffab380cb37480094a0"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">std::string </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ae4c4e3153e0a8c8be943427f3cea8e7a">serial_number</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">return the usrp's serial number. <a href="#ae4c4e3153e0a8c8be943427f3cea8e7a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">virtual int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a13688f5471fd3fe48ac66738b879ad5c">daughterboard_id</a> (int which_side) const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return daughterboard ID for given side [0,1]. <a href="#a13688f5471fd3fe48ac66738b879ad5c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ab7c20403b12e1c3d672f386fbe6e8fa7">write_atr_tx_delay</a> (int value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Clock ticks to delay rising of T/R signal. <a href="#ab7c20403b12e1c3d672f386fbe6e8fa7"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a08493c5d327ffe70afdf94e814aa9092">write_atr_rx_delay</a> (int value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Clock ticks to delay falling edge of T/R signal. <a href="#a08493c5d327ffe70afdf94e814aa9092"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ab62fd985de42e9404bbcd0b728186af0">set_pga</a> (int which_amp, double gain_in_db)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set Programmable Gain Amplifier (PGA) <a href="#ab62fd985de42e9404bbcd0b728186af0"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#abfbb58de567e58af22f16ff4083dde3b">pga</a> (int which_amp) const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return programmable gain amplifier gain setting in dB. <a href="#abfbb58de567e58af22f16ff4083dde3b"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a90754c12fcf8735c90fe9991bbbe7ea9">pga_min</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return minimum legal PGA gain in dB. <a href="#a90754c12fcf8735c90fe9991bbbe7ea9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a545bdec261ae9781e2122212f67603d3">pga_max</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return maximum legal PGA gain in dB. <a href="#a545bdec261ae9781e2122212f67603d3"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#afd3b0eea695796add6f25066552d0a0d">pga_db_per_step</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return hardware step size of PGA (linear in dB). <a href="#afd3b0eea695796add6f25066552d0a0d"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a2ca3c433f29876b1f480ab0fad1d16d3">_write_oe</a> (int which_side, int value, int mask)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write direction register (output enables) for pins that go to daughterboard. <a href="#a2ca3c433f29876b1f480ab0fad1d16d3"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ad67d8025f46a96f6206d2e066b75a77c">write_io</a> (int which_side, int value, int mask)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write daughterboard i/o pin value. <a href="#ad67d8025f46a96f6206d2e066b75a77c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a026ecc14a69ccc684479e39c7fac29ac">read_io</a> (int which_side)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read daughterboard i/o pin value. <a href="#a026ecc14a69ccc684479e39c7fac29ac"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a00599c4d08010481f4db7254f1135f48">write_refclk</a> (int which_side, int value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write daughterboard refclk config register. <a href="#a00599c4d08010481f4db7254f1135f48"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ac55d0d482f4f489cd983ec5a8446968a">write_atr_mask</a> (int which_side, int value)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#aaf04ba05b35db8a0ec6e73bd6be2708c">write_atr_txval</a> (int which_side, int value)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a46fe4d6b66cde8b52f7a3a9dc69974bb">write_atr_rxval</a> (int which_side, int value)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a2e92aee3eb6019e0593537162930b3b3">write_aux_dac</a> (int which_side, int which_dac, int value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write auxiliary digital to analog converter. <a href="#a2e92aee3eb6019e0593537162930b3b3"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ae4401c31c817f38c94285840c1c5d332">read_aux_adc</a> (int which_side, int which_adc)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read auxiliary analog to digital converter. <a href="#ae4401c31c817f38c94285840c1c5d332"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">long </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a4d9437597a0765bb108d4edb4a214a59">converter_rate</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">returns A/D or D/A converter rate in Hz <a href="#a4d9437597a0765bb108d4edb4a214a59"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a8e1b09413d341b59ca57d85509a48041">_set_led</a> (int which_led, <a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> on)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a3b90832c8b58bebd9372b29119583880">_write_fpga_reg</a> (int regno, int value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write FPGA register. <a href="#a3b90832c8b58bebd9372b29119583880"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a8828d4f70099bc51b5bfbfe67efd8a38">_read_fpga_reg</a> (int regno, int *value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read FPGA register. <a href="#a8828d4f70099bc51b5bfbfe67efd8a38"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a7f673041f0b9f86cd7e1c2b86f0ae537">_read_fpga_reg</a> (int regno)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read FPGA register. <a href="#a7f673041f0b9f86cd7e1c2b86f0ae537"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#abd64d521f2583f50b1860ee90ca8291c">_write_fpga_reg_masked</a> (int regno, int value, int mask)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write FPGA register with mask. <a href="#abd64d521f2583f50b1860ee90ca8291c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a269fbb5a5dc3925c85d2512c14ea58c5">_write_9862</a> (int which_codec, int regno, unsigned char value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write AD9862 register. <a href="#a269fbb5a5dc3925c85d2512c14ea58c5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a3dffad1d9abee16832cb4b93ed6e215b">_read_9862</a> (int which_codec, int regno) const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read AD9862 register. <a href="#a3dffad1d9abee16832cb4b93ed6e215b"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#aef540d3249b7b319b56d8035772080cd">_write_spi</a> (int optional_header, int enables, int format, std::string buf)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write data to SPI bus peripheral. <a href="#aef540d3249b7b319b56d8035772080cd"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">std::string </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#abbf9428906a60ef12d9caf1a5d85ca26">_read_spi</a> (int optional_header, int enables, int format, int len)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#addca06bac380d27ae98676e14cd63d9c">pick_subdev</a> (<a class="el" href="classstd_1_1vector.html">std::vector</a>< int > candidates=<a class="el" href="classstd_1_1vector.html">std::vector</a>< int >(0))</td></tr>
<tr><td colspan="2"><h2><a name="pub-static-attribs"></a>
Static Public Attributes</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static const int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a88a19bcca08ead6124f8df5fe2ede14d">READ_FAILED</a> = -99999</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">magic value used on alternate register read interfaces <a href="#a88a19bcca08ead6124f8df5fe2ede14d"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pro-methods"></a>
Protected Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#a503172dda763fb3692d4c4edb8fa8be0">usrp_base</a> (const std::string &name, <a class="el" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> input_signature, <a class="el" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> output_signature)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__base.html#ab21be360b351e521dcb26061223cc5ae">set_usrp_basic</a> (<a class="el" href="classboost_1_1shared__ptr.html">boost::shared_ptr</a>< <a class="el" href="classusrp__basic.html">usrp_basic</a> > u)</td></tr>
</table>
<hr/><a name="_details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>base class for GNU Radio interface to the USRP </p>
</div><hr/><h2>Constructor & Destructor Documentation</h2>
<a class="anchor" id="a503172dda763fb3692d4c4edb8fa8be0"></a><!-- doxytag: member="usrp_base::usrp_base" ref="a503172dda763fb3692d4c4edb8fa8be0" args="(const std::string &name, gr_io_signature_sptr input_signature, gr_io_signature_sptr output_signature)" -->
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<td class="memname">usrp_base::usrp_base </td>
<td>(</td>
<td class="paramtype">const std::string & </td>
<td class="paramname"><em>name</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> </td>
<td class="paramname"><em>input_signature</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> </td>
<td class="paramname"><em>output_signature</em> </td>
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<td></td>
<td>)</td>
<td></td><td><code> [inline, protected]</code></td>
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<div class="memdoc">
</div>
</div>
<a class="anchor" id="aec7be50c39bb469377afce7b29340d12"></a><!-- doxytag: member="usrp_base::~usrp_base" ref="aec7be50c39bb469377afce7b29340d12" args="()" -->
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<td class="memname">virtual usrp_base::~usrp_base </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td><code> [virtual]</code></td>
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<div class="memdoc">
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<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a3dffad1d9abee16832cb4b93ed6e215b"></a><!-- doxytag: member="usrp_base::_read_9862" ref="a3dffad1d9abee16832cb4b93ed6e215b" args="(int which_codec, int regno) const " -->
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<td class="memname">int usrp_base::_read_9862 </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_codec</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">int </td>
<td class="paramname"><em>regno</em> </td>
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<td>)</td>
<td></td><td> const</td>
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<p>Read AD9862 register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_codec</td><td>0 or 1 </td></tr>
<tr><td class="paramname">regno</td><td>6-bit register number </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>register value if successful, else READ_FAILED </dd></dl>
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</div>
<a class="anchor" id="a8828d4f70099bc51b5bfbfe67efd8a38"></a><!-- doxytag: member="usrp_base::_read_fpga_reg" ref="a8828d4f70099bc51b5bfbfe67efd8a38" args="(int regno, int *value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::_read_fpga_reg </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>regno</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int * </td>
<td class="paramname"><em>value</em> </td>
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<p>Read FPGA register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">regno</td><td>7-bit register number </td></tr>
<tr><td class="paramname">value</td><td>32-bit value </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful </dd></dl>
</div>
</div>
<a class="anchor" id="a7f673041f0b9f86cd7e1c2b86f0ae537"></a><!-- doxytag: member="usrp_base::_read_fpga_reg" ref="a7f673041f0b9f86cd7e1c2b86f0ae537" args="(int regno)" -->
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<td class="memname">int usrp_base::_read_fpga_reg </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>regno</em></td><td>)</td>
<td></td>
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<div class="memdoc">
<p>Read FPGA register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">regno</td><td>7-bit register number </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>register value if successful, else READ_FAILED </dd></dl>
</div>
</div>
<a class="anchor" id="abbf9428906a60ef12d9caf1a5d85ca26"></a><!-- doxytag: member="usrp_base::_read_spi" ref="abbf9428906a60ef12d9caf1a5d85ca26" args="(int optional_header, int enables, int format, int len)" -->
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<td class="memname">std::string usrp_base::_read_spi </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>optional_header</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>enables</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>format</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>len</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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</div>
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<a class="anchor" id="a8e1b09413d341b59ca57d85509a48041"></a><!-- doxytag: member="usrp_base::_set_led" ref="a8e1b09413d341b59ca57d85509a48041" args="(int which_led, bool on)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::_set_led </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_led</em>, </td>
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<td></td>
<td class="paramtype"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td>
<td class="paramname"><em>on</em> </td>
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<td></td>
<td>)</td>
<td></td><td></td>
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<a class="anchor" id="a269fbb5a5dc3925c85d2512c14ea58c5"></a><!-- doxytag: member="usrp_base::_write_9862" ref="a269fbb5a5dc3925c85d2512c14ea58c5" args="(int which_codec, int regno, unsigned char value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::_write_9862 </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_codec</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">int </td>
<td class="paramname"><em>regno</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned char </td>
<td class="paramname"><em>value</em> </td>
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<td></td>
<td>)</td>
<td></td><td></td>
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<p>Write AD9862 register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_codec</td><td>0 or 1 </td></tr>
<tr><td class="paramname">regno</td><td>6-bit register number </td></tr>
<tr><td class="paramname">value</td><td>8-bit value </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful </dd></dl>
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<a class="anchor" id="a3b90832c8b58bebd9372b29119583880"></a><!-- doxytag: member="usrp_base::_write_fpga_reg" ref="a3b90832c8b58bebd9372b29119583880" args="(int regno, int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::_write_fpga_reg </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>regno</em>, </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
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<td></td>
<td>)</td>
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<div class="memdoc">
<p>Write FPGA register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">regno</td><td>7-bit register number </td></tr>
<tr><td class="paramname">value</td><td>32-bit value </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful </dd></dl>
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<a class="anchor" id="abd64d521f2583f50b1860ee90ca8291c"></a><!-- doxytag: member="usrp_base::_write_fpga_reg_masked" ref="abd64d521f2583f50b1860ee90ca8291c" args="(int regno, int value, int mask)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::_write_fpga_reg_masked </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>regno</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mask</em> </td>
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<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
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<p>Write FPGA register with mask. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">regno</td><td>7-bit register number </td></tr>
<tr><td class="paramname">value</td><td>16-bit value </td></tr>
<tr><td class="paramname">mask</td><td>16-bit value </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true if successful Only use this for registers who actually implement a mask in the verilog firmware, like FR_RX_MASTER_SLAVE </dd></dl>
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<a class="anchor" id="a2ca3c433f29876b1f480ab0fad1d16d3"></a><!-- doxytag: member="usrp_base::_write_oe" ref="a2ca3c433f29876b1f480ab0fad1d16d3" args="(int which_side, int value, int mask)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::_write_oe </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mask</em> </td>
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<p>Write direction register (output enables) for pins that go to daughterboard. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which size </td></tr>
<tr><td class="paramname">value</td><td>value to write into register </td></tr>
<tr><td class="paramname">mask</td><td>which bits of value to write into reg</td></tr>
</table>
</dd>
</dl>
<p>Each d'board has 16-bits of general purpose i/o. Setting the bit makes it an output from the FPGA to the d'board.</p>
<p>This register is initialized based on a value stored in the d'board EEPROM. In general, you shouldn't be using this routine without a very good reason. Using this method incorrectly will kill your USRP motherboard and/or daughterboard. </p>
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<a class="anchor" id="aef540d3249b7b319b56d8035772080cd"></a><!-- doxytag: member="usrp_base::_write_spi" ref="aef540d3249b7b319b56d8035772080cd" args="(int optional_header, int enables, int format, std::string buf)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::_write_spi </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>optional_header</em>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>enables</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>format</em>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">std::string </td>
<td class="paramname"><em>buf</em> </td>
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<td></td>
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<p>Write data to SPI bus peripheral. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">optional_header</td><td>0,1 or 2 bytes to write before buf. </td></tr>
<tr><td class="paramname">enables</td><td>bitmask of peripherals to write. See usrp_spi_defs.h </td></tr>
<tr><td class="paramname">format</td><td>transaction format. See usrp_spi_defs.h SPI_FMT_* </td></tr>
<tr><td class="paramname">buf</td><td>the data to write </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful Writes are limited to a maximum of 64 bytes.</dd></dl>
<p>If <code>format</code> specifies that optional_header bytes are present, they are written to the peripheral immediately prior to writing <code>buf</code>. </p>
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<a class="anchor" id="a4d9437597a0765bb108d4edb4a214a59"></a><!-- doxytag: member="usrp_base::converter_rate" ref="a4d9437597a0765bb108d4edb4a214a59" args="() const " -->
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<p>returns A/D or D/A converter rate in Hz </p>
<p>Referenced by <a class="el" href="classusrp__source__base.html#a64a278b12f7eed5f6c3540477e0f8e3c">usrp_source_base::adc_freq()</a>, <a class="el" href="classusrp__source__base.html#a555cf6e1a2d7d4114c8cf0905367707a">usrp_source_base::adc_rate()</a>, <a class="el" href="classusrp__sink__base.html#a2e6e0e9afccfe67c3bb47eac18cb06bc">usrp_sink_base::dac_freq()</a>, and <a class="el" href="classusrp__sink__base.html#ad9750e7eff9bb55536fa18cece8cc125">usrp_sink_base::dac_rate()</a>.</p>
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<a class="anchor" id="a13688f5471fd3fe48ac66738b879ad5c"></a><!-- doxytag: member="usrp_base::daughterboard_id" ref="a13688f5471fd3fe48ac66738b879ad5c" args="(int which_side) const " -->
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<td class="memname">virtual int usrp_base::daughterboard_id </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em></td><td>)</td>
<td> const<code> [virtual]</code></td>
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<div class="memdoc">
<p>Return daughterboard ID for given side [0,1]. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which daughterboard</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>daughterboard id >= 0 if successful </dd>
<dd>
-1 if no daugherboard </dd>
<dd>
-2 if invalid EEPROM on daughterboard </dd></dl>
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</div>
<a class="anchor" id="a17b526d6a6c02925a668b368e26c94dd"></a><!-- doxytag: member="usrp_base::db" ref="a17b526d6a6c02925a668b368e26c94dd" args="(int which_side, int which_dev)" -->
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<td class="memname"><a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> usrp_base::db </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_dev</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<p>Return the daughterboard instance corresponding to the selected side of the USRP and selected daughterboard subdevice. N.B. To ensure proper lifetime management, the caller should continue to hold these as weak pointers, not shared pointers. As long as the caller does not attempt to directly use the weak pointers after this usrp object has been destroyed, everything will work out fine. </p>
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<a class="anchor" id="adc92a29a1a00b5239170aab7d22be47a"></a><!-- doxytag: member="usrp_base::db" ref="adc92a29a1a00b5239170aab7d22be47a" args="()" -->
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<td class="memname"><a class="el" href="classstd_1_1vector.html">std::vector</a><<a class="el" href="classstd_1_1vector.html">std::vector</a><<a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a>> > usrp_base::db </td>
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<td class="paramname"></td><td>)</td>
<td></td>
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<a class="anchor" id="a49eb44ab01919d61ac2efb54182445eb"></a><!-- doxytag: member="usrp_base::db" ref="a49eb44ab01919d61ac2efb54182445eb" args="(int which_side)" -->
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<td class="memname"><a class="el" href="classstd_1_1vector.html">std::vector</a><<a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a>> usrp_base::db </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em></td><td>)</td>
<td></td>
</tr>
</table>
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<p>Return a vector of size 1 or 2 that contains shared pointers to the daughterboard instance(s) associated with the specified side.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which daughterboard</td></tr>
</table>
</dd>
</dl>
<p>N.B. To ensure proper lifetime management, the caller should continue to hold these as weak pointers, not shared pointers. As long as the caller does not attempt to directly use the weak pointers after this usrp object has been destroyed, everything will work out fine. </p>
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<a class="anchor" id="a35ea1e5801c3f612823f0d002b3ea817"></a><!-- doxytag: member="usrp_base::fpga_master_clock_freq" ref="a35ea1e5801c3f612823f0d002b3ea817" args="() const " -->
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<td class="memname">long usrp_base::fpga_master_clock_freq </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
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<div class="memdoc">
<p>return frequency of master oscillator on USRP </p>
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<a class="anchor" id="abfbb58de567e58af22f16ff4083dde3b"></a><!-- doxytag: member="usrp_base::pga" ref="abfbb58de567e58af22f16ff4083dde3b" args="(int which_amp) const " -->
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<td class="memname">double usrp_base::pga </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_amp</em></td><td>)</td>
<td> const</td>
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<p>Return programmable gain amplifier gain setting in dB. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_amp</td><td>which amp [0,3] </td></tr>
</table>
</dd>
</dl>
</div>
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<a class="anchor" id="afd3b0eea695796add6f25066552d0a0d"></a><!-- doxytag: member="usrp_base::pga_db_per_step" ref="afd3b0eea695796add6f25066552d0a0d" args="() const " -->
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<td class="memname">double usrp_base::pga_db_per_step </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
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<p>Return hardware step size of PGA (linear in dB). </p>
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<a class="anchor" id="a545bdec261ae9781e2122212f67603d3"></a><!-- doxytag: member="usrp_base::pga_max" ref="a545bdec261ae9781e2122212f67603d3" args="() const " -->
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<td class="memname">double usrp_base::pga_max </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
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<p>Return maximum legal PGA gain in dB. </p>
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<a class="anchor" id="a90754c12fcf8735c90fe9991bbbe7ea9"></a><!-- doxytag: member="usrp_base::pga_min" ref="a90754c12fcf8735c90fe9991bbbe7ea9" args="() const " -->
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<td class="memname">double usrp_base::pga_min </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
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<p>Return minimum legal PGA gain in dB. </p>
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<a class="anchor" id="addca06bac380d27ae98676e14cd63d9c"></a><!-- doxytag: member="usrp_base::pick_subdev" ref="addca06bac380d27ae98676e14cd63d9c" args="(std::vector< int > candidates=std::vector< int >(0))" -->
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<td class="memname"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> usrp_base::pick_subdev </td>
<td>(</td>
<td class="paramtype"><a class="el" href="classstd_1_1vector.html">std::vector</a>< int > </td>
<td class="paramname"><em>candidates</em> = <code><a class="el" href="classstd_1_1vector.html">std::vector</a>< int >(0)</code></td><td>)</td>
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<p>Return an existing daughterboard from list of candidate dbids, or the first found on side A or side B.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">candidates</td><td>Vector of candidate dbids</td></tr>
</table>
</dd>
</dl>
<p>Throws std::runtime_error if not found </p>
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<a class="anchor" id="ae4401c31c817f38c94285840c1c5d332"></a><!-- doxytag: member="usrp_base::read_aux_adc" ref="ae4401c31c817f38c94285840c1c5d332" args="(int which_side, int which_adc)" -->
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<td class="memname">int usrp_base::read_aux_adc </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_adc</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<p>Read auxiliary analog to digital converter. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">which_adc</td><td>[0,1] </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>value in the range [0,4095] if successful, else READ_FAILED. </dd></dl>
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<a class="anchor" id="aae9b2540add7e6a98070eff0f657511d"></a><!-- doxytag: member="usrp_base::read_eeprom" ref="aae9b2540add7e6a98070eff0f657511d" args="(int i2c_addr, int eeprom_offset, int len)" -->
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<td class="memname">std::string usrp_base::read_eeprom </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>i2c_addr</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>eeprom_offset</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>len</em> </td>
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<td></td>
<td>)</td>
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<p>Read EEPROM on motherboard or any daughterboard. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">i2c_addr</td><td>I2C bus address of EEPROM </td></tr>
<tr><td class="paramname">eeprom_offset</td><td>byte offset in EEPROM to begin reading </td></tr>
<tr><td class="paramname">len</td><td>number of bytes to read </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>the data read if successful, else a zero length string. </dd></dl>
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<a class="anchor" id="af28754a9cc4e02e16112b571cc35c1e6"></a><!-- doxytag: member="usrp_base::read_i2c" ref="af28754a9cc4e02e16112b571cc35c1e6" args="(int i2c_addr, int len)" -->
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<td class="memname">std::string usrp_base::read_i2c </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>i2c_addr</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>len</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<p>Read from I2C peripheral. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">i2c_addr</td><td>I2C bus address (7-bits) </td></tr>
<tr><td class="paramname">len</td><td>number of bytes to read </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>the data read if successful, else a zero length string. Reads are limited to a maximum of 64 bytes. </dd></dl>
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<a class="anchor" id="a026ecc14a69ccc684479e39c7fac29ac"></a><!-- doxytag: member="usrp_base::read_io" ref="a026ecc14a69ccc684479e39c7fac29ac" args="(int which_side)" -->
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<td class="memname">int usrp_base::read_io </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em></td><td>)</td>
<td></td>
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<p>Read daughterboard i/o pin value. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>register value if successful, else READ_FAILED </dd></dl>
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</div>
<a class="anchor" id="a600e9883d93981fb80f19fbb352f77c6"></a><!-- doxytag: member="usrp_base::selected_subdev" ref="a600e9883d93981fb80f19fbb352f77c6" args="(usrp_subdev_spec ss)" -->
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<td class="memname"><a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> usrp_base::selected_subdev </td>
<td>(</td>
<td class="paramtype"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> </td>
<td class="paramname"><em>ss</em></td><td>)</td>
<td></td>
</tr>
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<p>given a <a class="el" href="structusrp__subdev__spec.html" title="specify a daughterboard and subdevice on a daughterboard.">usrp_subdev_spec</a>, return the corresponding daughterboard object. </p>
<dl><dt><b>Exceptions:</b></dt><dd>
<table class="exception">
<tr><td class="paramname">std::invalid_argument</td><td>if ss is invalid.</td></tr>
</table>
</dd>
</dl>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">ss</td><td>specifies the side and subdevice </td></tr>
</table>
</dd>
</dl>
</div>
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<a class="anchor" id="ae4c4e3153e0a8c8be943427f3cea8e7a"></a><!-- doxytag: member="usrp_base::serial_number" ref="ae4c4e3153e0a8c8be943427f3cea8e7a" args="()" -->
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<td class="memname">std::string usrp_base::serial_number </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>return the usrp's serial number. </p>
<dl class="return"><dt><b>Returns:</b></dt><dd>non-zero length string iff successful. </dd></dl>
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<a class="anchor" id="ada0d27d0d5e792a39b8a72d78aee78b1"></a><!-- doxytag: member="usrp_base::set_adc_buffer_bypass" ref="ada0d27d0d5e792a39b8a72d78aee78b1" args="(int which_adc, bool bypass)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::set_adc_buffer_bypass </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_adc</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td>
<td class="paramname"><em>bypass</em> </td>
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<td></td>
<td>)</td>
<td></td><td></td>
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<p>Control ADC input buffer. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_adc</td><td>which ADC[0,3] </td></tr>
<tr><td class="paramname">bypass</td><td>if non-zero, bypass input buffer and connect input directly to switched cap SHA input of RxPGA. </td></tr>
</table>
</dd>
</dl>
</div>
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<a class="anchor" id="a9cdc4e19aa2556e4f965f6452411f613"></a><!-- doxytag: member="usrp_base::set_adc_offset" ref="a9cdc4e19aa2556e4f965f6452411f613" args="(int which_adc, int offset)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::set_adc_offset </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_adc</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>offset</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<p>Set ADC offset correction. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_adc</td><td>which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q... </td></tr>
<tr><td class="paramname">offset</td><td>16-bit value to subtract from raw ADC input. </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="acea0344a032d204813856e6f36dbb781"></a><!-- doxytag: member="usrp_base::set_dac_offset" ref="acea0344a032d204813856e6f36dbb781" args="(int which_dac, int offset, int offset_pin)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::set_dac_offset </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_dac</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>offset</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>offset_pin</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<p>Set DAC offset correction. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_dac</td><td>which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q... </td></tr>
<tr><td class="paramname">offset</td><td>10-bit offset value (ambiguous format: See AD9862 datasheet). </td></tr>
<tr><td class="paramname">offset_pin</td><td>1-bit value. If 0 offset applied to -ve differential pin; If 1 offset applied to +ve differential pin. </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="a76785d2dfcbe9ffab380cb37480094a0"></a><!-- doxytag: member="usrp_base::set_dc_offset_cl_enable" ref="a76785d2dfcbe9ffab380cb37480094a0" args="(int bits, int mask)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::set_dc_offset_cl_enable </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>bits</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mask</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
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<p>Enable/disable automatic DC offset removal control loop in FPGA. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">bits</td><td>which control loops to enable </td></tr>
<tr><td class="paramname">mask</td><td>which <code>bits</code> to pay attention to</td></tr>
</table>
</dd>
</dl>
<p>If the corresponding bit is set, enable the automatic DC offset correction control loop.</p>
<pre>
The 4 low bits are significant:</pre><pre> ADC0 = (1 << 0)
ADC1 = (1 << 1)
ADC2 = (1 << 2)
ADC3 = (1 << 3)
</pre><p>By default the control loop is enabled on all ADC's. </p>
</div>
</div>
<a class="anchor" id="a5bb059ba83dd6b99526be0ff48841edc"></a><!-- doxytag: member="usrp_base::set_fpga_master_clock_freq" ref="a5bb059ba83dd6b99526be0ff48841edc" args="(long master_clock)" -->
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<td class="memname">void usrp_base::set_fpga_master_clock_freq </td>
<td>(</td>
<td class="paramtype">long </td>
<td class="paramname"><em>master_clock</em></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Tell API that the master oscillator on the USRP is operating at a non-standard fixed frequency. This is only needed for custom USRP hardware modified to operate at a different frequency from the default factory configuration. This function must be called prior to any other API function. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">master_clock</td><td>USRP2 FPGA master clock frequency in Hz (10..64 MHz) </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="ab62fd985de42e9404bbcd0b728186af0"></a><!-- doxytag: member="usrp_base::set_pga" ref="ab62fd985de42e9404bbcd0b728186af0" args="(int which_amp, double gain_in_db)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::set_pga </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_amp</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">double </td>
<td class="paramname"><em>gain_in_db</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<p>Set Programmable Gain Amplifier (PGA) </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_amp</td><td>which amp [0,3] </td></tr>
<tr><td class="paramname">gain_in_db</td><td>gain value (linear in dB)</td></tr>
</table>
</dd>
</dl>
<p>gain is rounded to closest setting supported by hardware.</p>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff sucessful.</dd></dl>
<dl class="see"><dt><b>See also:</b></dt><dd><a class="el" href="classusrp__base.html#a90754c12fcf8735c90fe9991bbbe7ea9" title="Return minimum legal PGA gain in dB.">pga_min()</a>, <a class="el" href="classusrp__base.html#a545bdec261ae9781e2122212f67603d3" title="Return maximum legal PGA gain in dB.">pga_max()</a>, <a class="el" href="classusrp__base.html#afd3b0eea695796add6f25066552d0a0d" title="Return hardware step size of PGA (linear in dB).">pga_db_per_step()</a> </dd></dl>
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<a class="anchor" id="ab21be360b351e521dcb26061223cc5ae"></a><!-- doxytag: member="usrp_base::set_usrp_basic" ref="ab21be360b351e521dcb26061223cc5ae" args="(boost::shared_ptr< usrp_basic > u)" -->
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<td class="memname">void usrp_base::set_usrp_basic </td>
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<td class="paramtype"><a class="el" href="classboost_1_1shared__ptr.html">boost::shared_ptr</a>< <a class="el" href="classusrp__basic.html">usrp_basic</a> > </td>
<td class="paramname"><em>u</em></td><td>)</td>
<td><code> [protected]</code></td>
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</table>
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<div class="memdoc">
</div>
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<a class="anchor" id="a5a95a06f100f28a93787a41836e8874a"></a><!-- doxytag: member="usrp_base::set_verbose" ref="a5a95a06f100f28a93787a41836e8874a" args="(bool on)" -->
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<td class="memname">void usrp_base::set_verbose </td>
<td>(</td>
<td class="paramtype"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td>
<td class="paramname"><em>on</em></td><td>)</td>
<td></td>
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<div class="memdoc">
</div>
</div>
<a class="anchor" id="ac55d0d482f4f489cd983ec5a8446968a"></a><!-- doxytag: member="usrp_base::write_atr_mask" ref="ac55d0d482f4f489cd983ec5a8446968a" args="(int which_side, int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_atr_mask </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
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</div>
</div>
<a class="anchor" id="a08493c5d327ffe70afdf94e814aa9092"></a><!-- doxytag: member="usrp_base::write_atr_rx_delay" ref="a08493c5d327ffe70afdf94e814aa9092" args="(int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_atr_rx_delay </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em></td><td>)</td>
<td></td>
</tr>
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<div class="memdoc">
<p>Clock ticks to delay falling edge of T/R signal. </p>
<dl class="see"><dt><b>See also:</b></dt><dd><a class="el" href="classusrp__base.html#ac55d0d482f4f489cd983ec5a8446968a">write_atr_mask</a>, <a class="el" href="classusrp__base.html#aaf04ba05b35db8a0ec6e73bd6be2708c">write_atr_txval</a>, <a class="el" href="classusrp__base.html#a46fe4d6b66cde8b52f7a3a9dc69974bb">write_atr_rxval</a> </dd></dl>
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<a class="anchor" id="a46fe4d6b66cde8b52f7a3a9dc69974bb"></a><!-- doxytag: member="usrp_base::write_atr_rxval" ref="a46fe4d6b66cde8b52f7a3a9dc69974bb" args="(int which_side, int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_atr_rxval </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<div class="memdoc">
</div>
</div>
<a class="anchor" id="ab7c20403b12e1c3d672f386fbe6e8fa7"></a><!-- doxytag: member="usrp_base::write_atr_tx_delay" ref="ab7c20403b12e1c3d672f386fbe6e8fa7" args="(int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_atr_tx_delay </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em></td><td>)</td>
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<p>Clock ticks to delay rising of T/R signal. </p>
<dl class="see"><dt><b>See also:</b></dt><dd><a class="el" href="classusrp__base.html#ac55d0d482f4f489cd983ec5a8446968a">write_atr_mask</a>, <a class="el" href="classusrp__base.html#aaf04ba05b35db8a0ec6e73bd6be2708c">write_atr_txval</a>, <a class="el" href="classusrp__base.html#a46fe4d6b66cde8b52f7a3a9dc69974bb">write_atr_rxval</a> </dd></dl>
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</div>
<a class="anchor" id="aaf04ba05b35db8a0ec6e73bd6be2708c"></a><!-- doxytag: member="usrp_base::write_atr_txval" ref="aaf04ba05b35db8a0ec6e73bd6be2708c" args="(int which_side, int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_atr_txval </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<div class="memdoc">
</div>
</div>
<a class="anchor" id="a2e92aee3eb6019e0593537162930b3b3"></a><!-- doxytag: member="usrp_base::write_aux_dac" ref="a2e92aee3eb6019e0593537162930b3b3" args="(int which_side, int which_dac, int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_aux_dac </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_dac</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
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<td></td>
<td>)</td>
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<div class="memdoc">
<p>Write auxiliary digital to analog converter. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. </td></tr>
<tr><td class="paramname">which_dac</td><td>[2,3] TX slots must use only 2 and 3. </td></tr>
<tr><td class="paramname">value</td><td>[0,4095] </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful </dd></dl>
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</div>
<a class="anchor" id="a9aeb17081719fa96a28e640133e9dc5a"></a><!-- doxytag: member="usrp_base::write_eeprom" ref="a9aeb17081719fa96a28e640133e9dc5a" args="(int i2c_addr, int eeprom_offset, const std::string buf)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_eeprom </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>i2c_addr</em>, </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>eeprom_offset</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::string </td>
<td class="paramname"><em>buf</em> </td>
</tr>
<tr>
<td></td>
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<p>Write EEPROM on motherboard or any daughterboard. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">i2c_addr</td><td>I2C bus address of EEPROM </td></tr>
<tr><td class="paramname">eeprom_offset</td><td>byte offset in EEPROM to begin writing </td></tr>
<tr><td class="paramname">buf</td><td>the data to write </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff sucessful </dd></dl>
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<a class="anchor" id="a5d5fcdd2af4e16d45d9b862b2f721ad9"></a><!-- doxytag: member="usrp_base::write_i2c" ref="a5d5fcdd2af4e16d45d9b862b2f721ad9" args="(int i2c_addr, const std::string buf)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_i2c </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>i2c_addr</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::string </td>
<td class="paramname"><em>buf</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
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<div class="memdoc">
<p>Write to I2C peripheral. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">i2c_addr</td><td>I2C bus address (7-bits) </td></tr>
<tr><td class="paramname">buf</td><td>the data to write </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful Writes are limited to a maximum of of 64 bytes. </dd></dl>
</div>
</div>
<a class="anchor" id="ad67d8025f46a96f6206d2e066b75a77c"></a><!-- doxytag: member="usrp_base::write_io" ref="ad67d8025f46a96f6206d2e066b75a77c" args="(int which_side, int value, int mask)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_io </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mask</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<p>Write daughterboard i/o pin value. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">value</td><td>value to write into register </td></tr>
<tr><td class="paramname">mask</td><td>which bits of value to write into reg </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="a00599c4d08010481f4db7254f1135f48"></a><!-- doxytag: member="usrp_base::write_refclk" ref="a00599c4d08010481f4db7254f1135f48" args="(int which_side, int value)" -->
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<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_base::write_refclk </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<div class="memdoc">
<p>Write daughterboard refclk config register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">value</td><td>value to write into register, see below</td></tr>
</table>
</dd>
</dl>
<pre>
Control whether a reference clock is sent to the daughterboards,
and what frequency. The refclk is sent on d'board i/o pin 0.</pre><pre> 3 2 1
1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+-----------------------------------------------+-+------------+
| Reserved (Must be zero) |E| DIVISOR |
+-----------------------------------------------+-+------------+</pre><pre> Bit 7 -- 1 turns on refclk, 0 allows IO use
Bits 6:0 Divider value
</pre>
</div>
</div>
<hr/><h2>Member Data Documentation</h2>
<a class="anchor" id="a88a19bcca08ead6124f8df5fe2ede14d"></a><!-- doxytag: member="usrp_base::READ_FAILED" ref="a88a19bcca08ead6124f8df5fe2ede14d" args="" -->
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<td class="memname">const int <a class="el" href="classusrp__base.html#a88a19bcca08ead6124f8df5fe2ede14d">usrp_base::READ_FAILED</a> = -99999<code> [static]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>magic value used on alternate register read interfaces </p>
</div>
</div>
<hr/>The documentation for this class was generated from the following file:<ul>
<li><a class="el" href="usrp__base_8h_source.html">usrp_base.h</a></li>
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