<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<title>GNU Radio 3.2.2 C++ API: usrp_sink_base Class Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript">
$(document).ready(initResizable);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<!-- Generated by Doxygen 1.7.3 -->
<div id="top">
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
<tbody>
<tr style="height: 56px;">
<td style="padding-left: 0.5em;">
<div id="projectname">GNU Radio 3.2.2 C++ API</div>
</td>
</tr>
</tbody>
</table>
</div>
</div>
<div id="side-nav" class="ui-resizable side-nav-resizable">
<div id="nav-tree">
<div id="nav-tree-contents">
</div>
</div>
<div id="splitbar" style="-moz-user-select:none;"
class="ui-resizable-handle">
</div>
</div>
<script type="text/javascript">
initNavTree('classusrp__sink__base.html','');
</script>
<div id="doc-content">
<div class="header">
<div class="summary">
<a href="#pub-methods">Public Member Functions</a> |
<a href="#pro-methods">Protected Member Functions</a> </div>
<div class="headertitle">
<h1>usrp_sink_base Class Reference</h1> </div>
</div>
<div class="contents">
<!-- doxytag: class="usrp_sink_base" --><!-- doxytag: inherits="usrp_base" -->
<p>abstract interface to Universal Software Radio Peripheral Tx path (Rev 1)
<a href="#_details">More...</a></p>
<p><code>#include <<a class="el" href="usrp__sink__base_8h_source.html">usrp_sink_base.h</a>></code></p>
<div class="dynheader">
Inheritance diagram for usrp_sink_base:</div>
<div class="dyncontent">
<div class="center"><img src="classusrp__sink__base__inherit__graph.png" border="0" usemap="#usrp__sink__base_inherit__map" alt="Inheritance graph"/></div>
<map name="usrp__sink__base_inherit__map" id="usrp__sink__base_inherit__map">
<area shape="rect" id="node11" href="classusrp__sink__c.html" title="Interface to Universal Software Radio Peripheral Tx pathinput: gr_complex." alt="" coords="5,392,96,421"/><area shape="rect" id="node13" href="classusrp__sink__s.html" title="Interface to Universal Software Radio Peripheral Tx pathinput: short." alt="" coords="120,392,211,421"/><area shape="rect" id="node2" href="classusrp__base.html" title="base class for GNU Radio interface to the USRP" alt="" coords="67,237,149,267"/><area shape="rect" id="node4" href="classgr__sync__block.html" title="synchronous 1:1 input to output with historyOverride work to provide the signal processing implementa..." alt="" coords="55,160,161,189"/><area shape="rect" id="node6" href="classgr__block.html" title="The abstract base class for all 'terminal' processing blocks.A signal processing flow is cons..." alt="" coords="73,83,143,112"/><area shape="rect" id="node8" href="classgr__basic__block.html" title="The abstract base class for all signal processing blocks.Basic blocks are the bare abstraction of an ..." alt="" coords="53,5,163,35"/></map>
<center><span class="legend">[<a target="top" href="graph_legend.html">legend</a>]</span></center></div>
<p><a href="classusrp__sink__base-members.html">List of all members.</a></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-methods"></a>
Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a7fb0b4533821551ace4f6a023edd39f1">~usrp_sink_base</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a6d8bffa2bfbc0e8346995aef494f4dfb">work</a> (int noutput_items, <a class="el" href="classstd_1_1vector.html">gr_vector_const_void_star</a> &input_items, <a class="el" href="classstd_1_1vector.html">gr_vector_void_star</a> &output_items)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">just like <a class="el" href="classgr__block.html#a137b93d87dc83bbdb6369d33f4ea8197" title="compute output items from input items">gr_block::general_work</a>, only this arranges to call consume_each for you <a href="#a6d8bffa2bfbc0e8346995aef494f4dfb"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#ad067038823e8bc375f4ac414bd3b4516">set_interp_rate</a> (unsigned int rate)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set interpolator rate. <code>rate</code> must be in [4, 1024] and a multiple of 4. <a href="#ad067038823e8bc375f4ac414bd3b4516"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#aa73c8375ca4af57115708f56461adb17">set_nchannels</a> (int nchan)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a6eeb3812216f5e3a8cd5c581586130c8">set_mux</a> (int mux)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#acf2b4ede145c832f91ff76bbacf46f3c">determine_tx_mux_value</a> (<a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> ss)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#ad3d81e6abe5101f8a9d8fde3f0803068">determine_tx_mux_value</a> (<a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> ss_a, <a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> ss_b)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a7d9be67e450b7198278a96d0cca581e4">set_tx_freq</a> (int channel, double freq)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">set the frequency of the digital up converter. <a href="#a7d9be67e450b7198278a96d0cca581e4"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">long </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#ad9750e7eff9bb55536fa18cece8cc125">dac_rate</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">long </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a2e6e0e9afccfe67c3bb47eac18cb06bc">dac_freq</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a44e219f29ee82dda457858c406d2b6d7">interp_rate</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#af9537cab6f2ddd28f9e6b3714713cd15">nchannels</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a540098dc9a0fa9b1be2a06ae4f5928c9">mux</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a3a471d075d6cf388f7cad5eb42fec35d">tx_freq</a> (int channel) const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#ab50fb41621309b2721fc2e5797c3d38f">nunderruns</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a5d0e96c87025d683fa6a1f8f73f6669e">has_rx_halfband</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#aeb9c1185fbdcb73f8181d9dddcb166d2">has_tx_halfband</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#ae30308b409316771cb419f536d8c85ab">nddcs</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#ae2a0a8fb07ec0f9311e717c789ba8818">nducs</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a85efc4fe8b2f93f8035a61c793562d74">start</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Called to enable drivers, etc for i/o devices. <a href="#a85efc4fe8b2f93f8035a61c793562d74"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a79a0f7db96a450be5bf86c5ab031d6de">stop</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Called to disable drivers, etc for i/o devices. <a href="#a79a0f7db96a450be5bf86c5ab031d6de"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a81ffd4685cfbc06aed92660cd9250f23">tune</a> (int chan, <a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> db, double target_freq, <a class="el" href="classusrp__tune__result.html">usrp_tune_result</a> *result)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">High-level "tune" method. Works for the single channel case. <a href="#a81ffd4685cfbc06aed92660cd9250f23"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a187d43db3cef8bfcc437ec224e13f4e1">pick_tx_subdevice</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Select suitable Tx daughterboard. <a href="#a187d43db3cef8bfcc437ec224e13f4e1"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pro-methods"></a>
Protected Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a65f54ea873dd38a59524a72ee9dd836f">usrp_sink_base</a> (const std::string &name, <a class="el" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> input_signature, int which_board, unsigned int interp_rate, int nchan, int mux, int fusb_block_size, int fusb_nblocks, const std::string fpga_filename, const std::string firmware_filename) throw (std::runtime_error)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">virtual void </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__sink__base.html#a028395de3df16fc8b40324ef4333787a">copy_to_usrp_buffer</a> (<a class="el" href="classstd_1_1vector.html">gr_vector_const_void_star</a> &input_items, int input_index, int input_items_available, int &input_items_consumed, void *usrp_buffer, int usrp_buffer_length, int &bytes_written)=0</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">convert between input item format and usrp native format <a href="#a028395de3df16fc8b40324ef4333787a"></a><br/></td></tr>
</table>
<hr/><a name="_details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>abstract interface to Universal Software Radio Peripheral Tx path (Rev 1) </p>
</div><hr/><h2>Constructor & Destructor Documentation</h2>
<a class="anchor" id="a65f54ea873dd38a59524a72ee9dd836f"></a><!-- doxytag: member="usrp_sink_base::usrp_sink_base" ref="a65f54ea873dd38a59524a72ee9dd836f" args="(const std::string &name, gr_io_signature_sptr input_signature, int which_board, unsigned int interp_rate, int nchan, int mux, int fusb_block_size, int fusb_nblocks, const std::string fpga_filename, const std::string firmware_filename)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">usrp_sink_base::usrp_sink_base </td>
<td>(</td>
<td class="paramtype">const std::string & </td>
<td class="paramname"><em>name</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> </td>
<td class="paramname"><em>input_signature</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_board</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>interp_rate</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>nchan</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mux</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>fusb_block_size</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>fusb_nblocks</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::string </td>
<td class="paramname"><em>fpga_filename</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::string </td>
<td class="paramname"><em>firmware_filename</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td> throw (std::runtime_error)<code> [protected]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="a7fb0b4533821551ace4f6a023edd39f1"></a><!-- doxytag: member="usrp_sink_base::~usrp_sink_base" ref="a7fb0b4533821551ace4f6a023edd39f1" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">usrp_sink_base::~usrp_sink_base </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a028395de3df16fc8b40324ef4333787a"></a><!-- doxytag: member="usrp_sink_base::copy_to_usrp_buffer" ref="a028395de3df16fc8b40324ef4333787a" args="(gr_vector_const_void_star &input_items, int input_index, int input_items_available, int &input_items_consumed, void *usrp_buffer, int usrp_buffer_length, int &bytes_written)=0" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">virtual void usrp_sink_base::copy_to_usrp_buffer </td>
<td>(</td>
<td class="paramtype"><a class="el" href="classstd_1_1vector.html">gr_vector_const_void_star</a> & </td>
<td class="paramname"><em>input_items</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>input_index</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>input_items_available</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int & </td>
<td class="paramname"><em>input_items_consumed</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">void * </td>
<td class="paramname"><em>usrp_buffer</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>usrp_buffer_length</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int & </td>
<td class="paramname"><em>bytes_written</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [protected, pure virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>convert between input item format and usrp native format </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">input_items</td><td>stream(s) of input items </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">input_index</td><td>starting index in input_items </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">input_items_available</td><td>number of items available starting at item[index] </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">input_items_consumed</td><td>number of input items consumed by copy </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">usrp_buffer</td><td>destination buffer </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">usrp_buffer_length</td><td><code>usrp_buffer</code> length in bytes </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">bytes_written</td><td>number of bytes written into <code>usrp_buffer</code> </td></tr>
</table>
</dd>
</dl>
<p>Implemented in <a class="el" href="classusrp__sink__c.html#ae7c2e29029474bf9bbc7139e52dc3a7d">usrp_sink_c</a>, and <a class="el" href="classusrp__sink__s.html#aa458ffc51c5b813a5a66f763204146ce">usrp_sink_s</a>.</p>
</div>
</div>
<a class="anchor" id="a2e6e0e9afccfe67c3bb47eac18cb06bc"></a><!-- doxytag: member="usrp_sink_base::dac_freq" ref="a2e6e0e9afccfe67c3bb47eac18cb06bc" args="() const " -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">long usrp_sink_base::dac_freq </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const<code> [inline]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>References <a class="el" href="classusrp__base.html#a4d9437597a0765bb108d4edb4a214a59">usrp_base::converter_rate()</a>.</p>
</div>
</div>
<a class="anchor" id="ad9750e7eff9bb55536fa18cece8cc125"></a><!-- doxytag: member="usrp_sink_base::dac_rate" ref="ad9750e7eff9bb55536fa18cece8cc125" args="() const " -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">long usrp_sink_base::dac_rate </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const<code> [inline]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>References <a class="el" href="classusrp__base.html#a4d9437597a0765bb108d4edb4a214a59">usrp_base::converter_rate()</a>.</p>
</div>
</div>
<a class="anchor" id="acf2b4ede145c832f91ff76bbacf46f3c"></a><!-- doxytag: member="usrp_sink_base::determine_tx_mux_value" ref="acf2b4ede145c832f91ff76bbacf46f3c" args="(usrp_subdev_spec ss)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::determine_tx_mux_value </td>
<td>(</td>
<td class="paramtype"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> </td>
<td class="paramname"><em>ss</em></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="ad3d81e6abe5101f8a9d8fde3f0803068"></a><!-- doxytag: member="usrp_sink_base::determine_tx_mux_value" ref="ad3d81e6abe5101f8a9d8fde3f0803068" args="(usrp_subdev_spec ss_a, usrp_subdev_spec ss_b)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::determine_tx_mux_value </td>
<td>(</td>
<td class="paramtype"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> </td>
<td class="paramname"><em>ss_a</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> </td>
<td class="paramname"><em>ss_b</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="a5d0e96c87025d683fa6a1f8f73f6669e"></a><!-- doxytag: member="usrp_sink_base::has_rx_halfband" ref="a5d0e96c87025d683fa6a1f8f73f6669e" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::has_rx_halfband </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="aeb9c1185fbdcb73f8181d9dddcb166d2"></a><!-- doxytag: member="usrp_sink_base::has_tx_halfband" ref="aeb9c1185fbdcb73f8181d9dddcb166d2" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::has_tx_halfband </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="a44e219f29ee82dda457858c406d2b6d7"></a><!-- doxytag: member="usrp_sink_base::interp_rate" ref="a44e219f29ee82dda457858c406d2b6d7" args="() const " -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">unsigned int usrp_sink_base::interp_rate </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="a540098dc9a0fa9b1be2a06ae4f5928c9"></a><!-- doxytag: member="usrp_sink_base::mux" ref="a540098dc9a0fa9b1be2a06ae4f5928c9" args="() const " -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::mux </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="af9537cab6f2ddd28f9e6b3714713cd15"></a><!-- doxytag: member="usrp_sink_base::nchannels" ref="af9537cab6f2ddd28f9e6b3714713cd15" args="() const " -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::nchannels </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="ae30308b409316771cb419f536d8c85ab"></a><!-- doxytag: member="usrp_sink_base::nddcs" ref="ae30308b409316771cb419f536d8c85ab" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::nddcs </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="ae2a0a8fb07ec0f9311e717c789ba8818"></a><!-- doxytag: member="usrp_sink_base::nducs" ref="ae2a0a8fb07ec0f9311e717c789ba8818" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::nducs </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="ab50fb41621309b2721fc2e5797c3d38f"></a><!-- doxytag: member="usrp_sink_base::nunderruns" ref="ab50fb41621309b2721fc2e5797c3d38f" args="() const " -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::nunderruns </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const<code> [inline]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="a187d43db3cef8bfcc437ec224e13f4e1"></a><!-- doxytag: member="usrp_sink_base::pick_tx_subdevice" ref="a187d43db3cef8bfcc437ec224e13f4e1" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> usrp_sink_base::pick_tx_subdevice </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Select suitable Tx daughterboard. </p>
</div>
</div>
<a class="anchor" id="ad067038823e8bc375f4ac414bd3b4516"></a><!-- doxytag: member="usrp_sink_base::set_interp_rate" ref="ad067038823e8bc375f4ac414bd3b4516" args="(unsigned int rate)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::set_interp_rate </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>rate</em></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Set interpolator rate. <code>rate</code> must be in [4, 1024] and a multiple of 4. </p>
<p>The final complex sample rate across the USB is dac_freq () / interp_rate () * nchannels () </p>
</div>
</div>
<a class="anchor" id="a6eeb3812216f5e3a8cd5c581586130c8"></a><!-- doxytag: member="usrp_sink_base::set_mux" ref="a6eeb3812216f5e3a8cd5c581586130c8" args="(int mux)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::set_mux </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>mux</em></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="aa73c8375ca4af57115708f56461adb17"></a><!-- doxytag: member="usrp_sink_base::set_nchannels" ref="aa73c8375ca4af57115708f56461adb17" args="(int nchan)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::set_nchannels </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>nchan</em></td><td>)</td>
<td></td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="a7d9be67e450b7198278a96d0cca581e4"></a><!-- doxytag: member="usrp_sink_base::set_tx_freq" ref="a7d9be67e450b7198278a96d0cca581e4" args="(int channel, double freq)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::set_tx_freq </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>channel</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">double </td>
<td class="paramname"><em>freq</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>set the frequency of the digital up converter. </p>
<p><code>channel</code> must be 0. <code>freq</code> is the center frequency in Hz. It must be in the range [-44M, 44M]. The frequency specified is quantized. Use tx_freq to retrieve the actual value used. </p>
</div>
</div>
<a class="anchor" id="a85efc4fe8b2f93f8035a61c793562d74"></a><!-- doxytag: member="usrp_sink_base::start" ref="a85efc4fe8b2f93f8035a61c793562d74" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::start </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Called to enable drivers, etc for i/o devices. </p>
<p>This allows a block to enable an associated driver to begin transfering data just before we start to execute the scheduler. The end result is that this reduces latency in the pipeline when dealing with audio devices, usrps, etc. </p>
<p>Reimplemented from <a class="el" href="classgr__block.html#a49ea94a86f3199f23563bb837633ea1f">gr_block</a>.</p>
</div>
</div>
<a class="anchor" id="a79a0f7db96a450be5bf86c5ab031d6de"></a><!-- doxytag: member="usrp_sink_base::stop" ref="a79a0f7db96a450be5bf86c5ab031d6de" args="()" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::stop </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Called to disable drivers, etc for i/o devices. </p>
<p>Reimplemented from <a class="el" href="classgr__block.html#a53c2c89c037e4e393b75414d605e36b1">gr_block</a>.</p>
</div>
</div>
<a class="anchor" id="a81ffd4685cfbc06aed92660cd9250f23"></a><!-- doxytag: member="usrp_sink_base::tune" ref="a81ffd4685cfbc06aed92660cd9250f23" args="(int chan, db_base_sptr db, double target_freq, usrp_tune_result *result)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><a class="el" href="gc__types_8h.html#a0f2b5d454b7e4dda3861032cfce91085">bool</a> usrp_sink_base::tune </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>chan</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classboost_1_1shared__ptr.html">db_base_sptr</a> </td>
<td class="paramname"><em>db</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">double </td>
<td class="paramname"><em>target_freq</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classusrp__tune__result.html">usrp_tune_result</a> * </td>
<td class="paramname"><em>result</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>High-level "tune" method. Works for the single channel case. </p>
<p>This method adjusts both the daughterboard LO and the DUC so that DC in the complex baseband samples ends up at RF target_freq.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramdir"></td><td class="paramname">chan</td><td>which DUC channel we're controlling (usually == which_side). </td></tr>
<tr><td class="paramdir"></td><td class="paramname">db</td><td>the daughterboard we're controlling. </td></tr>
<tr><td class="paramdir"></td><td class="paramname">target_freq</td><td>the RF frequency we want our baseband translated to. </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">result</td><td>details how the hardware was configured.</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff everything was successful. </dd></dl>
</div>
</div>
<a class="anchor" id="a3a471d075d6cf388f7cad5eb42fec35d"></a><!-- doxytag: member="usrp_sink_base::tx_freq" ref="a3a471d075d6cf388f7cad5eb42fec35d" args="(int channel) const " -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">double usrp_sink_base::tx_freq </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>channel</em></td><td>)</td>
<td> const</td>
</tr>
</table>
</div>
<div class="memdoc">
</div>
</div>
<a class="anchor" id="a6d8bffa2bfbc0e8346995aef494f4dfb"></a><!-- doxytag: member="usrp_sink_base::work" ref="a6d8bffa2bfbc0e8346995aef494f4dfb" args="(int noutput_items, gr_vector_const_void_star &input_items, gr_vector_void_star &output_items)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">int usrp_sink_base::work </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>noutput_items</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classstd_1_1vector.html">gr_vector_const_void_star</a> & </td>
<td class="paramname"><em>input_items</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="classstd_1_1vector.html">gr_vector_void_star</a> & </td>
<td class="paramname"><em>output_items</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>just like <a class="el" href="classgr__block.html#a137b93d87dc83bbdb6369d33f4ea8197" title="compute output items from input items">gr_block::general_work</a>, only this arranges to call consume_each for you </p>
<p>The user must override work to define the signal processing code </p>
<p>Implements <a class="el" href="classgr__sync__block.html#a0c523f4285a6eb690f677ee6295ab117">gr_sync_block</a>.</p>
</div>
</div>
<hr/>The documentation for this class was generated from the following file:<ul>
<li><a class="el" href="usrp__sink__base_8h_source.html">usrp_sink_base.h</a></li>
</ul>
</div>
</div>
<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="classusrp__sink__base.html">usrp_sink_base</a> </li>
<li class="footer">Generated on Thu Feb 17 2011 for GNU Radio 3.2.2 C++ API by 
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.3 </li>
</ul>
</div>
</body>
</html>
distrib
>
Fedora
>
14
>
x86_64
>
media
>
updates
>
by-pkgid
>
6e7a2755bd78c9deedab199b86e675f3
>
files
>
3019
