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gnuradio-doc-3.2.2-9.fc14.x86_64.rpm

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<h1>usrp_base.h</h1>  </div>
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<a href="usrp__base_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span class="comment">/* -*- c++ -*- */</span>
<a name="l00002"></a>00002 <span class="comment">/*</span>
<a name="l00003"></a>00003 <span class="comment"> * Copyright 2004,2008 Free Software Foundation, Inc.</span>
<a name="l00004"></a>00004 <span class="comment"> * </span>
<a name="l00005"></a>00005 <span class="comment"> * This file is part of GNU Radio</span>
<a name="l00006"></a>00006 <span class="comment"> * </span>
<a name="l00007"></a>00007 <span class="comment"> * GNU Radio is free software; you can redistribute it and/or modify</span>
<a name="l00008"></a>00008 <span class="comment"> * it under the terms of the GNU General Public License as published by</span>
<a name="l00009"></a>00009 <span class="comment"> * the Free Software Foundation; either version 3, or (at your option)</span>
<a name="l00010"></a>00010 <span class="comment"> * any later version.</span>
<a name="l00011"></a>00011 <span class="comment"> * </span>
<a name="l00012"></a>00012 <span class="comment"> * GNU Radio is distributed in the hope that it will be useful,</span>
<a name="l00013"></a>00013 <span class="comment"> * but WITHOUT ANY WARRANTY; without even the implied warranty of</span>
<a name="l00014"></a>00014 <span class="comment"> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</span>
<a name="l00015"></a>00015 <span class="comment"> * GNU General Public License for more details.</span>
<a name="l00016"></a>00016 <span class="comment"> * </span>
<a name="l00017"></a>00017 <span class="comment"> * You should have received a copy of the GNU General Public License along</span>
<a name="l00018"></a>00018 <span class="comment"> * with this program; if not, write to the Free Software Foundation, Inc.,</span>
<a name="l00019"></a>00019 <span class="comment"> * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</span>
<a name="l00020"></a>00020 <span class="comment"> */</span>
<a name="l00021"></a>00021 <span class="preprocessor">#ifndef INCLUDED_USRP_BASE_H</span>
<a name="l00022"></a>00022 <span class="preprocessor"></span><span class="preprocessor">#define INCLUDED_USRP_BASE_H</span>
<a name="l00023"></a>00023 <span class="preprocessor"></span>
<a name="l00024"></a>00024 <span class="preprocessor">#include &lt;gr_sync_block.h&gt;</span>
<a name="l00025"></a>00025 <span class="preprocessor">#include &lt;stdexcept&gt;</span>
<a name="l00026"></a>00026 <span class="preprocessor">#include &lt;boost/shared_ptr.hpp&gt;</span>
<a name="l00027"></a>00027 <span class="preprocessor">#include &lt;db_base.h&gt;</span>
<a name="l00028"></a>00028 <span class="preprocessor">#include &lt;usrp_subdev_spec.h&gt;</span>
<a name="l00029"></a>00029 
<a name="l00030"></a>00030 <span class="keyword">class </span><a class="code" href="classusrp__basic.html" title="abstract base class for usrp operations">usrp_basic</a>;
<a name="l00031"></a>00031 <span class="comment"></span>
<a name="l00032"></a>00032 <span class="comment">/*!</span>
<a name="l00033"></a>00033 <span class="comment"> * \brief base class for GNU Radio interface to the USRP</span>
<a name="l00034"></a>00034 <span class="comment"> */</span>
<a name="l00035"></a><a class="code" href="classusrp__base.html">00035</a> <span class="keyword">class </span><a class="code" href="classusrp__base.html" title="base class for GNU Radio interface to the USRP">usrp_base</a> : <span class="keyword">public</span> <a class="code" href="classgr__sync__block.html" title="synchronous 1:1 input to output with historyOverride work to provide the signal processing implementa...">gr_sync_block</a> {
<a name="l00036"></a>00036 <span class="keyword">private</span>:
<a name="l00037"></a>00037   <a class="code" href="classboost_1_1shared__ptr.html">boost::shared_ptr&lt;usrp_basic&gt;</a> d_usrp_basic;
<a name="l00038"></a>00038 
<a name="l00039"></a>00039 <span class="keyword">protected</span>:
<a name="l00040"></a><a class="code" href="classusrp__base.html#a503172dda763fb3692d4c4edb8fa8be0">00040</a>   <a class="code" href="classusrp__base.html#a503172dda763fb3692d4c4edb8fa8be0">usrp_base</a>(<span class="keyword">const</span> std::string &amp;<a class="code" href="classgr__basic__block.html#aa12a20d8b8eab341da935530d29299d2">name</a>,
<a name="l00041"></a>00041             <a class="code" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> <a class="code" href="classgr__basic__block.html#a58f6d05e85931200f3771d3e50741281">input_signature</a>,
<a name="l00042"></a>00042             <a class="code" href="classboost_1_1shared__ptr.html">gr_io_signature_sptr</a> <a class="code" href="classgr__basic__block.html#add68b96f012dfe352700b4fd1c3a184a">output_signature</a>)
<a name="l00043"></a>00043     : <a class="code" href="classgr__sync__block.html" title="synchronous 1:1 input to output with historyOverride work to provide the signal processing implementa...">gr_sync_block</a>(name, input_signature, output_signature) {}
<a name="l00044"></a>00044     
<a name="l00045"></a>00045 
<a name="l00046"></a>00046   <span class="keywordtype">void</span> <a class="code" href="classusrp__base.html#ab21be360b351e521dcb26061223cc5ae">set_usrp_basic</a>(<a class="code" href="classboost_1_1shared__ptr.html">boost::shared_ptr&lt;usrp_basic&gt;</a> u);
<a name="l00047"></a>00047 
<a name="l00048"></a>00048 <span class="keyword">public</span>:
<a name="l00049"></a>00049   <span class="keyword">virtual</span> <a class="code" href="classusrp__base.html#aec7be50c39bb469377afce7b29340d12">~usrp_base</a>();
<a name="l00050"></a>00050 
<a name="l00051"></a>00051   <span class="comment">/* !</span>
<a name="l00052"></a>00052 <span class="comment">   * Return a vector of vectors of daughterboard instances associated with</span>
<a name="l00053"></a>00053 <span class="comment">   * the USRP source or sink.  The first dimension of the returned vector</span>
<a name="l00054"></a>00054 <span class="comment">   * corresponds to the side of the USRP, the second dimension, the subdevice</span>
<a name="l00055"></a>00055 <span class="comment">   * on the particular daughterboard.</span>
<a name="l00056"></a>00056 <span class="comment">   *</span>
<a name="l00057"></a>00057 <span class="comment">   * N.B. To ensure proper lifetime management, the caller should</span>
<a name="l00058"></a>00058 <span class="comment">   * continue to hold these as weak pointers, not shared pointers.  </span>
<a name="l00059"></a>00059 <span class="comment">   * As long as the caller does not attempt to directly use the weak</span>
<a name="l00060"></a>00060 <span class="comment">   * pointers after this usrp object has been destroyed, everything</span>
<a name="l00061"></a>00061 <span class="comment">   * will work out fine.</span>
<a name="l00062"></a>00062 <span class="comment">   */</span>
<a name="l00063"></a>00063    <a class="code" href="classstd_1_1vector.html" title="vector documentation stub">std::vector&lt;std::vector&lt;db_base_sptr&gt;</a> &gt; <a class="code" href="classusrp__base.html#adc92a29a1a00b5239170aab7d22be47a">db</a>();
<a name="l00064"></a>00064 <span class="comment"></span>
<a name="l00065"></a>00065 <span class="comment">  /*!</span>
<a name="l00066"></a>00066 <span class="comment">   * Return a vector of size 1 or 2 that contains shared pointers</span>
<a name="l00067"></a>00067 <span class="comment">   * to the daughterboard instance(s) associated with the specified side.</span>
<a name="l00068"></a>00068 <span class="comment">   *</span>
<a name="l00069"></a>00069 <span class="comment">   * \param which_side  [0,1] which daughterboard</span>
<a name="l00070"></a>00070 <span class="comment">   *</span>
<a name="l00071"></a>00071 <span class="comment">   * N.B. To ensure proper lifetime management, the caller should</span>
<a name="l00072"></a>00072 <span class="comment">   * continue to hold these as weak pointers, not shared pointers.  </span>
<a name="l00073"></a>00073 <span class="comment">   * As long as the caller does not attempt to directly use the weak</span>
<a name="l00074"></a>00074 <span class="comment">   * pointers after this usrp object has been destroyed, everything</span>
<a name="l00075"></a>00075 <span class="comment">   * will work out fine.</span>
<a name="l00076"></a>00076 <span class="comment">   */</span>
<a name="l00077"></a>00077   <a class="code" href="classstd_1_1vector.html" title="vector documentation stub">std::vector&lt;db_base_sptr&gt;</a> <a class="code" href="classusrp__base.html#adc92a29a1a00b5239170aab7d22be47a">db</a>(<span class="keywordtype">int</span> which_side);
<a name="l00078"></a>00078 <span class="comment"></span>
<a name="l00079"></a>00079 <span class="comment">  /*!</span>
<a name="l00080"></a>00080 <span class="comment">   * Return the daughterboard instance corresponding to the selected</span>
<a name="l00081"></a>00081 <span class="comment">   * side of the USRP and selected daughterboard subdevice.</span>
<a name="l00082"></a>00082 <span class="comment">   * N.B. To ensure proper lifetime management, the caller should</span>
<a name="l00083"></a>00083 <span class="comment">   * continue to hold these as weak pointers, not shared pointers.  </span>
<a name="l00084"></a>00084 <span class="comment">   * As long as the caller does not attempt to directly use the weak</span>
<a name="l00085"></a>00085 <span class="comment">   * pointers after this usrp object has been destroyed, everything</span>
<a name="l00086"></a>00086 <span class="comment">   * will work out fine.</span>
<a name="l00087"></a>00087 <span class="comment">   */</span>
<a name="l00088"></a>00088   <a class="code" href="classboost_1_1shared__ptr.html" title="shared_ptr documentation stub">db_base_sptr</a> <a class="code" href="classusrp__base.html#adc92a29a1a00b5239170aab7d22be47a">db</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_dev);
<a name="l00089"></a>00089 <span class="comment"></span>
<a name="l00090"></a>00090 <span class="comment">  /*!</span>
<a name="l00091"></a>00091 <span class="comment">   * \brief given a usrp_subdev_spec, return the corresponding daughterboard object.</span>
<a name="l00092"></a>00092 <span class="comment">   * \throws std::invalid_argument if ss is invalid.</span>
<a name="l00093"></a>00093 <span class="comment">   *</span>
<a name="l00094"></a>00094 <span class="comment">   * \param ss specifies the side and subdevice</span>
<a name="l00095"></a>00095 <span class="comment">   */</span>
<a name="l00096"></a>00096   <a class="code" href="classboost_1_1shared__ptr.html" title="shared_ptr documentation stub">db_base_sptr</a> <a class="code" href="classusrp__base.html#a600e9883d93981fb80f19fbb352f77c6" title="given a usrp_subdev_spec, return the corresponding daughterboard object.">selected_subdev</a>(<a class="code" href="structusrp__subdev__spec.html" title="specify a daughterboard and subdevice on a daughterboard.">usrp_subdev_spec</a> ss);
<a name="l00097"></a>00097 <span class="comment"></span>
<a name="l00098"></a>00098 <span class="comment">  /*!</span>
<a name="l00099"></a>00099 <span class="comment">   * \brief return frequency of master oscillator on USRP</span>
<a name="l00100"></a>00100 <span class="comment">   */</span>
<a name="l00101"></a>00101   <span class="keywordtype">long</span> <a class="code" href="classusrp__base.html#a35ea1e5801c3f612823f0d002b3ea817" title="return frequency of master oscillator on USRP">fpga_master_clock_freq</a>() <span class="keyword">const</span>;
<a name="l00102"></a>00102 <span class="comment"></span>
<a name="l00103"></a>00103 <span class="comment">  /*!</span>
<a name="l00104"></a>00104 <span class="comment">   * Tell API that the master oscillator on the USRP is operating at a non-standard </span>
<a name="l00105"></a>00105 <span class="comment">   * fixed frequency. This is only needed for custom USRP hardware modified to </span>
<a name="l00106"></a>00106 <span class="comment">   * operate at a different frequency from the default factory configuration. This</span>
<a name="l00107"></a>00107 <span class="comment">   * function must be called prior to any other API function.</span>
<a name="l00108"></a>00108 <span class="comment">   * \param master_clock USRP2 FPGA master clock frequency in Hz (10..64 MHz)</span>
<a name="l00109"></a>00109 <span class="comment">   */</span>
<a name="l00110"></a>00110   <span class="keywordtype">void</span> <a class="code" href="classusrp__base.html#a5bb059ba83dd6b99526be0ff48841edc">set_fpga_master_clock_freq</a> (<span class="keywordtype">long</span> master_clock);
<a name="l00111"></a>00111 
<a name="l00112"></a>00112   <span class="keywordtype">void</span> <a class="code" href="classusrp__base.html#a5a95a06f100f28a93787a41836e8874a">set_verbose</a> (<span class="keywordtype">bool</span> on);
<a name="l00113"></a>00113 <span class="comment"></span>
<a name="l00114"></a>00114 <span class="comment">  //! magic value used on alternate register read interfaces</span>
<a name="l00115"></a><a class="code" href="classusrp__base.html#a88a19bcca08ead6124f8df5fe2ede14d">00115</a> <span class="comment"></span>  <span class="keyword">static</span> <span class="keyword">const</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__base.html#a88a19bcca08ead6124f8df5fe2ede14d" title="magic value used on alternate register read interfaces">READ_FAILED</a> = -99999;
<a name="l00116"></a>00116 <span class="comment"></span>
<a name="l00117"></a>00117 <span class="comment">  /*!</span>
<a name="l00118"></a>00118 <span class="comment">   * \brief Write EEPROM on motherboard or any daughterboard.</span>
<a name="l00119"></a>00119 <span class="comment">   * \param i2c_addr            I2C bus address of EEPROM</span>
<a name="l00120"></a>00120 <span class="comment">   * \param eeprom_offset       byte offset in EEPROM to begin writing</span>
<a name="l00121"></a>00121 <span class="comment">   * \param buf                 the data to write</span>
<a name="l00122"></a>00122 <span class="comment">   * \returns true iff sucessful</span>
<a name="l00123"></a>00123 <span class="comment">   */</span>
<a name="l00124"></a>00124   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a9aeb17081719fa96a28e640133e9dc5a" title="Write EEPROM on motherboard or any daughterboard.">write_eeprom</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keywordtype">int</span> eeprom_offset, <span class="keyword">const</span> std::string buf);
<a name="l00125"></a>00125 <span class="comment"></span>
<a name="l00126"></a>00126 <span class="comment">  /*!</span>
<a name="l00127"></a>00127 <span class="comment">   * \brief Read EEPROM on motherboard or any daughterboard.</span>
<a name="l00128"></a>00128 <span class="comment">   * \param i2c_addr            I2C bus address of EEPROM</span>
<a name="l00129"></a>00129 <span class="comment">   * \param eeprom_offset       byte offset in EEPROM to begin reading</span>
<a name="l00130"></a>00130 <span class="comment">   * \param len                 number of bytes to read</span>
<a name="l00131"></a>00131 <span class="comment">   * \returns the data read if successful, else a zero length string.</span>
<a name="l00132"></a>00132 <span class="comment">   */</span>
<a name="l00133"></a>00133   std::string <a class="code" href="classusrp__base.html#aae9b2540add7e6a98070eff0f657511d" title="Read EEPROM on motherboard or any daughterboard.">read_eeprom</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keywordtype">int</span> eeprom_offset, <span class="keywordtype">int</span> len);
<a name="l00134"></a>00134 <span class="comment"></span>
<a name="l00135"></a>00135 <span class="comment">  /*!</span>
<a name="l00136"></a>00136 <span class="comment">   * \brief Write to I2C peripheral</span>
<a name="l00137"></a>00137 <span class="comment">   * \param i2c_addr            I2C bus address (7-bits)</span>
<a name="l00138"></a>00138 <span class="comment">   * \param buf                 the data to write</span>
<a name="l00139"></a>00139 <span class="comment">   * \returns true iff successful</span>
<a name="l00140"></a>00140 <span class="comment">   * Writes are limited to a maximum of of 64 bytes.</span>
<a name="l00141"></a>00141 <span class="comment">   */</span>
<a name="l00142"></a>00142   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a5d5fcdd2af4e16d45d9b862b2f721ad9" title="Write to I2C peripheral.">write_i2c</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keyword">const</span> std::string buf);
<a name="l00143"></a>00143 <span class="comment"></span>
<a name="l00144"></a>00144 <span class="comment">  /*!</span>
<a name="l00145"></a>00145 <span class="comment">   * \brief Read from I2C peripheral</span>
<a name="l00146"></a>00146 <span class="comment">   * \param i2c_addr            I2C bus address (7-bits)</span>
<a name="l00147"></a>00147 <span class="comment">   * \param len                 number of bytes to read</span>
<a name="l00148"></a>00148 <span class="comment">   * \returns the data read if successful, else a zero length string.</span>
<a name="l00149"></a>00149 <span class="comment">   * Reads are limited to a maximum of 64 bytes.</span>
<a name="l00150"></a>00150 <span class="comment">   */</span>
<a name="l00151"></a>00151   std::string <a class="code" href="classusrp__base.html#af28754a9cc4e02e16112b571cc35c1e6" title="Read from I2C peripheral.">read_i2c</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keywordtype">int</span> len);
<a name="l00152"></a>00152 <span class="comment"></span>
<a name="l00153"></a>00153 <span class="comment">  /*!</span>
<a name="l00154"></a>00154 <span class="comment">   * \brief Set ADC offset correction</span>
<a name="l00155"></a>00155 <span class="comment">   * \param which_adc   which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...</span>
<a name="l00156"></a>00156 <span class="comment">   * \param offset      16-bit value to subtract from raw ADC input.</span>
<a name="l00157"></a>00157 <span class="comment">   */</span>
<a name="l00158"></a>00158   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a9cdc4e19aa2556e4f965f6452411f613" title="Set ADC offset correction.">set_adc_offset</a> (<span class="keywordtype">int</span> which_adc, <span class="keywordtype">int</span> offset);
<a name="l00159"></a>00159 <span class="comment"></span>
<a name="l00160"></a>00160 <span class="comment">  /*!</span>
<a name="l00161"></a>00161 <span class="comment">   * \brief Set DAC offset correction</span>
<a name="l00162"></a>00162 <span class="comment">   * \param which_dac   which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...</span>
<a name="l00163"></a>00163 <span class="comment">   * \param offset      10-bit offset value (ambiguous format:  See AD9862 datasheet).</span>
<a name="l00164"></a>00164 <span class="comment">   * \param offset_pin  1-bit value.  If 0 offset applied to -ve differential pin;</span>
<a name="l00165"></a>00165 <span class="comment">   *                                  If 1 offset applied to +ve differential pin.</span>
<a name="l00166"></a>00166 <span class="comment">   */</span>
<a name="l00167"></a>00167   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#acea0344a032d204813856e6f36dbb781" title="Set DAC offset correction.">set_dac_offset</a> (<span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> offset, <span class="keywordtype">int</span> offset_pin);
<a name="l00168"></a>00168 <span class="comment"></span>
<a name="l00169"></a>00169 <span class="comment">  /*!</span>
<a name="l00170"></a>00170 <span class="comment">   * \brief Control ADC input buffer</span>
<a name="l00171"></a>00171 <span class="comment">   * \param which_adc   which ADC[0,3]</span>
<a name="l00172"></a>00172 <span class="comment">   * \param bypass      if non-zero, bypass input buffer and connect input</span>
<a name="l00173"></a>00173 <span class="comment">   *                    directly to switched cap SHA input of RxPGA.</span>
<a name="l00174"></a>00174 <span class="comment">   */</span>
<a name="l00175"></a>00175   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#ada0d27d0d5e792a39b8a72d78aee78b1" title="Control ADC input buffer.">set_adc_buffer_bypass</a> (<span class="keywordtype">int</span> which_adc, <span class="keywordtype">bool</span> bypass);
<a name="l00176"></a>00176 <span class="comment"></span>
<a name="l00177"></a>00177 <span class="comment">  /*!</span>
<a name="l00178"></a>00178 <span class="comment">   * \brief Enable/disable automatic DC offset removal control loop in FPGA</span>
<a name="l00179"></a>00179 <span class="comment">   *</span>
<a name="l00180"></a>00180 <span class="comment">   * \param bits  which control loops to enable</span>
<a name="l00181"></a>00181 <span class="comment">   * \param mask  which \p bits to pay attention to</span>
<a name="l00182"></a>00182 <span class="comment">   *</span>
<a name="l00183"></a>00183 <span class="comment">   * If the corresponding bit is set, enable the automatic DC</span>
<a name="l00184"></a>00184 <span class="comment">   * offset correction control loop.</span>
<a name="l00185"></a>00185 <span class="comment">   *</span>
<a name="l00186"></a>00186 <span class="comment">   * &lt;pre&gt;</span>
<a name="l00187"></a>00187 <span class="comment">   * The 4 low bits are significant:</span>
<a name="l00188"></a>00188 <span class="comment">   *</span>
<a name="l00189"></a>00189 <span class="comment">   *   ADC0 = (1 &lt;&lt; 0)</span>
<a name="l00190"></a>00190 <span class="comment">   *   ADC1 = (1 &lt;&lt; 1)</span>
<a name="l00191"></a>00191 <span class="comment">   *   ADC2 = (1 &lt;&lt; 2)</span>
<a name="l00192"></a>00192 <span class="comment">   *   ADC3 = (1 &lt;&lt; 3)</span>
<a name="l00193"></a>00193 <span class="comment">   * &lt;/pre&gt;</span>
<a name="l00194"></a>00194 <span class="comment">   *</span>
<a name="l00195"></a>00195 <span class="comment">   * By default the control loop is enabled on all ADC&#39;s.</span>
<a name="l00196"></a>00196 <span class="comment">   */</span>
<a name="l00197"></a>00197   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a76785d2dfcbe9ffab380cb37480094a0" title="Enable/disable automatic DC offset removal control loop in FPGA.">set_dc_offset_cl_enable</a>(<span class="keywordtype">int</span> bits, <span class="keywordtype">int</span> mask);
<a name="l00198"></a>00198 <span class="comment"></span>
<a name="l00199"></a>00199 <span class="comment">  /*!</span>
<a name="l00200"></a>00200 <span class="comment">   * \brief return the usrp&#39;s serial number.</span>
<a name="l00201"></a>00201 <span class="comment">   *</span>
<a name="l00202"></a>00202 <span class="comment">   * \returns non-zero length string iff successful.</span>
<a name="l00203"></a>00203 <span class="comment">   */</span>
<a name="l00204"></a>00204   std::string <a class="code" href="classusrp__base.html#ae4c4e3153e0a8c8be943427f3cea8e7a" title="return the usrp&amp;#39;s serial number.">serial_number</a>();
<a name="l00205"></a>00205 <span class="comment"></span>
<a name="l00206"></a>00206 <span class="comment">  /*!</span>
<a name="l00207"></a>00207 <span class="comment">   * \brief Return daughterboard ID for given side [0,1].</span>
<a name="l00208"></a>00208 <span class="comment">   *</span>
<a name="l00209"></a>00209 <span class="comment">   * \param which_side  [0,1] which daughterboard</span>
<a name="l00210"></a>00210 <span class="comment">   *</span>
<a name="l00211"></a>00211 <span class="comment">   * \return daughterboard id &gt;= 0 if successful</span>
<a name="l00212"></a>00212 <span class="comment">   * \return -1 if no daugherboard</span>
<a name="l00213"></a>00213 <span class="comment">   * \return -2 if invalid EEPROM on daughterboard</span>
<a name="l00214"></a>00214 <span class="comment">   */</span>
<a name="l00215"></a>00215   <span class="keyword">virtual</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__base.html#a13688f5471fd3fe48ac66738b879ad5c" title="Return daughterboard ID for given side [0,1].">daughterboard_id</a> (<span class="keywordtype">int</span> which_side) <span class="keyword">const</span>;
<a name="l00216"></a>00216 <span class="comment"></span>
<a name="l00217"></a>00217 <span class="comment">  /*!</span>
<a name="l00218"></a>00218 <span class="comment">   * \brief Clock ticks to delay rising of T/R signal</span>
<a name="l00219"></a>00219 <span class="comment">   * \sa write_atr_mask, write_atr_txval, write_atr_rxval</span>
<a name="l00220"></a>00220 <span class="comment">   */</span>
<a name="l00221"></a>00221   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#ab7c20403b12e1c3d672f386fbe6e8fa7" title="Clock ticks to delay rising of T/R signal.">write_atr_tx_delay</a>(<span class="keywordtype">int</span> value);
<a name="l00222"></a>00222 <span class="comment"></span>
<a name="l00223"></a>00223 <span class="comment">  /*!</span>
<a name="l00224"></a>00224 <span class="comment">   * \brief Clock ticks to delay falling edge of T/R signal</span>
<a name="l00225"></a>00225 <span class="comment">   * \sa write_atr_mask, write_atr_txval, write_atr_rxval</span>
<a name="l00226"></a>00226 <span class="comment">   */</span>
<a name="l00227"></a>00227   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a08493c5d327ffe70afdf94e814aa9092" title="Clock ticks to delay falling edge of T/R signal.">write_atr_rx_delay</a>(<span class="keywordtype">int</span> value);
<a name="l00228"></a>00228 <span class="comment"></span>
<a name="l00229"></a>00229 <span class="comment">  /*!</span>
<a name="l00230"></a>00230 <span class="comment">   * \brief Set Programmable Gain Amplifier (PGA)</span>
<a name="l00231"></a>00231 <span class="comment">   *</span>
<a name="l00232"></a>00232 <span class="comment">   * \param which_amp   which amp [0,3]</span>
<a name="l00233"></a>00233 <span class="comment">   * \param gain_in_db  gain value (linear in dB)</span>
<a name="l00234"></a>00234 <span class="comment">   *</span>
<a name="l00235"></a>00235 <span class="comment">   * gain is rounded to closest setting supported by hardware.</span>
<a name="l00236"></a>00236 <span class="comment">   *</span>
<a name="l00237"></a>00237 <span class="comment">   * \returns true iff sucessful.</span>
<a name="l00238"></a>00238 <span class="comment">   *</span>
<a name="l00239"></a>00239 <span class="comment">   * \sa pga_min(), pga_max(), pga_db_per_step()</span>
<a name="l00240"></a>00240 <span class="comment">   */</span>
<a name="l00241"></a>00241   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#ab62fd985de42e9404bbcd0b728186af0" title="Set Programmable Gain Amplifier (PGA)">set_pga</a> (<span class="keywordtype">int</span> which_amp, <span class="keywordtype">double</span> gain_in_db);
<a name="l00242"></a>00242 <span class="comment"></span>
<a name="l00243"></a>00243 <span class="comment">  /*!</span>
<a name="l00244"></a>00244 <span class="comment">   * \brief Return programmable gain amplifier gain setting in dB.</span>
<a name="l00245"></a>00245 <span class="comment">   *</span>
<a name="l00246"></a>00246 <span class="comment">   * \param which_amp   which amp [0,3]</span>
<a name="l00247"></a>00247 <span class="comment">   */</span>
<a name="l00248"></a>00248   <span class="keywordtype">double</span> <a class="code" href="classusrp__base.html#abfbb58de567e58af22f16ff4083dde3b" title="Return programmable gain amplifier gain setting in dB.">pga</a> (<span class="keywordtype">int</span> which_amp) <span class="keyword">const</span>;
<a name="l00249"></a>00249 <span class="comment"></span>
<a name="l00250"></a>00250 <span class="comment">  /*!</span>
<a name="l00251"></a>00251 <span class="comment">   * \brief Return minimum legal PGA gain in dB.</span>
<a name="l00252"></a>00252 <span class="comment">   */</span>
<a name="l00253"></a>00253   <span class="keywordtype">double</span> <a class="code" href="classusrp__base.html#a90754c12fcf8735c90fe9991bbbe7ea9" title="Return minimum legal PGA gain in dB.">pga_min</a> () <span class="keyword">const</span>;
<a name="l00254"></a>00254 <span class="comment"></span>
<a name="l00255"></a>00255 <span class="comment">  /*!</span>
<a name="l00256"></a>00256 <span class="comment">   * \brief Return maximum legal PGA gain in dB.</span>
<a name="l00257"></a>00257 <span class="comment">   */</span>
<a name="l00258"></a>00258   <span class="keywordtype">double</span> <a class="code" href="classusrp__base.html#a545bdec261ae9781e2122212f67603d3" title="Return maximum legal PGA gain in dB.">pga_max</a> () <span class="keyword">const</span>;
<a name="l00259"></a>00259 <span class="comment"></span>
<a name="l00260"></a>00260 <span class="comment">  /*!</span>
<a name="l00261"></a>00261 <span class="comment">   * \brief Return hardware step size of PGA (linear in dB).</span>
<a name="l00262"></a>00262 <span class="comment">   */</span>
<a name="l00263"></a>00263   <span class="keywordtype">double</span> <a class="code" href="classusrp__base.html#afd3b0eea695796add6f25066552d0a0d" title="Return hardware step size of PGA (linear in dB).">pga_db_per_step</a> () <span class="keyword">const</span>;
<a name="l00264"></a>00264 <span class="comment"></span>
<a name="l00265"></a>00265 <span class="comment">  /*!</span>
<a name="l00266"></a>00266 <span class="comment">   * \brief Write direction register (output enables) for pins that go to daughterboard.</span>
<a name="l00267"></a>00267 <span class="comment">   *</span>
<a name="l00268"></a>00268 <span class="comment">   * \param which_side  [0,1] which size</span>
<a name="l00269"></a>00269 <span class="comment">   * \param value       value to write into register</span>
<a name="l00270"></a>00270 <span class="comment">   * \param mask        which bits of value to write into reg</span>
<a name="l00271"></a>00271 <span class="comment">   *</span>
<a name="l00272"></a>00272 <span class="comment">   * Each d&#39;board has 16-bits of general purpose i/o.</span>
<a name="l00273"></a>00273 <span class="comment">   * Setting the bit makes it an output from the FPGA to the d&#39;board.</span>
<a name="l00274"></a>00274 <span class="comment">   *</span>
<a name="l00275"></a>00275 <span class="comment">   * This register is initialized based on a value stored in the</span>
<a name="l00276"></a>00276 <span class="comment">   * d&#39;board EEPROM.  In general, you shouldn&#39;t be using this routine</span>
<a name="l00277"></a>00277 <span class="comment">   * without a very good reason.  Using this method incorrectly will</span>
<a name="l00278"></a>00278 <span class="comment">   * kill your USRP motherboard and/or daughterboard.</span>
<a name="l00279"></a>00279 <span class="comment">   */</span>
<a name="l00280"></a>00280   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a2ca3c433f29876b1f480ab0fad1d16d3" title="Write direction register (output enables) for pins that go to daughterboard.">_write_oe</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00281"></a>00281 <span class="comment"></span>
<a name="l00282"></a>00282 <span class="comment">  /*!</span>
<a name="l00283"></a>00283 <span class="comment">   * \brief Write daughterboard i/o pin value</span>
<a name="l00284"></a>00284 <span class="comment">   *</span>
<a name="l00285"></a>00285 <span class="comment">   * \param which_side  [0,1] which d&#39;board</span>
<a name="l00286"></a>00286 <span class="comment">   * \param value       value to write into register</span>
<a name="l00287"></a>00287 <span class="comment">   * \param mask        which bits of value to write into reg</span>
<a name="l00288"></a>00288 <span class="comment">   */</span>
<a name="l00289"></a>00289   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#ad67d8025f46a96f6206d2e066b75a77c" title="Write daughterboard i/o pin value.">write_io</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00290"></a>00290 <span class="comment"></span>
<a name="l00291"></a>00291 <span class="comment">  /*!</span>
<a name="l00292"></a>00292 <span class="comment">   * \brief Read daughterboard i/o pin value</span>
<a name="l00293"></a>00293 <span class="comment">   *</span>
<a name="l00294"></a>00294 <span class="comment">   * \param which_side  [0,1] which d&#39;board</span>
<a name="l00295"></a>00295 <span class="comment">   * \returns register value if successful, else READ_FAILED</span>
<a name="l00296"></a>00296 <span class="comment">   */</span>
<a name="l00297"></a>00297   <span class="keywordtype">int</span> <a class="code" href="classusrp__base.html#a026ecc14a69ccc684479e39c7fac29ac" title="Read daughterboard i/o pin value.">read_io</a> (<span class="keywordtype">int</span> which_side);
<a name="l00298"></a>00298 <span class="comment"></span>
<a name="l00299"></a>00299 <span class="comment">  /*!</span>
<a name="l00300"></a>00300 <span class="comment">   * \brief Write daughterboard refclk config register</span>
<a name="l00301"></a>00301 <span class="comment">   *</span>
<a name="l00302"></a>00302 <span class="comment">   * \param which_side  [0,1] which d&#39;board</span>
<a name="l00303"></a>00303 <span class="comment">   * \param value       value to write into register, see below</span>
<a name="l00304"></a>00304 <span class="comment">   *</span>
<a name="l00305"></a>00305 <span class="comment">   * &lt;pre&gt;</span>
<a name="l00306"></a>00306 <span class="comment">   * Control whether a reference clock is sent to the daughterboards,</span>
<a name="l00307"></a>00307 <span class="comment">   * and what frequency.  The refclk is sent on d&#39;board i/o pin 0.</span>
<a name="l00308"></a>00308 <span class="comment">   * </span>
<a name="l00309"></a>00309 <span class="comment">   *     3                   2                   1                       </span>
<a name="l00310"></a>00310 <span class="comment">   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0</span>
<a name="l00311"></a>00311 <span class="comment">   *  +-----------------------------------------------+-+------------+</span>
<a name="l00312"></a>00312 <span class="comment">   *  |             Reserved (Must be zero)           |E|   DIVISOR  |</span>
<a name="l00313"></a>00313 <span class="comment">   *  +-----------------------------------------------+-+------------+</span>
<a name="l00314"></a>00314 <span class="comment">   * </span>
<a name="l00315"></a>00315 <span class="comment">   *  Bit 7  -- 1 turns on refclk, 0 allows IO use</span>
<a name="l00316"></a>00316 <span class="comment">   *  Bits 6:0 Divider value</span>
<a name="l00317"></a>00317 <span class="comment">   * &lt;/pre&gt;</span>
<a name="l00318"></a>00318 <span class="comment">   */</span>
<a name="l00319"></a>00319   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a00599c4d08010481f4db7254f1135f48" title="Write daughterboard refclk config register.">write_refclk</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00320"></a>00320 
<a name="l00321"></a>00321   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#ac55d0d482f4f489cd983ec5a8446968a">write_atr_mask</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00322"></a>00322   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#aaf04ba05b35db8a0ec6e73bd6be2708c">write_atr_txval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00323"></a>00323   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a46fe4d6b66cde8b52f7a3a9dc69974bb">write_atr_rxval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00324"></a>00324 <span class="comment"></span>
<a name="l00325"></a>00325 <span class="comment">  /*!</span>
<a name="l00326"></a>00326 <span class="comment">   * \brief Write auxiliary digital to analog converter.</span>
<a name="l00327"></a>00327 <span class="comment">   *</span>
<a name="l00328"></a>00328 <span class="comment">   * \param which_side  [0,1] which d&#39;board</span>
<a name="l00329"></a>00329 <span class="comment">   *                    N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC&#39;s.</span>
<a name="l00330"></a>00330 <span class="comment">   *                    SLOT_TX_B and SLOT_RX_B share the same AUX DAC&#39;s.</span>
<a name="l00331"></a>00331 <span class="comment">   * \param which_dac   [2,3] TX slots must use only 2 and 3.</span>
<a name="l00332"></a>00332 <span class="comment">   * \param value       [0,4095]</span>
<a name="l00333"></a>00333 <span class="comment">   * \returns true iff successful</span>
<a name="l00334"></a>00334 <span class="comment">   */</span>
<a name="l00335"></a>00335   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a2e92aee3eb6019e0593537162930b3b3" title="Write auxiliary digital to analog converter.">write_aux_dac</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> value);
<a name="l00336"></a>00336 <span class="comment"></span>
<a name="l00337"></a>00337 <span class="comment">  /*!</span>
<a name="l00338"></a>00338 <span class="comment">   * \brief Read auxiliary analog to digital converter.</span>
<a name="l00339"></a>00339 <span class="comment">   *</span>
<a name="l00340"></a>00340 <span class="comment">   * \param which_side  [0,1] which d&#39;board</span>
<a name="l00341"></a>00341 <span class="comment">   * \param which_adc   [0,1]</span>
<a name="l00342"></a>00342 <span class="comment">   * \returns value in the range [0,4095] if successful, else READ_FAILED.</span>
<a name="l00343"></a>00343 <span class="comment">   */</span>
<a name="l00344"></a>00344   <span class="keywordtype">int</span> <a class="code" href="classusrp__base.html#ae4401c31c817f38c94285840c1c5d332" title="Read auxiliary analog to digital converter.">read_aux_adc</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc);
<a name="l00345"></a>00345 <span class="comment"></span>
<a name="l00346"></a>00346 <span class="comment">  /*!</span>
<a name="l00347"></a>00347 <span class="comment">   * \brief returns A/D or D/A converter rate in Hz</span>
<a name="l00348"></a>00348 <span class="comment">   */</span>
<a name="l00349"></a>00349   <span class="keywordtype">long</span> <a class="code" href="classusrp__base.html#a4d9437597a0765bb108d4edb4a214a59" title="returns A/D or D/A converter rate in Hz">converter_rate</a>() <span class="keyword">const</span>;
<a name="l00350"></a>00350 
<a name="l00351"></a>00351 
<a name="l00352"></a>00352   <span class="comment">// ----------------------------------------------------------------</span>
<a name="l00353"></a>00353   <span class="comment">// Low level implementation routines.</span>
<a name="l00354"></a>00354   <span class="comment">// You probably shouldn&#39;t be using these...</span>
<a name="l00355"></a>00355   <span class="comment">//</span>
<a name="l00356"></a>00356 
<a name="l00357"></a>00357   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a8e1b09413d341b59ca57d85509a48041">_set_led</a> (<span class="keywordtype">int</span> which_led, <span class="keywordtype">bool</span> on);
<a name="l00358"></a>00358 <span class="comment"></span>
<a name="l00359"></a>00359 <span class="comment">  /*!</span>
<a name="l00360"></a>00360 <span class="comment">   * \brief Write FPGA register.</span>
<a name="l00361"></a>00361 <span class="comment">   * \param regno       7-bit register number</span>
<a name="l00362"></a>00362 <span class="comment">   * \param value       32-bit value</span>
<a name="l00363"></a>00363 <span class="comment">   * \returns true iff successful</span>
<a name="l00364"></a>00364 <span class="comment">   */</span>
<a name="l00365"></a>00365   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a3b90832c8b58bebd9372b29119583880" title="Write FPGA register.">_write_fpga_reg</a> (<span class="keywordtype">int</span> regno, <span class="keywordtype">int</span> value);  <span class="comment">//&lt; 7-bit regno, 32-bit value</span>
<a name="l00366"></a>00366 <span class="comment"></span>
<a name="l00367"></a>00367 <span class="comment">  /*!</span>
<a name="l00368"></a>00368 <span class="comment">   * \brief Read FPGA register.</span>
<a name="l00369"></a>00369 <span class="comment">   * \param regno       7-bit register number</span>
<a name="l00370"></a>00370 <span class="comment">   * \param value       32-bit value</span>
<a name="l00371"></a>00371 <span class="comment">   * \returns true iff successful</span>
<a name="l00372"></a>00372 <span class="comment">   */</span>
<a name="l00373"></a>00373   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a8828d4f70099bc51b5bfbfe67efd8a38" title="Read FPGA register.">_read_fpga_reg</a> (<span class="keywordtype">int</span> regno, <span class="keywordtype">int</span> *value);  <span class="comment">//&lt; 7-bit regno, 32-bit value</span>
<a name="l00374"></a>00374 <span class="comment"></span>
<a name="l00375"></a>00375 <span class="comment">  /*!</span>
<a name="l00376"></a>00376 <span class="comment">   * \brief Read FPGA register.</span>
<a name="l00377"></a>00377 <span class="comment">   * \param regno       7-bit register number</span>
<a name="l00378"></a>00378 <span class="comment">   * \returns register value if successful, else READ_FAILED</span>
<a name="l00379"></a>00379 <span class="comment">   */</span>
<a name="l00380"></a>00380   <span class="keywordtype">int</span>  <a class="code" href="classusrp__base.html#a8828d4f70099bc51b5bfbfe67efd8a38" title="Read FPGA register.">_read_fpga_reg</a> (<span class="keywordtype">int</span> regno);
<a name="l00381"></a>00381 <span class="comment"></span>
<a name="l00382"></a>00382 <span class="comment">  /*!</span>
<a name="l00383"></a>00383 <span class="comment">   * \brief Write FPGA register with mask.</span>
<a name="l00384"></a>00384 <span class="comment">   * \param regno       7-bit register number</span>
<a name="l00385"></a>00385 <span class="comment">   * \param value       16-bit value</span>
<a name="l00386"></a>00386 <span class="comment">   * \param mask        16-bit value</span>
<a name="l00387"></a>00387 <span class="comment">   * \returns true if successful</span>
<a name="l00388"></a>00388 <span class="comment">   * Only use this for registers who actually implement a mask in the verilog firmware, like FR_RX_MASTER_SLAVE</span>
<a name="l00389"></a>00389 <span class="comment">   */</span>
<a name="l00390"></a>00390   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#abd64d521f2583f50b1860ee90ca8291c" title="Write FPGA register with mask.">_write_fpga_reg_masked</a> (<span class="keywordtype">int</span> regno, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00391"></a>00391 <span class="comment"></span>
<a name="l00392"></a>00392 <span class="comment">  /*!</span>
<a name="l00393"></a>00393 <span class="comment">   * \brief Write AD9862 register.</span>
<a name="l00394"></a>00394 <span class="comment">   * \param which_codec 0 or 1</span>
<a name="l00395"></a>00395 <span class="comment">   * \param regno       6-bit register number</span>
<a name="l00396"></a>00396 <span class="comment">   * \param value       8-bit value</span>
<a name="l00397"></a>00397 <span class="comment">   * \returns true iff successful</span>
<a name="l00398"></a>00398 <span class="comment">   */</span>
<a name="l00399"></a>00399   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#a269fbb5a5dc3925c85d2512c14ea58c5" title="Write AD9862 register.">_write_9862</a> (<span class="keywordtype">int</span> which_codec, <span class="keywordtype">int</span> regno, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> value);
<a name="l00400"></a>00400 <span class="comment"></span>
<a name="l00401"></a>00401 <span class="comment">  /*!</span>
<a name="l00402"></a>00402 <span class="comment">   * \brief Read AD9862 register.</span>
<a name="l00403"></a>00403 <span class="comment">   * \param which_codec 0 or 1</span>
<a name="l00404"></a>00404 <span class="comment">   * \param regno       6-bit register number</span>
<a name="l00405"></a>00405 <span class="comment">   * \returns register value if successful, else READ_FAILED</span>
<a name="l00406"></a>00406 <span class="comment">   */</span>
<a name="l00407"></a>00407   <span class="keywordtype">int</span>  <a class="code" href="classusrp__base.html#a3dffad1d9abee16832cb4b93ed6e215b" title="Read AD9862 register.">_read_9862</a> (<span class="keywordtype">int</span> which_codec, <span class="keywordtype">int</span> regno) <span class="keyword">const</span>;
<a name="l00408"></a>00408 <span class="comment"></span>
<a name="l00409"></a>00409 <span class="comment">  /*!</span>
<a name="l00410"></a>00410 <span class="comment">   * \brief Write data to SPI bus peripheral.</span>
<a name="l00411"></a>00411 <span class="comment">   *</span>
<a name="l00412"></a>00412 <span class="comment">   * \param optional_header     0,1 or 2 bytes to write before buf.</span>
<a name="l00413"></a>00413 <span class="comment">   * \param enables             bitmask of peripherals to write. See usrp_spi_defs.h</span>
<a name="l00414"></a>00414 <span class="comment">   * \param format              transaction format.  See usrp_spi_defs.h SPI_FMT_*</span>
<a name="l00415"></a>00415 <span class="comment">   * \param buf                 the data to write</span>
<a name="l00416"></a>00416 <span class="comment">   * \returns true iff successful</span>
<a name="l00417"></a>00417 <span class="comment">   * Writes are limited to a maximum of 64 bytes.</span>
<a name="l00418"></a>00418 <span class="comment">   *</span>
<a name="l00419"></a>00419 <span class="comment">   * If \p format specifies that optional_header bytes are present, they are</span>
<a name="l00420"></a>00420 <span class="comment">   * written to the peripheral immediately prior to writing \p buf.</span>
<a name="l00421"></a>00421 <span class="comment">   */</span>
<a name="l00422"></a>00422   <span class="keywordtype">bool</span> <a class="code" href="classusrp__base.html#aef540d3249b7b319b56d8035772080cd" title="Write data to SPI bus peripheral.">_write_spi</a> (<span class="keywordtype">int</span> optional_header, <span class="keywordtype">int</span> enables, <span class="keywordtype">int</span> format, std::string buf);
<a name="l00423"></a>00423 
<a name="l00424"></a>00424   <span class="comment">/*</span>
<a name="l00425"></a>00425 <span class="comment">   * \brief Read data from SPI bus peripheral.</span>
<a name="l00426"></a>00426 <span class="comment">   *</span>
<a name="l00427"></a>00427 <span class="comment">   * \param optional_header     0,1 or 2 bytes to write before buf.</span>
<a name="l00428"></a>00428 <span class="comment">   * \param enables             bitmask of peripheral to read. See usrp_spi_defs.h</span>
<a name="l00429"></a>00429 <span class="comment">   * \param format              transaction format.  See usrp_spi_defs.h SPI_FMT_*</span>
<a name="l00430"></a>00430 <span class="comment">   * \param len                 number of bytes to read.  Must be in [0,64].</span>
<a name="l00431"></a>00431 <span class="comment">   * \returns the data read if sucessful, else a zero length string.</span>
<a name="l00432"></a>00432 <span class="comment">   *</span>
<a name="l00433"></a>00433 <span class="comment">   * Reads are limited to a maximum of 64 bytes.</span>
<a name="l00434"></a>00434 <span class="comment">   *</span>
<a name="l00435"></a>00435 <span class="comment">   * If \p format specifies that optional_header bytes are present, they</span>
<a name="l00436"></a>00436 <span class="comment">   * are written to the peripheral first.  Then \p len bytes are read from</span>
<a name="l00437"></a>00437 <span class="comment">   * the peripheral and returned.</span>
<a name="l00438"></a>00438 <span class="comment">   */</span>
<a name="l00439"></a>00439   std::string <a class="code" href="classusrp__base.html#abbf9428906a60ef12d9caf1a5d85ca26">_read_spi</a> (<span class="keywordtype">int</span> optional_header, <span class="keywordtype">int</span> enables, <span class="keywordtype">int</span> format, <span class="keywordtype">int</span> len);
<a name="l00440"></a>00440 <span class="comment"></span>
<a name="l00441"></a>00441 <span class="comment">  /*!</span>
<a name="l00442"></a>00442 <span class="comment">   * Return an existing daughterboard from list of candidate dbids, or the first found</span>
<a name="l00443"></a>00443 <span class="comment">   * on side A or side B.</span>
<a name="l00444"></a>00444 <span class="comment">   *</span>
<a name="l00445"></a>00445 <span class="comment">   * \param candidates          Vector of candidate dbids</span>
<a name="l00446"></a>00446 <span class="comment">   * </span>
<a name="l00447"></a>00447 <span class="comment">   * Throws std::runtime_error if not found</span>
<a name="l00448"></a>00448 <span class="comment">   */</span>
<a name="l00449"></a>00449   <a class="code" href="structusrp__subdev__spec.html" title="specify a daughterboard and subdevice on a daughterboard.">usrp_subdev_spec</a> <a class="code" href="classusrp__base.html#addca06bac380d27ae98676e14cd63d9c">pick_subdev</a>(<a class="code" href="classstd_1_1vector.html">std::vector&lt;int&gt;</a> candidates=<a class="code" href="classstd_1_1vector.html">std::vector&lt;int&gt;</a>(0));
<a name="l00450"></a>00450 };
<a name="l00451"></a>00451 
<a name="l00452"></a>00452 <span class="preprocessor">#endif </span><span class="comment">/* INCLUDED_USRP_BASE_H */</span>
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