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<h1>usrp_basic.h</h1> </div>
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<a href="usrp__basic_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span class="comment">/* -*- c++ -*- */</span>
<a name="l00002"></a>00002 <span class="comment">/*</span>
<a name="l00003"></a>00003 <span class="comment"> * Copyright 2003,2004,2008 Free Software Foundation, Inc.</span>
<a name="l00004"></a>00004 <span class="comment"> * </span>
<a name="l00005"></a>00005 <span class="comment"> * This file is part of GNU Radio</span>
<a name="l00006"></a>00006 <span class="comment"> * </span>
<a name="l00007"></a>00007 <span class="comment"> * GNU Radio is free software; you can redistribute it and/or modify</span>
<a name="l00008"></a>00008 <span class="comment"> * it under the terms of the GNU General Public License as published by</span>
<a name="l00009"></a>00009 <span class="comment"> * the Free Software Foundation; either version 3, or (at your option)</span>
<a name="l00010"></a>00010 <span class="comment"> * any later version.</span>
<a name="l00011"></a>00011 <span class="comment"> * </span>
<a name="l00012"></a>00012 <span class="comment"> * GNU Radio is distributed in the hope that it will be useful,</span>
<a name="l00013"></a>00013 <span class="comment"> * but WITHOUT ANY WARRANTY; without even the implied warranty of</span>
<a name="l00014"></a>00014 <span class="comment"> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span>
<a name="l00015"></a>00015 <span class="comment"> * GNU General Public License for more details.</span>
<a name="l00016"></a>00016 <span class="comment"> * </span>
<a name="l00017"></a>00017 <span class="comment"> * You should have received a copy of the GNU General Public License</span>
<a name="l00018"></a>00018 <span class="comment"> * along with GNU Radio; see the file COPYING. If not, write to</span>
<a name="l00019"></a>00019 <span class="comment"> * the Free Software Foundation, Inc., 51 Franklin Street,</span>
<a name="l00020"></a>00020 <span class="comment"> * Boston, MA 02110-1301, USA.</span>
<a name="l00021"></a>00021 <span class="comment"> */</span>
<a name="l00022"></a>00022
<a name="l00023"></a>00023 <span class="comment">/*</span>
<a name="l00024"></a>00024 <span class="comment"> * ----------------------------------------------------------------------</span>
<a name="l00025"></a>00025 <span class="comment"> * Mid level interface to the Universal Software Radio Peripheral (Rev 1)</span>
<a name="l00026"></a>00026 <span class="comment"> *</span>
<a name="l00027"></a>00027 <span class="comment"> * These classes implement the basic functionality for talking to the</span>
<a name="l00028"></a>00028 <span class="comment"> * USRP. They try to be as independent of the signal processing code</span>
<a name="l00029"></a>00029 <span class="comment"> * in FPGA as possible. They implement access to the low level</span>
<a name="l00030"></a>00030 <span class="comment"> * peripherals on the board, provide a common way for reading and</span>
<a name="l00031"></a>00031 <span class="comment"> * writing registers in the FPGA, and provide the high speed interface</span>
<a name="l00032"></a>00032 <span class="comment"> * to streaming data across the USB.</span>
<a name="l00033"></a>00033 <span class="comment"> *</span>
<a name="l00034"></a>00034 <span class="comment"> * It is expected that subclasses will be derived that provide</span>
<a name="l00035"></a>00035 <span class="comment"> * access to the functionality to a particular FPGA configuration.</span>
<a name="l00036"></a>00036 <span class="comment"> * ----------------------------------------------------------------------</span>
<a name="l00037"></a>00037 <span class="comment"> */</span>
<a name="l00038"></a>00038
<a name="l00039"></a>00039 <span class="preprocessor">#ifndef INCLUDED_USRP_BASIC_H</span>
<a name="l00040"></a>00040 <span class="preprocessor"></span><span class="preprocessor">#define INCLUDED_USRP_BASIC_H</span>
<a name="l00041"></a>00041 <span class="preprocessor"></span>
<a name="l00042"></a>00042 <span class="preprocessor">#include <<a class="code" href="db__base_8h.html">db_base.h</a>></span>
<a name="l00043"></a>00043 <span class="preprocessor">#include <<a class="code" href="usrp__slots_8h.html">usrp_slots.h</a>></span>
<a name="l00044"></a>00044 <span class="preprocessor">#include <string></span>
<a name="l00045"></a>00045 <span class="preprocessor">#include <vector></span>
<a name="l00046"></a>00046 <span class="preprocessor">#include <boost/utility.hpp></span>
<a name="l00047"></a>00047 <span class="preprocessor">#include <<a class="code" href="usrp__subdev__spec_8h.html">usrp_subdev_spec.h</a>></span>
<a name="l00048"></a>00048
<a name="l00049"></a>00049 <span class="keyword">struct </span><a class="code" href="structusb__dev__handle.html">usb_dev_handle</a>;
<a name="l00050"></a>00050 <span class="keyword">class </span><a class="code" href="classfusb__devhandle.html" title="abstract usb device handle">fusb_devhandle</a>;
<a name="l00051"></a>00051 <span class="keyword">class </span><a class="code" href="classfusb__ephandle.html" title="abstract usb end point handle">fusb_ephandle</a>;
<a name="l00052"></a>00052
<a name="l00053"></a><a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">00053</a> <span class="keyword">enum</span> <a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> {
<a name="l00054"></a><a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">00054</a> <a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a> = 0,
<a name="l00055"></a><a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a9228bc40e4bcfb1b7363f686515e1846">00055</a> <a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a9228bc40e4bcfb1b7363f686515e1846">C_TX</a> = 1
<a name="l00056"></a>00056 };
<a name="l00057"></a>00057 <span class="comment"></span>
<a name="l00058"></a>00058 <span class="comment">/*!</span>
<a name="l00059"></a>00059 <span class="comment"> * \brief abstract base class for usrp operations</span>
<a name="l00060"></a>00060 <span class="comment"> * \ingroup usrp</span>
<a name="l00061"></a>00061 <span class="comment"> */</span>
<a name="l00062"></a><a class="code" href="classusrp__basic.html">00062</a> <span class="keyword">class </span><a class="code" href="classusrp__basic.html" title="abstract base class for usrp operations">usrp_basic</a> : boost::noncopyable
<a name="l00063"></a>00063 {
<a name="l00064"></a>00064 <span class="keyword">protected</span>:
<a name="l00065"></a>00065 <span class="keywordtype">void</span> <a class="code" href="classusrp__basic.html#afaae41796f1468062d4ad237322baf9e">shutdown_daughterboards</a>();
<a name="l00066"></a>00066
<a name="l00067"></a>00067 <span class="keyword">protected</span>:
<a name="l00068"></a><a class="code" href="classusrp__basic.html#a10536cd0fe631c3a1084c0404873ad5b">00068</a> <span class="keyword">struct </span><a class="code" href="structusb__dev__handle.html">usb_dev_handle</a> *<a class="code" href="classusrp__basic.html#a10536cd0fe631c3a1084c0404873ad5b">d_udh</a>;
<a name="l00069"></a><a class="code" href="classusrp__basic.html#a4e5297f0010c8f39cfe4fff838b113a4">00069</a> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a4e5297f0010c8f39cfe4fff838b113a4">d_usb_data_rate</a>; <span class="comment">// bytes/sec</span>
<a name="l00070"></a><a class="code" href="classusrp__basic.html#a1d6b6839b9ba385d93684c3497c3fb16">00070</a> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a1d6b6839b9ba385d93684c3497c3fb16">d_bytes_per_poll</a>; <span class="comment">// how often to poll for overruns</span>
<a name="l00071"></a><a class="code" href="classusrp__basic.html#a6d0fecbe64f35fef20293c27dc33a0b0">00071</a> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a6d0fecbe64f35fef20293c27dc33a0b0">d_verbose</a>;
<a name="l00072"></a><a class="code" href="classusrp__basic.html#afa81d2ee842dd6eef04c422276f52d1d">00072</a> <span class="keywordtype">long</span> <a class="code" href="classusrp__basic.html#afa81d2ee842dd6eef04c422276f52d1d">d_fpga_master_clock_freq</a>;
<a name="l00073"></a>00073
<a name="l00074"></a><a class="code" href="classusrp__basic.html#ae9277f41b745b1c96c422804fafd058a">00074</a> <span class="keyword">static</span> <span class="keyword">const</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#ae9277f41b745b1c96c422804fafd058a">MAX_REGS</a> = 128;
<a name="l00075"></a><a class="code" href="classusrp__basic.html#af3d08c8bcdd0ed116e76ffa5449004f2">00075</a> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#af3d08c8bcdd0ed116e76ffa5449004f2">d_fpga_shadows</a>[<a class="code" href="classusrp__basic.html#ae9277f41b745b1c96c422804fafd058a">MAX_REGS</a>];
<a name="l00076"></a>00076
<a name="l00077"></a><a class="code" href="classusrp__basic.html#a686ea66e3f43c9ab6df60bd80f41ac3b">00077</a> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a686ea66e3f43c9ab6df60bd80f41ac3b">d_dbid</a>[2]; <span class="comment">// daughterboard ID's (side A, side B)</span>
<a name="l00078"></a>00078 <span class="comment"></span>
<a name="l00079"></a>00079 <span class="comment"> /*!</span>
<a name="l00080"></a>00080 <span class="comment"> * Shared pointers to subclasses of db_base.</span>
<a name="l00081"></a>00081 <span class="comment"> *</span>
<a name="l00082"></a>00082 <span class="comment"> * The outer vector is of length 2 (0 = side A, 1 = side B). The</span>
<a name="l00083"></a>00083 <span class="comment"> * inner vectors are of length 1, 2 or 3 depending on the number of</span>
<a name="l00084"></a>00084 <span class="comment"> * subdevices implemented by the daugherboard. At this time, only</span>
<a name="l00085"></a>00085 <span class="comment"> * the Basic Rx and LF Rx implement more than 1 subdevice.</span>
<a name="l00086"></a>00086 <span class="comment"> */</span>
<a name="l00087"></a><a class="code" href="classusrp__basic.html#aa45df525ed16ee0c885a4972ac7908b4">00087</a> <a class="code" href="classstd_1_1vector.html" title="vector documentation stub">std::vector< std::vector<db_base_sptr></a> > <a class="code" href="classusrp__basic.html#aa45df525ed16ee0c885a4972ac7908b4">d_db</a>;
<a name="l00088"></a>00088 <span class="comment"></span>
<a name="l00089"></a>00089 <span class="comment"> //! One time call, made only only from usrp_standard_*::make after shared_ptr is created.</span>
<a name="l00090"></a>00090 <span class="comment"></span> <span class="keywordtype">void</span> <a class="code" href="classusrp__basic.html#a9d4d1ef184ad622c7f84a6f940614b9b" title="One time call, made only only from usrp_standard_*::make after shared_ptr is created.">init_db</a>(<a class="code" href="classboost_1_1shared__ptr.html">usrp_basic_sptr</a> u);
<a name="l00091"></a>00091
<a name="l00092"></a>00092
<a name="l00093"></a>00093 <a class="code" href="classusrp__basic.html#ab81b0e66f94e4b4310925eab149ffdea">usrp_basic</a> (<span class="keywordtype">int</span> which_board,
<a name="l00094"></a>00094 <span class="keyword">struct</span> <a class="code" href="structusb__dev__handle.html">usb_dev_handle</a> *open_interface (<span class="keyword">struct</span> usb_device *dev),
<a name="l00095"></a>00095 <span class="keyword">const</span> std::string fpga_filename = <span class="stringliteral">""</span>,
<a name="l00096"></a>00096 <span class="keyword">const</span> std::string firmware_filename = <span class="stringliteral">""</span>);
<a name="l00097"></a>00097 <span class="comment"></span>
<a name="l00098"></a>00098 <span class="comment"> /*!</span>
<a name="l00099"></a>00099 <span class="comment"> * \brief advise usrp_basic of usb data rate (bytes/sec)</span>
<a name="l00100"></a>00100 <span class="comment"> *</span>
<a name="l00101"></a>00101 <span class="comment"> * N.B., this doesn't tweak any hardware. Derived classes</span>
<a name="l00102"></a>00102 <span class="comment"> * should call this to inform us of the data rate whenever it's</span>
<a name="l00103"></a>00103 <span class="comment"> * first set or if it changes.</span>
<a name="l00104"></a>00104 <span class="comment"> *</span>
<a name="l00105"></a>00105 <span class="comment"> * \param usb_data_rate bytes/sec</span>
<a name="l00106"></a>00106 <span class="comment"> */</span>
<a name="l00107"></a>00107 <span class="keywordtype">void</span> <a class="code" href="classusrp__basic.html#a77535750946e7d8443a76941a9611cae" title="advise usrp_basic of usb data rate (bytes/sec)">set_usb_data_rate</a> (<span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a530c23ff633c630530ec491c368a755d">usb_data_rate</a>);
<a name="l00108"></a>00108 <span class="comment"></span>
<a name="l00109"></a>00109 <span class="comment"> /*!</span>
<a name="l00110"></a>00110 <span class="comment"> * \brief Write auxiliary digital to analog converter.</span>
<a name="l00111"></a>00111 <span class="comment"> *</span>
<a name="l00112"></a>00112 <span class="comment"> * \param slot Which Tx or Rx slot to write.</span>
<a name="l00113"></a>00113 <span class="comment"> * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.</span>
<a name="l00114"></a>00114 <span class="comment"> * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.</span>
<a name="l00115"></a>00115 <span class="comment"> * \param which_dac [0,3] RX slots must use only 0 and 1. TX slots must use only 2 and 3.</span>
<a name="l00116"></a>00116 <span class="comment"> * \param value [0,4095]</span>
<a name="l00117"></a>00117 <span class="comment"> * \returns true iff successful</span>
<a name="l00118"></a>00118 <span class="comment"> */</span>
<a name="l00119"></a>00119 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ab8870a35e0bdc63ee6655b5264a6d142" title="Write auxiliary digital to analog converter.">_write_aux_dac</a> (<span class="keywordtype">int</span> slot, <span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> value);
<a name="l00120"></a>00120 <span class="comment"></span>
<a name="l00121"></a>00121 <span class="comment"> /*!</span>
<a name="l00122"></a>00122 <span class="comment"> * \brief Read auxiliary analog to digital converter.</span>
<a name="l00123"></a>00123 <span class="comment"> *</span>
<a name="l00124"></a>00124 <span class="comment"> * \param slot 2-bit slot number. E.g., SLOT_TX_A</span>
<a name="l00125"></a>00125 <span class="comment"> * \param which_adc [0,1]</span>
<a name="l00126"></a>00126 <span class="comment"> * \param value return 12-bit value [0,4095]</span>
<a name="l00127"></a>00127 <span class="comment"> * \returns true iff successful</span>
<a name="l00128"></a>00128 <span class="comment"> */</span>
<a name="l00129"></a>00129 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a8f92d2e9630ec614eedc61858756cce1" title="Read auxiliary analog to digital converter.">_read_aux_adc</a> (<span class="keywordtype">int</span> slot, <span class="keywordtype">int</span> which_adc, <span class="keywordtype">int</span> *value);
<a name="l00130"></a>00130 <span class="comment"></span>
<a name="l00131"></a>00131 <span class="comment"> /*!</span>
<a name="l00132"></a>00132 <span class="comment"> * \brief Read auxiliary analog to digital converter.</span>
<a name="l00133"></a>00133 <span class="comment"> *</span>
<a name="l00134"></a>00134 <span class="comment"> * \param slot 2-bit slot number. E.g., SLOT_TX_A</span>
<a name="l00135"></a>00135 <span class="comment"> * \param which_adc [0,1]</span>
<a name="l00136"></a>00136 <span class="comment"> * \returns value in the range [0,4095] if successful, else READ_FAILED.</span>
<a name="l00137"></a>00137 <span class="comment"> */</span>
<a name="l00138"></a>00138 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a8f92d2e9630ec614eedc61858756cce1" title="Read auxiliary analog to digital converter.">_read_aux_adc</a> (<span class="keywordtype">int</span> slot, <span class="keywordtype">int</span> which_adc);
<a name="l00139"></a>00139
<a name="l00140"></a>00140
<a name="l00141"></a>00141 <span class="keyword">public</span>:
<a name="l00142"></a>00142 <span class="keyword">virtual</span> <a class="code" href="classusrp__basic.html#a5fa6821aa1fc7135bc1cf158ecafa9fa">~usrp_basic</a> ();
<a name="l00143"></a>00143
<a name="l00144"></a>00144 <span class="comment"></span>
<a name="l00145"></a>00145 <span class="comment"> /*!</span>
<a name="l00146"></a>00146 <span class="comment"> * Return a vector of vectors that contain shared pointers</span>
<a name="l00147"></a>00147 <span class="comment"> * to the daughterboard instance(s) associated with the specified side.</span>
<a name="l00148"></a>00148 <span class="comment"> *</span>
<a name="l00149"></a>00149 <span class="comment"> * It is an error to use the returned objects after the usrp_basic</span>
<a name="l00150"></a>00150 <span class="comment"> * object has been destroyed.</span>
<a name="l00151"></a>00151 <span class="comment"> */</span>
<a name="l00152"></a><a class="code" href="classusrp__basic.html#a8eb1f58ca819437d7f43ad87574bd6da">00152</a> <a class="code" href="classstd_1_1vector.html" title="vector documentation stub">std::vector<std::vector<db_base_sptr></a> > <a class="code" href="classusrp__basic.html#a8eb1f58ca819437d7f43ad87574bd6da">db</a>()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic.html#aa45df525ed16ee0c885a4972ac7908b4">d_db</a>; }
<a name="l00153"></a>00153 <span class="comment"></span>
<a name="l00154"></a>00154 <span class="comment"> /*!</span>
<a name="l00155"></a>00155 <span class="comment"> * Return a vector of size >= 1 that contains shared pointers</span>
<a name="l00156"></a>00156 <span class="comment"> * to the daughterboard instance(s) associated with the specified side.</span>
<a name="l00157"></a>00157 <span class="comment"> *</span>
<a name="l00158"></a>00158 <span class="comment"> * \param which_side [0,1] which daughterboard</span>
<a name="l00159"></a>00159 <span class="comment"> *</span>
<a name="l00160"></a>00160 <span class="comment"> * It is an error to use the returned objects after the usrp_basic</span>
<a name="l00161"></a>00161 <span class="comment"> * object has been destroyed.</span>
<a name="l00162"></a>00162 <span class="comment"> */</span>
<a name="l00163"></a>00163 <a class="code" href="classstd_1_1vector.html" title="vector documentation stub">std::vector<db_base_sptr></a> <a class="code" href="classusrp__basic.html#a8eb1f58ca819437d7f43ad87574bd6da">db</a>(<span class="keywordtype">int</span> which_side);
<a name="l00164"></a>00164 <span class="comment"></span>
<a name="l00165"></a>00165 <span class="comment"> /*!</span>
<a name="l00166"></a>00166 <span class="comment"> * \brief is the subdev_spec valid?</span>
<a name="l00167"></a>00167 <span class="comment"> */</span>
<a name="l00168"></a>00168 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a61af504df443a9d846ecf909871f1481" title="is the subdev_spec valid?">is_valid</a>(<span class="keyword">const</span> <a class="code" href="structusrp__subdev__spec.html" title="specify a daughterboard and subdevice on a daughterboard.">usrp_subdev_spec</a> &ss);
<a name="l00169"></a>00169 <span class="comment"></span>
<a name="l00170"></a>00170 <span class="comment"> /*!</span>
<a name="l00171"></a>00171 <span class="comment"> * \brief given a subdev_spec, return the corresponding daughterboard object.</span>
<a name="l00172"></a>00172 <span class="comment"> * \throws std::invalid_ argument if ss is invalid.</span>
<a name="l00173"></a>00173 <span class="comment"> *</span>
<a name="l00174"></a>00174 <span class="comment"> * \param ss specifies the side and subdevice</span>
<a name="l00175"></a>00175 <span class="comment"> */</span>
<a name="l00176"></a>00176 <a class="code" href="classboost_1_1shared__ptr.html" title="shared_ptr documentation stub">db_base_sptr</a> <a class="code" href="classusrp__basic.html#a648de1479d7632b59bf2732f231ddbe0" title="given a subdev_spec, return the corresponding daughterboard object.">selected_subdev</a>(<span class="keyword">const</span> <a class="code" href="structusrp__subdev__spec.html" title="specify a daughterboard and subdevice on a daughterboard.">usrp_subdev_spec</a> &ss);
<a name="l00177"></a>00177 <span class="comment"></span>
<a name="l00178"></a>00178 <span class="comment"> /*!</span>
<a name="l00179"></a>00179 <span class="comment"> * \brief return frequency of master oscillator on USRP</span>
<a name="l00180"></a>00180 <span class="comment"> */</span>
<a name="l00181"></a><a class="code" href="classusrp__basic.html#a244d4aa01bb6a054cd5bd0998ce2a09a">00181</a> <span class="keywordtype">long</span> <a class="code" href="classusrp__basic.html#a244d4aa01bb6a054cd5bd0998ce2a09a" title="return frequency of master oscillator on USRP">fpga_master_clock_freq</a> ()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic.html#afa81d2ee842dd6eef04c422276f52d1d">d_fpga_master_clock_freq</a>; }
<a name="l00182"></a>00182 <span class="comment"></span>
<a name="l00183"></a>00183 <span class="comment"> /*!</span>
<a name="l00184"></a>00184 <span class="comment"> * Tell API that the master oscillator on the USRP is operating at a non-standard </span>
<a name="l00185"></a>00185 <span class="comment"> * fixed frequency. This is only needed for custom USRP hardware modified to </span>
<a name="l00186"></a>00186 <span class="comment"> * operate at a different frequency from the default factory configuration. This</span>
<a name="l00187"></a>00187 <span class="comment"> * function must be called prior to any other API function.</span>
<a name="l00188"></a>00188 <span class="comment"> * \param master_clock USRP2 FPGA master clock frequency in Hz (10..64 MHz)</span>
<a name="l00189"></a>00189 <span class="comment"> */</span>
<a name="l00190"></a><a class="code" href="classusrp__basic.html#a825640d1de15253b5bae18762a0e403e">00190</a> <span class="keywordtype">void</span> <a class="code" href="classusrp__basic.html#a825640d1de15253b5bae18762a0e403e">set_fpga_master_clock_freq</a> (<span class="keywordtype">long</span> master_clock) { <a class="code" href="classusrp__basic.html#afa81d2ee842dd6eef04c422276f52d1d">d_fpga_master_clock_freq</a> = master_clock; }
<a name="l00191"></a>00191 <span class="comment"></span>
<a name="l00192"></a>00192 <span class="comment"> /*!</span>
<a name="l00193"></a>00193 <span class="comment"> * \returns usb data rate in bytes/sec</span>
<a name="l00194"></a>00194 <span class="comment"> */</span>
<a name="l00195"></a><a class="code" href="classusrp__basic.html#a530c23ff633c630530ec491c368a755d">00195</a> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a530c23ff633c630530ec491c368a755d">usb_data_rate</a> ()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic.html#a4e5297f0010c8f39cfe4fff838b113a4">d_usb_data_rate</a>; }
<a name="l00196"></a>00196
<a name="l00197"></a><a class="code" href="classusrp__basic.html#ae200e6eb7dbbaf81a3c1353a401f97d3">00197</a> <span class="keywordtype">void</span> <a class="code" href="classusrp__basic.html#ae200e6eb7dbbaf81a3c1353a401f97d3">set_verbose</a> (<span class="keywordtype">bool</span> on) { <a class="code" href="classusrp__basic.html#a6d0fecbe64f35fef20293c27dc33a0b0">d_verbose</a> = on; }
<a name="l00198"></a>00198 <span class="comment"></span>
<a name="l00199"></a>00199 <span class="comment"> //! magic value used on alternate register read interfaces</span>
<a name="l00200"></a><a class="code" href="classusrp__basic.html#a364d3e56a0749a90cc5de2ac378e6863">00200</a> <span class="comment"></span> <span class="keyword">static</span> <span class="keyword">const</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a364d3e56a0749a90cc5de2ac378e6863" title="magic value used on alternate register read interfaces">READ_FAILED</a> = -99999;
<a name="l00201"></a>00201 <span class="comment"></span>
<a name="l00202"></a>00202 <span class="comment"> /*!</span>
<a name="l00203"></a>00203 <span class="comment"> * \brief Write EEPROM on motherboard or any daughterboard.</span>
<a name="l00204"></a>00204 <span class="comment"> * \param i2c_addr I2C bus address of EEPROM</span>
<a name="l00205"></a>00205 <span class="comment"> * \param eeprom_offset byte offset in EEPROM to begin writing</span>
<a name="l00206"></a>00206 <span class="comment"> * \param buf the data to write</span>
<a name="l00207"></a>00207 <span class="comment"> * \returns true iff sucessful</span>
<a name="l00208"></a>00208 <span class="comment"> */</span>
<a name="l00209"></a>00209 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a3900d37e951b83c938669f5fa0255866" title="Write EEPROM on motherboard or any daughterboard.">write_eeprom</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keywordtype">int</span> eeprom_offset, <span class="keyword">const</span> std::string buf);
<a name="l00210"></a>00210 <span class="comment"></span>
<a name="l00211"></a>00211 <span class="comment"> /*!</span>
<a name="l00212"></a>00212 <span class="comment"> * \brief Read EEPROM on motherboard or any daughterboard.</span>
<a name="l00213"></a>00213 <span class="comment"> * \param i2c_addr I2C bus address of EEPROM</span>
<a name="l00214"></a>00214 <span class="comment"> * \param eeprom_offset byte offset in EEPROM to begin reading</span>
<a name="l00215"></a>00215 <span class="comment"> * \param len number of bytes to read</span>
<a name="l00216"></a>00216 <span class="comment"> * \returns the data read if successful, else a zero length string.</span>
<a name="l00217"></a>00217 <span class="comment"> */</span>
<a name="l00218"></a>00218 std::string <a class="code" href="classusrp__basic.html#aefe7a2f10626831304091babff21dc0d" title="Read EEPROM on motherboard or any daughterboard.">read_eeprom</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keywordtype">int</span> eeprom_offset, <span class="keywordtype">int</span> len);
<a name="l00219"></a>00219 <span class="comment"></span>
<a name="l00220"></a>00220 <span class="comment"> /*!</span>
<a name="l00221"></a>00221 <span class="comment"> * \brief Write to I2C peripheral</span>
<a name="l00222"></a>00222 <span class="comment"> * \param i2c_addr I2C bus address (7-bits)</span>
<a name="l00223"></a>00223 <span class="comment"> * \param buf the data to write</span>
<a name="l00224"></a>00224 <span class="comment"> * \returns true iff successful</span>
<a name="l00225"></a>00225 <span class="comment"> * Writes are limited to a maximum of of 64 bytes.</span>
<a name="l00226"></a>00226 <span class="comment"> */</span>
<a name="l00227"></a>00227 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a664e5aa3a3fb8a4c50b752906fcb79a0" title="Write to I2C peripheral.">write_i2c</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keyword">const</span> std::string buf);
<a name="l00228"></a>00228 <span class="comment"></span>
<a name="l00229"></a>00229 <span class="comment"> /*!</span>
<a name="l00230"></a>00230 <span class="comment"> * \brief Read from I2C peripheral</span>
<a name="l00231"></a>00231 <span class="comment"> * \param i2c_addr I2C bus address (7-bits)</span>
<a name="l00232"></a>00232 <span class="comment"> * \param len number of bytes to read</span>
<a name="l00233"></a>00233 <span class="comment"> * \returns the data read if successful, else a zero length string.</span>
<a name="l00234"></a>00234 <span class="comment"> * Reads are limited to a maximum of 64 bytes.</span>
<a name="l00235"></a>00235 <span class="comment"> */</span>
<a name="l00236"></a>00236 std::string <a class="code" href="classusrp__basic.html#ab284caa2e15464f62aa80ad1f540ecc5" title="Read from I2C peripheral.">read_i2c</a> (<span class="keywordtype">int</span> i2c_addr, <span class="keywordtype">int</span> len);
<a name="l00237"></a>00237 <span class="comment"></span>
<a name="l00238"></a>00238 <span class="comment"> /*!</span>
<a name="l00239"></a>00239 <span class="comment"> * \brief Set ADC offset correction</span>
<a name="l00240"></a>00240 <span class="comment"> * \param which_adc which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...</span>
<a name="l00241"></a>00241 <span class="comment"> * \param offset 16-bit value to subtract from raw ADC input.</span>
<a name="l00242"></a>00242 <span class="comment"> */</span>
<a name="l00243"></a>00243 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ad0e07c8d85aa220aaf150e27dd8b545f" title="Set ADC offset correction.">set_adc_offset</a> (<span class="keywordtype">int</span> which_adc, <span class="keywordtype">int</span> offset);
<a name="l00244"></a>00244 <span class="comment"></span>
<a name="l00245"></a>00245 <span class="comment"> /*!</span>
<a name="l00246"></a>00246 <span class="comment"> * \brief Set DAC offset correction</span>
<a name="l00247"></a>00247 <span class="comment"> * \param which_dac which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...</span>
<a name="l00248"></a>00248 <span class="comment"> * \param offset 10-bit offset value (ambiguous format: See AD9862 datasheet).</span>
<a name="l00249"></a>00249 <span class="comment"> * \param offset_pin 1-bit value. If 0 offset applied to -ve differential pin;</span>
<a name="l00250"></a>00250 <span class="comment"> * If 1 offset applied to +ve differential pin.</span>
<a name="l00251"></a>00251 <span class="comment"> */</span>
<a name="l00252"></a>00252 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ab18f4a02c0efcac10f8e9406ca7a57a7" title="Set DAC offset correction.">set_dac_offset</a> (<span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> offset, <span class="keywordtype">int</span> offset_pin);
<a name="l00253"></a>00253 <span class="comment"></span>
<a name="l00254"></a>00254 <span class="comment"> /*!</span>
<a name="l00255"></a>00255 <span class="comment"> * \brief Control ADC input buffer</span>
<a name="l00256"></a>00256 <span class="comment"> * \param which_adc which ADC[0,3]</span>
<a name="l00257"></a>00257 <span class="comment"> * \param bypass if non-zero, bypass input buffer and connect input</span>
<a name="l00258"></a>00258 <span class="comment"> * directly to switched cap SHA input of RxPGA.</span>
<a name="l00259"></a>00259 <span class="comment"> */</span>
<a name="l00260"></a>00260 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a97fc801cbafa85040a3d39be03d27a62" title="Control ADC input buffer.">set_adc_buffer_bypass</a> (<span class="keywordtype">int</span> which_adc, <span class="keywordtype">bool</span> bypass);
<a name="l00261"></a>00261 <span class="comment"></span>
<a name="l00262"></a>00262 <span class="comment"> /*!</span>
<a name="l00263"></a>00263 <span class="comment"> * \brief Enable/disable automatic DC offset removal control loop in FPGA</span>
<a name="l00264"></a>00264 <span class="comment"> *</span>
<a name="l00265"></a>00265 <span class="comment"> * \param bits which control loops to enable</span>
<a name="l00266"></a>00266 <span class="comment"> * \param mask which \p bits to pay attention to</span>
<a name="l00267"></a>00267 <span class="comment"> *</span>
<a name="l00268"></a>00268 <span class="comment"> * If the corresponding bit is set, enable the automatic DC</span>
<a name="l00269"></a>00269 <span class="comment"> * offset correction control loop.</span>
<a name="l00270"></a>00270 <span class="comment"> *</span>
<a name="l00271"></a>00271 <span class="comment"> * <pre></span>
<a name="l00272"></a>00272 <span class="comment"> * The 4 low bits are significant:</span>
<a name="l00273"></a>00273 <span class="comment"> *</span>
<a name="l00274"></a>00274 <span class="comment"> * ADC0 = (1 << 0)</span>
<a name="l00275"></a>00275 <span class="comment"> * ADC1 = (1 << 1)</span>
<a name="l00276"></a>00276 <span class="comment"> * ADC2 = (1 << 2)</span>
<a name="l00277"></a>00277 <span class="comment"> * ADC3 = (1 << 3)</span>
<a name="l00278"></a>00278 <span class="comment"> * </pre></span>
<a name="l00279"></a>00279 <span class="comment"> *</span>
<a name="l00280"></a>00280 <span class="comment"> * By default the control loop is enabled on all ADC's.</span>
<a name="l00281"></a>00281 <span class="comment"> */</span>
<a name="l00282"></a>00282 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#af20cc324fca8d089226d5a6dfc3d3668" title="Enable/disable automatic DC offset removal control loop in FPGA.">set_dc_offset_cl_enable</a>(<span class="keywordtype">int</span> bits, <span class="keywordtype">int</span> mask);
<a name="l00283"></a>00283 <span class="comment"></span>
<a name="l00284"></a>00284 <span class="comment"> /*!</span>
<a name="l00285"></a>00285 <span class="comment"> * \brief return the usrp's serial number.</span>
<a name="l00286"></a>00286 <span class="comment"> *</span>
<a name="l00287"></a>00287 <span class="comment"> * \returns non-zero length string iff successful.</span>
<a name="l00288"></a>00288 <span class="comment"> */</span>
<a name="l00289"></a>00289 std::string <a class="code" href="classusrp__basic.html#a70a71308412a67eaf825c13399faa078" title="return the usrp&#39;s serial number.">serial_number</a>();
<a name="l00290"></a>00290 <span class="comment"></span>
<a name="l00291"></a>00291 <span class="comment"> /*!</span>
<a name="l00292"></a>00292 <span class="comment"> * \brief Return daughterboard ID for given side [0,1].</span>
<a name="l00293"></a>00293 <span class="comment"> *</span>
<a name="l00294"></a>00294 <span class="comment"> * \param which_side [0,1] which daughterboard</span>
<a name="l00295"></a>00295 <span class="comment"> *</span>
<a name="l00296"></a>00296 <span class="comment"> * \return daughterboard id >= 0 if successful</span>
<a name="l00297"></a>00297 <span class="comment"> * \return -1 if no daugherboard</span>
<a name="l00298"></a>00298 <span class="comment"> * \return -2 if invalid EEPROM on daughterboard</span>
<a name="l00299"></a>00299 <span class="comment"> */</span>
<a name="l00300"></a>00300 <span class="keyword">virtual</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a6d639e50633c165b23e0c4770b26bec2" title="Return daughterboard ID for given side [0,1].">daughterboard_id</a> (<span class="keywordtype">int</span> which_side) <span class="keyword">const</span> = 0;
<a name="l00301"></a>00301 <span class="comment"></span>
<a name="l00302"></a>00302 <span class="comment"> /*!</span>
<a name="l00303"></a>00303 <span class="comment"> * \brief Clock ticks to delay rising of T/R signal</span>
<a name="l00304"></a>00304 <span class="comment"> * \sa write_atr_mask, write_atr_txval, write_atr_rxval</span>
<a name="l00305"></a>00305 <span class="comment"> */</span>
<a name="l00306"></a>00306 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a70f4070830b0db3fd0c3addb97ce966e" title="Clock ticks to delay rising of T/R signal.">write_atr_tx_delay</a>(<span class="keywordtype">int</span> value);
<a name="l00307"></a>00307 <span class="comment"></span>
<a name="l00308"></a>00308 <span class="comment"> /*!</span>
<a name="l00309"></a>00309 <span class="comment"> * \brief Clock ticks to delay falling edge of T/R signal</span>
<a name="l00310"></a>00310 <span class="comment"> * \sa write_atr_mask, write_atr_txval, write_atr_rxval</span>
<a name="l00311"></a>00311 <span class="comment"> */</span>
<a name="l00312"></a>00312 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ad9b95b1ca0e2616c1b3808892fdda1b0" title="Clock ticks to delay falling edge of T/R signal.">write_atr_rx_delay</a>(<span class="keywordtype">int</span> value);
<a name="l00313"></a>00313
<a name="l00314"></a>00314
<a name="l00315"></a>00315 <span class="comment">// ================================================================</span>
<a name="l00316"></a>00316 <span class="comment">// Routines to access and control daughterboard specific i/o</span>
<a name="l00317"></a>00317 <span class="comment">//</span>
<a name="l00318"></a>00318 <span class="comment">// Those with a common_ prefix access either the Tx or Rx side depending</span>
<a name="l00319"></a>00319 <span class="comment">// on the txrx parameter. Those without the common_ prefix are virtual</span>
<a name="l00320"></a>00320 <span class="comment">// and are overriden in usrp_basic_rx and usrp_basic_tx to access the</span>
<a name="l00321"></a>00321 <span class="comment">// the Rx or Tx sides automatically. We provide the common_ versions</span>
<a name="l00322"></a>00322 <span class="comment">// for those daughterboards such as the WBX and XCVR2450 that share</span>
<a name="l00323"></a>00323 <span class="comment">// h/w resources (such as the LO) between the Tx and Rx sides.</span>
<a name="l00324"></a>00324
<a name="l00325"></a>00325 <span class="comment">// ----------------------------------------------------------------</span>
<a name="l00326"></a>00326 <span class="comment">// BEGIN common_ daughterboard control functions</span>
<a name="l00327"></a>00327 <span class="comment"></span>
<a name="l00328"></a>00328 <span class="comment"> /*!</span>
<a name="l00329"></a>00329 <span class="comment"> * \brief Set Programmable Gain Amplifier(PGA)</span>
<a name="l00330"></a>00330 <span class="comment"> *</span>
<a name="l00331"></a>00331 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00332"></a>00332 <span class="comment"> * \param which_amp which amp [0,3]</span>
<a name="l00333"></a>00333 <span class="comment"> * \param gain_in_db gain value(linear in dB)</span>
<a name="l00334"></a>00334 <span class="comment"> *</span>
<a name="l00335"></a>00335 <span class="comment"> * gain is rounded to closest setting supported by hardware.</span>
<a name="l00336"></a>00336 <span class="comment"> *</span>
<a name="l00337"></a>00337 <span class="comment"> * \returns true iff sucessful.</span>
<a name="l00338"></a>00338 <span class="comment"> *</span>
<a name="l00339"></a>00339 <span class="comment"> * \sa pga_min(), pga_max(), pga_db_per_step()</span>
<a name="l00340"></a>00340 <span class="comment"> */</span>
<a name="l00341"></a>00341 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a52f96a90c91ed6e74bfc6a91691a7fa2" title="Set Programmable Gain Amplifier(PGA)">common_set_pga</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_amp, <span class="keywordtype">double</span> gain_in_db);
<a name="l00342"></a>00342 <span class="comment"></span>
<a name="l00343"></a>00343 <span class="comment"> /*!</span>
<a name="l00344"></a>00344 <span class="comment"> * \brief Return programmable gain amplifier gain setting in dB.</span>
<a name="l00345"></a>00345 <span class="comment"> *</span>
<a name="l00346"></a>00346 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00347"></a>00347 <span class="comment"> * \param which_amp which amp [0,3]</span>
<a name="l00348"></a>00348 <span class="comment"> */</span>
<a name="l00349"></a>00349 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#ac25d56e74572309a87397f0fce1a102b" title="Return programmable gain amplifier gain setting in dB.">common_pga</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_amp) <span class="keyword">const</span>;
<a name="l00350"></a>00350 <span class="comment"></span>
<a name="l00351"></a>00351 <span class="comment"> /*!</span>
<a name="l00352"></a>00352 <span class="comment"> * \brief Return minimum legal PGA gain in dB.</span>
<a name="l00353"></a>00353 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00354"></a>00354 <span class="comment"> */</span>
<a name="l00355"></a>00355 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#a95453e5bb4d0ed4c05b1ea64c880170a" title="Return minimum legal PGA gain in dB.">common_pga_min</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx) <span class="keyword">const</span>;
<a name="l00356"></a>00356 <span class="comment"></span>
<a name="l00357"></a>00357 <span class="comment"> /*!</span>
<a name="l00358"></a>00358 <span class="comment"> * \brief Return maximum legal PGA gain in dB.</span>
<a name="l00359"></a>00359 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00360"></a>00360 <span class="comment"> */</span>
<a name="l00361"></a>00361 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#a7dd5c384b9d2cd4e412939c3b7b7ac79" title="Return maximum legal PGA gain in dB.">common_pga_max</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx) <span class="keyword">const</span>;
<a name="l00362"></a>00362 <span class="comment"></span>
<a name="l00363"></a>00363 <span class="comment"> /*!</span>
<a name="l00364"></a>00364 <span class="comment"> * \brief Return hardware step size of PGA(linear in dB).</span>
<a name="l00365"></a>00365 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00366"></a>00366 <span class="comment"> */</span>
<a name="l00367"></a>00367 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#a06cfd0e5675618f773c5466bd235a369" title="Return hardware step size of PGA(linear in dB).">common_pga_db_per_step</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx) <span class="keyword">const</span>;
<a name="l00368"></a>00368 <span class="comment"></span>
<a name="l00369"></a>00369 <span class="comment"> /*!</span>
<a name="l00370"></a>00370 <span class="comment"> * \brief Write direction register(output enables) for pins that go to daughterboard.</span>
<a name="l00371"></a>00371 <span class="comment"> *</span>
<a name="l00372"></a>00372 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00373"></a>00373 <span class="comment"> * \param which_side [0,1] which size</span>
<a name="l00374"></a>00374 <span class="comment"> * \param value value to write into register</span>
<a name="l00375"></a>00375 <span class="comment"> * \param mask which bits of value to write into reg</span>
<a name="l00376"></a>00376 <span class="comment"> *</span>
<a name="l00377"></a>00377 <span class="comment"> * Each d'board has 16-bits of general purpose i/o.</span>
<a name="l00378"></a>00378 <span class="comment"> * Setting the bit makes it an output from the FPGA to the d'board.</span>
<a name="l00379"></a>00379 <span class="comment"> *</span>
<a name="l00380"></a>00380 <span class="comment"> * This register is initialized based on a value stored in the</span>
<a name="l00381"></a>00381 <span class="comment"> * d'board EEPROM. In general, you shouldn't be using this routine</span>
<a name="l00382"></a>00382 <span class="comment"> * without a very good reason. Using this method incorrectly will</span>
<a name="l00383"></a>00383 <span class="comment"> * kill your USRP motherboard and/or daughterboard.</span>
<a name="l00384"></a>00384 <span class="comment"> */</span>
<a name="l00385"></a>00385 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a09ce78134eea035e42464123356096e4" title="Write direction register(output enables) for pins that go to daughterboard.">_common_write_oe</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00386"></a>00386 <span class="comment"></span>
<a name="l00387"></a>00387 <span class="comment"> /*!</span>
<a name="l00388"></a>00388 <span class="comment"> * \brief Write daughterboard i/o pin value</span>
<a name="l00389"></a>00389 <span class="comment"> *</span>
<a name="l00390"></a>00390 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00391"></a>00391 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00392"></a>00392 <span class="comment"> * \param value value to write into register</span>
<a name="l00393"></a>00393 <span class="comment"> * \param mask which bits of value to write into reg</span>
<a name="l00394"></a>00394 <span class="comment"> */</span>
<a name="l00395"></a>00395 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#acf3120592af4df79d38d253c98c633ae" title="Write daughterboard i/o pin value.">common_write_io</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00396"></a>00396 <span class="comment"></span>
<a name="l00397"></a>00397 <span class="comment"> /*!</span>
<a name="l00398"></a>00398 <span class="comment"> * \brief Read daughterboard i/o pin value</span>
<a name="l00399"></a>00399 <span class="comment"> *</span>
<a name="l00400"></a>00400 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00401"></a>00401 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00402"></a>00402 <span class="comment"> * \param value output</span>
<a name="l00403"></a>00403 <span class="comment"> */</span>
<a name="l00404"></a>00404 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#af7e33b5762cd9c80a714806fa6fa2244" title="Read daughterboard i/o pin value.">common_read_io</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> *value);
<a name="l00405"></a>00405 <span class="comment"></span>
<a name="l00406"></a>00406 <span class="comment"> /*!</span>
<a name="l00407"></a>00407 <span class="comment"> * \brief Read daughterboard i/o pin value</span>
<a name="l00408"></a>00408 <span class="comment"> *</span>
<a name="l00409"></a>00409 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00410"></a>00410 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00411"></a>00411 <span class="comment"> * \returns register value if successful, else READ_FAILED</span>
<a name="l00412"></a>00412 <span class="comment"> */</span>
<a name="l00413"></a>00413 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#af7e33b5762cd9c80a714806fa6fa2244" title="Read daughterboard i/o pin value.">common_read_io</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side);
<a name="l00414"></a>00414 <span class="comment"></span>
<a name="l00415"></a>00415 <span class="comment"> /*!</span>
<a name="l00416"></a>00416 <span class="comment"> * \brief Write daughterboard refclk config register</span>
<a name="l00417"></a>00417 <span class="comment"> *</span>
<a name="l00418"></a>00418 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00419"></a>00419 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00420"></a>00420 <span class="comment"> * \param value value to write into register, see below</span>
<a name="l00421"></a>00421 <span class="comment"> *</span>
<a name="l00422"></a>00422 <span class="comment"> * <pre></span>
<a name="l00423"></a>00423 <span class="comment"> * Control whether a reference clock is sent to the daughterboards,</span>
<a name="l00424"></a>00424 <span class="comment"> * and what frequency. The refclk is sent on d'board i/o pin 0.</span>
<a name="l00425"></a>00425 <span class="comment"> * </span>
<a name="l00426"></a>00426 <span class="comment"> * 3 2 1 </span>
<a name="l00427"></a>00427 <span class="comment"> * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0</span>
<a name="l00428"></a>00428 <span class="comment"> * +-----------------------------------------------+-+------------+</span>
<a name="l00429"></a>00429 <span class="comment"> * | Reserved (Must be zero) |E| DIVISOR |</span>
<a name="l00430"></a>00430 <span class="comment"> * +-----------------------------------------------+-+------------+</span>
<a name="l00431"></a>00431 <span class="comment"> * </span>
<a name="l00432"></a>00432 <span class="comment"> * Bit 7 -- 1 turns on refclk, 0 allows IO use</span>
<a name="l00433"></a>00433 <span class="comment"> * Bits 6:0 Divider value</span>
<a name="l00434"></a>00434 <span class="comment"> * </pre></span>
<a name="l00435"></a>00435 <span class="comment"> */</span>
<a name="l00436"></a>00436 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ad673bc49b311e29ab01727c5933ea028" title="Write daughterboard refclk config register.">common_write_refclk</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00437"></a>00437 <span class="comment"></span>
<a name="l00438"></a>00438 <span class="comment"> /*!</span>
<a name="l00439"></a>00439 <span class="comment"> * \brief Automatic Transmit/Receive switching</span>
<a name="l00440"></a>00440 <span class="comment"> * <pre></span>
<a name="l00441"></a>00441 <span class="comment"> *</span>
<a name="l00442"></a>00442 <span class="comment"> * If automatic transmit/receive (ATR) switching is enabled in the</span>
<a name="l00443"></a>00443 <span class="comment"> * FR_ATR_CTL register, the presence or absence of data in the FPGA</span>
<a name="l00444"></a>00444 <span class="comment"> * transmit fifo selects between two sets of values for each of the 4</span>
<a name="l00445"></a>00445 <span class="comment"> * banks of daughterboard i/o pins.</span>
<a name="l00446"></a>00446 <span class="comment"> *</span>
<a name="l00447"></a>00447 <span class="comment"> * Each daughterboard slot has 3 16-bit registers associated with it:</span>
<a name="l00448"></a>00448 <span class="comment"> * FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_*</span>
<a name="l00449"></a>00449 <span class="comment"> *</span>
<a name="l00450"></a>00450 <span class="comment"> * FR_ATR_MASK_{0,1,2,3}: </span>
<a name="l00451"></a>00451 <span class="comment"> *</span>
<a name="l00452"></a>00452 <span class="comment"> * These registers determine which of the daugherboard i/o pins are</span>
<a name="l00453"></a>00453 <span class="comment"> * affected by ATR switching. If a bit in the mask is set, the</span>
<a name="l00454"></a>00454 <span class="comment"> * corresponding i/o bit is controlled by ATR, else it's output</span>
<a name="l00455"></a>00455 <span class="comment"> * value comes from the normal i/o pin output register:</span>
<a name="l00456"></a>00456 <span class="comment"> * FR_IO_{0,1,2,3}.</span>
<a name="l00457"></a>00457 <span class="comment"> *</span>
<a name="l00458"></a>00458 <span class="comment"> * FR_ATR_TXVAL_{0,1,2,3}:</span>
<a name="l00459"></a>00459 <span class="comment"> * FR_ATR_RXVAL_{0,1,2,3}:</span>
<a name="l00460"></a>00460 <span class="comment"> *</span>
<a name="l00461"></a>00461 <span class="comment"> * If the Tx fifo contains data, then the bits from TXVAL that are</span>
<a name="l00462"></a>00462 <span class="comment"> * selected by MASK are output. Otherwise, the bits from RXVAL that</span>
<a name="l00463"></a>00463 <span class="comment"> * are selected by MASK are output.</span>
<a name="l00464"></a>00464 <span class="comment"> * </pre></span>
<a name="l00465"></a>00465 <span class="comment"> */</span>
<a name="l00466"></a>00466 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a0997e93568c71e5432c2445b1ebcc991" title="Automatic Transmit/Receive switching.">common_write_atr_mask</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00467"></a>00467 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a26e38a0f9f98390b712709812e3387af">common_write_atr_txval</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00468"></a>00468 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a89eda6a96bc7f4d2d634da793eccbc20">common_write_atr_rxval</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00469"></a>00469 <span class="comment"></span>
<a name="l00470"></a>00470 <span class="comment"> /*!</span>
<a name="l00471"></a>00471 <span class="comment"> * \brief Write auxiliary digital to analog converter.</span>
<a name="l00472"></a>00472 <span class="comment"> *</span>
<a name="l00473"></a>00473 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00474"></a>00474 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00475"></a>00475 <span class="comment"> * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.</span>
<a name="l00476"></a>00476 <span class="comment"> * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.</span>
<a name="l00477"></a>00477 <span class="comment"> * \param which_dac [2,3] TX slots must use only 2 and 3.</span>
<a name="l00478"></a>00478 <span class="comment"> * \param value [0,4095]</span>
<a name="l00479"></a>00479 <span class="comment"> * \returns true iff successful</span>
<a name="l00480"></a>00480 <span class="comment"> */</span>
<a name="l00481"></a>00481 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ac7354a9c4f7e961cb1b541c970a8d009" title="Write auxiliary digital to analog converter.">common_write_aux_dac</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> value);
<a name="l00482"></a>00482 <span class="comment"></span>
<a name="l00483"></a>00483 <span class="comment"> /*!</span>
<a name="l00484"></a>00484 <span class="comment"> * \brief Read auxiliary analog to digital converter.</span>
<a name="l00485"></a>00485 <span class="comment"> *</span>
<a name="l00486"></a>00486 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00487"></a>00487 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00488"></a>00488 <span class="comment"> * \param which_adc [0,1]</span>
<a name="l00489"></a>00489 <span class="comment"> * \param value return 12-bit value [0,4095]</span>
<a name="l00490"></a>00490 <span class="comment"> * \returns true iff successful</span>
<a name="l00491"></a>00491 <span class="comment"> */</span>
<a name="l00492"></a>00492 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a37bd03473a98cf3776f1988914c1a5ce" title="Read auxiliary analog to digital converter.">common_read_aux_adc</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc, <span class="keywordtype">int</span> *value);
<a name="l00493"></a>00493 <span class="comment"></span>
<a name="l00494"></a>00494 <span class="comment"> /*!</span>
<a name="l00495"></a>00495 <span class="comment"> * \brief Read auxiliary analog to digital converter.</span>
<a name="l00496"></a>00496 <span class="comment"> *</span>
<a name="l00497"></a>00497 <span class="comment"> * \param txrx Tx or Rx?</span>
<a name="l00498"></a>00498 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00499"></a>00499 <span class="comment"> * \param which_adc [0,1]</span>
<a name="l00500"></a>00500 <span class="comment"> * \returns value in the range [0,4095] if successful, else READ_FAILED.</span>
<a name="l00501"></a>00501 <span class="comment"> */</span>
<a name="l00502"></a>00502 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a37bd03473a98cf3776f1988914c1a5ce" title="Read auxiliary analog to digital converter.">common_read_aux_adc</a>(<a class="code" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71">txrx_t</a> txrx, <span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc);
<a name="l00503"></a>00503
<a name="l00504"></a>00504 <span class="comment">// END common_ daughterboard control functions </span>
<a name="l00505"></a>00505 <span class="comment">// ----------------------------------------------------------------</span>
<a name="l00506"></a>00506 <span class="comment">// BEGIN virtual daughterboard control functions</span>
<a name="l00507"></a>00507 <span class="comment"></span>
<a name="l00508"></a>00508 <span class="comment"> /*!</span>
<a name="l00509"></a>00509 <span class="comment"> * \brief Set Programmable Gain Amplifier (PGA)</span>
<a name="l00510"></a>00510 <span class="comment"> *</span>
<a name="l00511"></a>00511 <span class="comment"> * \param which_amp which amp [0,3]</span>
<a name="l00512"></a>00512 <span class="comment"> * \param gain_in_db gain value (linear in dB)</span>
<a name="l00513"></a>00513 <span class="comment"> *</span>
<a name="l00514"></a>00514 <span class="comment"> * gain is rounded to closest setting supported by hardware.</span>
<a name="l00515"></a>00515 <span class="comment"> *</span>
<a name="l00516"></a>00516 <span class="comment"> * \returns true iff sucessful.</span>
<a name="l00517"></a>00517 <span class="comment"> *</span>
<a name="l00518"></a>00518 <span class="comment"> * \sa pga_min(), pga_max(), pga_db_per_step()</span>
<a name="l00519"></a>00519 <span class="comment"> */</span>
<a name="l00520"></a>00520 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#afdcf0497f2554589b36a57806e239a07" title="Set Programmable Gain Amplifier (PGA)">set_pga</a> (<span class="keywordtype">int</span> which_amp, <span class="keywordtype">double</span> gain_in_db) = 0;
<a name="l00521"></a>00521 <span class="comment"></span>
<a name="l00522"></a>00522 <span class="comment"> /*!</span>
<a name="l00523"></a>00523 <span class="comment"> * \brief Return programmable gain amplifier gain setting in dB.</span>
<a name="l00524"></a>00524 <span class="comment"> *</span>
<a name="l00525"></a>00525 <span class="comment"> * \param which_amp which amp [0,3]</span>
<a name="l00526"></a>00526 <span class="comment"> */</span>
<a name="l00527"></a>00527 <span class="keyword">virtual</span> <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#a731389d216c7232020041f7cecd3d581" title="Return programmable gain amplifier gain setting in dB.">pga</a> (<span class="keywordtype">int</span> which_amp) <span class="keyword">const</span> = 0;
<a name="l00528"></a>00528 <span class="comment"></span>
<a name="l00529"></a>00529 <span class="comment"> /*!</span>
<a name="l00530"></a>00530 <span class="comment"> * \brief Return minimum legal PGA gain in dB.</span>
<a name="l00531"></a>00531 <span class="comment"> */</span>
<a name="l00532"></a>00532 <span class="keyword">virtual</span> <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#afcab635a411c57f16820e44a83bfe259" title="Return minimum legal PGA gain in dB.">pga_min</a> () <span class="keyword">const</span> = 0;
<a name="l00533"></a>00533 <span class="comment"></span>
<a name="l00534"></a>00534 <span class="comment"> /*!</span>
<a name="l00535"></a>00535 <span class="comment"> * \brief Return maximum legal PGA gain in dB.</span>
<a name="l00536"></a>00536 <span class="comment"> */</span>
<a name="l00537"></a>00537 <span class="keyword">virtual</span> <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#ae6a0027c59862dcc2d4da73d50b6a598" title="Return maximum legal PGA gain in dB.">pga_max</a> () <span class="keyword">const</span> = 0;
<a name="l00538"></a>00538 <span class="comment"></span>
<a name="l00539"></a>00539 <span class="comment"> /*!</span>
<a name="l00540"></a>00540 <span class="comment"> * \brief Return hardware step size of PGA (linear in dB).</span>
<a name="l00541"></a>00541 <span class="comment"> */</span>
<a name="l00542"></a>00542 <span class="keyword">virtual</span> <span class="keywordtype">double</span> <a class="code" href="classusrp__basic.html#ae67abb570f10f1216c001f2409fe3331" title="Return hardware step size of PGA (linear in dB).">pga_db_per_step</a> () <span class="keyword">const</span> = 0;
<a name="l00543"></a>00543 <span class="comment"></span>
<a name="l00544"></a>00544 <span class="comment"> /*!</span>
<a name="l00545"></a>00545 <span class="comment"> * \brief Write direction register (output enables) for pins that go to daughterboard.</span>
<a name="l00546"></a>00546 <span class="comment"> *</span>
<a name="l00547"></a>00547 <span class="comment"> * \param which_side [0,1] which size</span>
<a name="l00548"></a>00548 <span class="comment"> * \param value value to write into register</span>
<a name="l00549"></a>00549 <span class="comment"> * \param mask which bits of value to write into reg</span>
<a name="l00550"></a>00550 <span class="comment"> *</span>
<a name="l00551"></a>00551 <span class="comment"> * Each d'board has 16-bits of general purpose i/o.</span>
<a name="l00552"></a>00552 <span class="comment"> * Setting the bit makes it an output from the FPGA to the d'board.</span>
<a name="l00553"></a>00553 <span class="comment"> *</span>
<a name="l00554"></a>00554 <span class="comment"> * This register is initialized based on a value stored in the</span>
<a name="l00555"></a>00555 <span class="comment"> * d'board EEPROM. In general, you shouldn't be using this routine</span>
<a name="l00556"></a>00556 <span class="comment"> * without a very good reason. Using this method incorrectly will</span>
<a name="l00557"></a>00557 <span class="comment"> * kill your USRP motherboard and/or daughterboard.</span>
<a name="l00558"></a>00558 <span class="comment"> */</span>
<a name="l00559"></a>00559 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ac540c04b719f1ce30426ecb2214107ef" title="Write direction register (output enables) for pins that go to daughterboard.">_write_oe</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask) = 0;
<a name="l00560"></a>00560 <span class="comment"></span>
<a name="l00561"></a>00561 <span class="comment"> /*!</span>
<a name="l00562"></a>00562 <span class="comment"> * \brief Write daughterboard i/o pin value</span>
<a name="l00563"></a>00563 <span class="comment"> *</span>
<a name="l00564"></a>00564 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00565"></a>00565 <span class="comment"> * \param value value to write into register</span>
<a name="l00566"></a>00566 <span class="comment"> * \param mask which bits of value to write into reg</span>
<a name="l00567"></a>00567 <span class="comment"> */</span>
<a name="l00568"></a>00568 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a75aca6cca672ac2deedf14fb2c04ab0e" title="Write daughterboard i/o pin value.">write_io</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask) = 0;
<a name="l00569"></a>00569 <span class="comment"></span>
<a name="l00570"></a>00570 <span class="comment"> /*!</span>
<a name="l00571"></a>00571 <span class="comment"> * \brief Read daughterboard i/o pin value</span>
<a name="l00572"></a>00572 <span class="comment"> *</span>
<a name="l00573"></a>00573 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00574"></a>00574 <span class="comment"> * \param value output</span>
<a name="l00575"></a>00575 <span class="comment"> */</span>
<a name="l00576"></a>00576 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ad443caee9815e7c69a8b39a29cf8846a" title="Read daughterboard i/o pin value.">read_io</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> *value) = 0;
<a name="l00577"></a>00577 <span class="comment"></span>
<a name="l00578"></a>00578 <span class="comment"> /*!</span>
<a name="l00579"></a>00579 <span class="comment"> * \brief Read daughterboard i/o pin value</span>
<a name="l00580"></a>00580 <span class="comment"> *</span>
<a name="l00581"></a>00581 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00582"></a>00582 <span class="comment"> * \returns register value if successful, else READ_FAILED</span>
<a name="l00583"></a>00583 <span class="comment"> */</span>
<a name="l00584"></a>00584 <span class="keyword">virtual</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#ad443caee9815e7c69a8b39a29cf8846a" title="Read daughterboard i/o pin value.">read_io</a> (<span class="keywordtype">int</span> which_side) = 0;
<a name="l00585"></a>00585 <span class="comment"></span>
<a name="l00586"></a>00586 <span class="comment"> /*!</span>
<a name="l00587"></a>00587 <span class="comment"> * \brief Write daughterboard refclk config register</span>
<a name="l00588"></a>00588 <span class="comment"> *</span>
<a name="l00589"></a>00589 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00590"></a>00590 <span class="comment"> * \param value value to write into register, see below</span>
<a name="l00591"></a>00591 <span class="comment"> *</span>
<a name="l00592"></a>00592 <span class="comment"> * <pre></span>
<a name="l00593"></a>00593 <span class="comment"> * Control whether a reference clock is sent to the daughterboards,</span>
<a name="l00594"></a>00594 <span class="comment"> * and what frequency. The refclk is sent on d'board i/o pin 0.</span>
<a name="l00595"></a>00595 <span class="comment"> * </span>
<a name="l00596"></a>00596 <span class="comment"> * 3 2 1 </span>
<a name="l00597"></a>00597 <span class="comment"> * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0</span>
<a name="l00598"></a>00598 <span class="comment"> * +-----------------------------------------------+-+------------+</span>
<a name="l00599"></a>00599 <span class="comment"> * | Reserved (Must be zero) |E| DIVISOR |</span>
<a name="l00600"></a>00600 <span class="comment"> * +-----------------------------------------------+-+------------+</span>
<a name="l00601"></a>00601 <span class="comment"> * </span>
<a name="l00602"></a>00602 <span class="comment"> * Bit 7 -- 1 turns on refclk, 0 allows IO use</span>
<a name="l00603"></a>00603 <span class="comment"> * Bits 6:0 Divider value</span>
<a name="l00604"></a>00604 <span class="comment"> * </pre></span>
<a name="l00605"></a>00605 <span class="comment"> */</span>
<a name="l00606"></a>00606 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a80a4f8800742b6b06ec6f1908a448fc8" title="Write daughterboard refclk config register.">write_refclk</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value) = 0;
<a name="l00607"></a>00607
<a name="l00608"></a>00608 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a49074783b3757b6af17ddf8e8f56be6c">write_atr_mask</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value) = 0;
<a name="l00609"></a>00609 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a504bf45d241c56ddf00ee07fc946207e">write_atr_txval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value) = 0;
<a name="l00610"></a>00610 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ae5466590dd7ec5646fefbb82d92ad899">write_atr_rxval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value) = 0;
<a name="l00611"></a>00611 <span class="comment"></span>
<a name="l00612"></a>00612 <span class="comment"> /*!</span>
<a name="l00613"></a>00613 <span class="comment"> * \brief Write auxiliary digital to analog converter.</span>
<a name="l00614"></a>00614 <span class="comment"> *</span>
<a name="l00615"></a>00615 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00616"></a>00616 <span class="comment"> * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.</span>
<a name="l00617"></a>00617 <span class="comment"> * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.</span>
<a name="l00618"></a>00618 <span class="comment"> * \param which_dac [2,3] TX slots must use only 2 and 3.</span>
<a name="l00619"></a>00619 <span class="comment"> * \param value [0,4095]</span>
<a name="l00620"></a>00620 <span class="comment"> * \returns true iff successful</span>
<a name="l00621"></a>00621 <span class="comment"> */</span>
<a name="l00622"></a>00622 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a332790fa84b6b64f82de8983b45b611a" title="Write auxiliary digital to analog converter.">write_aux_dac</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> value) = 0;
<a name="l00623"></a>00623 <span class="comment"></span>
<a name="l00624"></a>00624 <span class="comment"> /*!</span>
<a name="l00625"></a>00625 <span class="comment"> * \brief Read auxiliary analog to digital converter.</span>
<a name="l00626"></a>00626 <span class="comment"> *</span>
<a name="l00627"></a>00627 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00628"></a>00628 <span class="comment"> * \param which_adc [0,1]</span>
<a name="l00629"></a>00629 <span class="comment"> * \param value return 12-bit value [0,4095]</span>
<a name="l00630"></a>00630 <span class="comment"> * \returns true iff successful</span>
<a name="l00631"></a>00631 <span class="comment"> */</span>
<a name="l00632"></a>00632 <span class="keyword">virtual</span> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a7e90fb51366e9d6a8f2c844dbca2798a" title="Read auxiliary analog to digital converter.">read_aux_adc</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc, <span class="keywordtype">int</span> *value) = 0;
<a name="l00633"></a>00633 <span class="comment"></span>
<a name="l00634"></a>00634 <span class="comment"> /*!</span>
<a name="l00635"></a>00635 <span class="comment"> * \brief Read auxiliary analog to digital converter.</span>
<a name="l00636"></a>00636 <span class="comment"> *</span>
<a name="l00637"></a>00637 <span class="comment"> * \param which_side [0,1] which d'board</span>
<a name="l00638"></a>00638 <span class="comment"> * \param which_adc [0,1]</span>
<a name="l00639"></a>00639 <span class="comment"> * \returns value in the range [0,4095] if successful, else READ_FAILED.</span>
<a name="l00640"></a>00640 <span class="comment"> */</span>
<a name="l00641"></a>00641 <span class="keyword">virtual</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a7e90fb51366e9d6a8f2c844dbca2798a" title="Read auxiliary analog to digital converter.">read_aux_adc</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc) = 0;
<a name="l00642"></a>00642 <span class="comment"></span>
<a name="l00643"></a>00643 <span class="comment"> /*!</span>
<a name="l00644"></a>00644 <span class="comment"> * \brief returns current fusb block size</span>
<a name="l00645"></a>00645 <span class="comment"> */</span>
<a name="l00646"></a>00646 <span class="keyword">virtual</span> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a1f769dc9ea28d701fa2f7da2be82325d" title="returns current fusb block size">block_size</a>() <span class="keyword">const</span> = 0;
<a name="l00647"></a>00647 <span class="comment"></span>
<a name="l00648"></a>00648 <span class="comment"> /*!</span>
<a name="l00649"></a>00649 <span class="comment"> * \brief returns A/D or D/A converter rate in Hz</span>
<a name="l00650"></a>00650 <span class="comment"> */</span>
<a name="l00651"></a>00651 <span class="keyword">virtual</span> <span class="keywordtype">long</span> <a class="code" href="classusrp__basic.html#a551a0912d265427e595ba826858cf3d0" title="returns A/D or D/A converter rate in Hz">converter_rate</a>() <span class="keyword">const</span> = 0;
<a name="l00652"></a>00652
<a name="l00653"></a>00653 <span class="comment">// END virtual daughterboard control functions </span>
<a name="l00654"></a>00654
<a name="l00655"></a>00655 <span class="comment">// ----------------------------------------------------------------</span>
<a name="l00656"></a>00656 <span class="comment">// Low level implementation routines.</span>
<a name="l00657"></a>00657 <span class="comment">// You probably shouldn't be using these...</span>
<a name="l00658"></a>00658 <span class="comment">//</span>
<a name="l00659"></a>00659
<a name="l00660"></a>00660 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a4585f9c7df7084a6acb29bd6d7950892">_set_led</a> (<span class="keywordtype">int</span> which_led, <span class="keywordtype">bool</span> on);
<a name="l00661"></a>00661 <span class="comment"></span>
<a name="l00662"></a>00662 <span class="comment"> /*!</span>
<a name="l00663"></a>00663 <span class="comment"> * \brief Write FPGA register.</span>
<a name="l00664"></a>00664 <span class="comment"> * \param regno 7-bit register number</span>
<a name="l00665"></a>00665 <span class="comment"> * \param value 32-bit value</span>
<a name="l00666"></a>00666 <span class="comment"> * \returns true iff successful</span>
<a name="l00667"></a>00667 <span class="comment"> */</span>
<a name="l00668"></a>00668 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4" title="Write FPGA register.">_write_fpga_reg</a> (<span class="keywordtype">int</span> regno, <span class="keywordtype">int</span> value); <span class="comment">//< 7-bit regno, 32-bit value</span>
<a name="l00669"></a>00669 <span class="comment"></span>
<a name="l00670"></a>00670 <span class="comment"> /*!</span>
<a name="l00671"></a>00671 <span class="comment"> * \brief Read FPGA register.</span>
<a name="l00672"></a>00672 <span class="comment"> * \param regno 7-bit register number</span>
<a name="l00673"></a>00673 <span class="comment"> * \param value 32-bit value</span>
<a name="l00674"></a>00674 <span class="comment"> * \returns true iff successful</span>
<a name="l00675"></a>00675 <span class="comment"> */</span>
<a name="l00676"></a>00676 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a4fa26bd8164bd5782adf7fbe00b3d411" title="Read FPGA register.">_read_fpga_reg</a> (<span class="keywordtype">int</span> regno, <span class="keywordtype">int</span> *value); <span class="comment">//< 7-bit regno, 32-bit value</span>
<a name="l00677"></a>00677 <span class="comment"></span>
<a name="l00678"></a>00678 <span class="comment"> /*!</span>
<a name="l00679"></a>00679 <span class="comment"> * \brief Read FPGA register.</span>
<a name="l00680"></a>00680 <span class="comment"> * \param regno 7-bit register number</span>
<a name="l00681"></a>00681 <span class="comment"> * \returns register value if successful, else READ_FAILED</span>
<a name="l00682"></a>00682 <span class="comment"> */</span>
<a name="l00683"></a>00683 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a4fa26bd8164bd5782adf7fbe00b3d411" title="Read FPGA register.">_read_fpga_reg</a> (<span class="keywordtype">int</span> regno);
<a name="l00684"></a>00684 <span class="comment"></span>
<a name="l00685"></a>00685 <span class="comment"> /*!</span>
<a name="l00686"></a>00686 <span class="comment"> * \brief Write FPGA register with mask.</span>
<a name="l00687"></a>00687 <span class="comment"> * \param regno 7-bit register number</span>
<a name="l00688"></a>00688 <span class="comment"> * \param value 16-bit value</span>
<a name="l00689"></a>00689 <span class="comment"> * \param mask 16-bit value</span>
<a name="l00690"></a>00690 <span class="comment"> * \returns true if successful</span>
<a name="l00691"></a>00691 <span class="comment"> * Only use this for registers who actually implement a mask in the verilog firmware, like FR_RX_MASTER_SLAVE</span>
<a name="l00692"></a>00692 <span class="comment"> */</span>
<a name="l00693"></a>00693 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a0c200dc2d39d68d7a77e92859c5228a0" title="Write FPGA register with mask.">_write_fpga_reg_masked</a> (<span class="keywordtype">int</span> regno, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00694"></a>00694 <span class="comment"></span>
<a name="l00695"></a>00695 <span class="comment"> /*!</span>
<a name="l00696"></a>00696 <span class="comment"> * \brief Write AD9862 register.</span>
<a name="l00697"></a>00697 <span class="comment"> * \param which_codec 0 or 1</span>
<a name="l00698"></a>00698 <span class="comment"> * \param regno 6-bit register number</span>
<a name="l00699"></a>00699 <span class="comment"> * \param value 8-bit value</span>
<a name="l00700"></a>00700 <span class="comment"> * \returns true iff successful</span>
<a name="l00701"></a>00701 <span class="comment"> */</span>
<a name="l00702"></a>00702 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a8a25444c83f59f7517d0ff687d2ff053" title="Write AD9862 register.">_write_9862</a> (<span class="keywordtype">int</span> which_codec, <span class="keywordtype">int</span> regno, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> value);
<a name="l00703"></a>00703 <span class="comment"></span>
<a name="l00704"></a>00704 <span class="comment"> /*!</span>
<a name="l00705"></a>00705 <span class="comment"> * \brief Read AD9862 register.</span>
<a name="l00706"></a>00706 <span class="comment"> * \param which_codec 0 or 1</span>
<a name="l00707"></a>00707 <span class="comment"> * \param regno 6-bit register number</span>
<a name="l00708"></a>00708 <span class="comment"> * \param value 8-bit value</span>
<a name="l00709"></a>00709 <span class="comment"> * \returns true iff successful</span>
<a name="l00710"></a>00710 <span class="comment"> */</span>
<a name="l00711"></a>00711 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a3814dc28edce07e3b5cb48bb3ebdf244" title="Read AD9862 register.">_read_9862</a> (<span class="keywordtype">int</span> which_codec, <span class="keywordtype">int</span> regno, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> *value) <span class="keyword">const</span>;
<a name="l00712"></a>00712 <span class="comment"></span>
<a name="l00713"></a>00713 <span class="comment"> /*!</span>
<a name="l00714"></a>00714 <span class="comment"> * \brief Read AD9862 register.</span>
<a name="l00715"></a>00715 <span class="comment"> * \param which_codec 0 or 1</span>
<a name="l00716"></a>00716 <span class="comment"> * \param regno 6-bit register number</span>
<a name="l00717"></a>00717 <span class="comment"> * \returns register value if successful, else READ_FAILED</span>
<a name="l00718"></a>00718 <span class="comment"> */</span>
<a name="l00719"></a>00719 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic.html#a3814dc28edce07e3b5cb48bb3ebdf244" title="Read AD9862 register.">_read_9862</a> (<span class="keywordtype">int</span> which_codec, <span class="keywordtype">int</span> regno) <span class="keyword">const</span>;
<a name="l00720"></a>00720 <span class="comment"></span>
<a name="l00721"></a>00721 <span class="comment"> /*!</span>
<a name="l00722"></a>00722 <span class="comment"> * \brief Write data to SPI bus peripheral.</span>
<a name="l00723"></a>00723 <span class="comment"> *</span>
<a name="l00724"></a>00724 <span class="comment"> * \param optional_header 0,1 or 2 bytes to write before buf.</span>
<a name="l00725"></a>00725 <span class="comment"> * \param enables bitmask of peripherals to write. See usrp_spi_defs.h</span>
<a name="l00726"></a>00726 <span class="comment"> * \param format transaction format. See usrp_spi_defs.h SPI_FMT_*</span>
<a name="l00727"></a>00727 <span class="comment"> * \param buf the data to write</span>
<a name="l00728"></a>00728 <span class="comment"> * \returns true iff successful</span>
<a name="l00729"></a>00729 <span class="comment"> * Writes are limited to a maximum of 64 bytes.</span>
<a name="l00730"></a>00730 <span class="comment"> *</span>
<a name="l00731"></a>00731 <span class="comment"> * If \p format specifies that optional_header bytes are present, they are</span>
<a name="l00732"></a>00732 <span class="comment"> * written to the peripheral immediately prior to writing \p buf.</span>
<a name="l00733"></a>00733 <span class="comment"> */</span>
<a name="l00734"></a>00734 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#aaf100fafc406ef75faafcf3e38df7849" title="Write data to SPI bus peripheral.">_write_spi</a> (<span class="keywordtype">int</span> optional_header, <span class="keywordtype">int</span> enables, <span class="keywordtype">int</span> format, std::string buf);
<a name="l00735"></a>00735
<a name="l00736"></a>00736 <span class="comment">/*</span>
<a name="l00737"></a>00737 <span class="comment"> * \brief Read data from SPI bus peripheral.</span>
<a name="l00738"></a>00738 <span class="comment"> *</span>
<a name="l00739"></a>00739 <span class="comment"> * \param optional_header 0,1 or 2 bytes to write before buf.</span>
<a name="l00740"></a>00740 <span class="comment"> * \param enables bitmask of peripheral to read. See usrp_spi_defs.h</span>
<a name="l00741"></a>00741 <span class="comment"> * \param format transaction format. See usrp_spi_defs.h SPI_FMT_*</span>
<a name="l00742"></a>00742 <span class="comment"> * \param len number of bytes to read. Must be in [0,64].</span>
<a name="l00743"></a>00743 <span class="comment"> * \returns the data read if sucessful, else a zero length string.</span>
<a name="l00744"></a>00744 <span class="comment"> *</span>
<a name="l00745"></a>00745 <span class="comment"> * Reads are limited to a maximum of 64 bytes.</span>
<a name="l00746"></a>00746 <span class="comment"> *</span>
<a name="l00747"></a>00747 <span class="comment"> * If \p format specifies that optional_header bytes are present, they</span>
<a name="l00748"></a>00748 <span class="comment"> * are written to the peripheral first. Then \p len bytes are read from</span>
<a name="l00749"></a>00749 <span class="comment"> * the peripheral and returned.</span>
<a name="l00750"></a>00750 <span class="comment"> */</span>
<a name="l00751"></a>00751 std::string <a class="code" href="classusrp__basic.html#a9b54622fec87c2ed9c7808078931371f">_read_spi</a> (<span class="keywordtype">int</span> optional_header, <span class="keywordtype">int</span> enables, <span class="keywordtype">int</span> format, <span class="keywordtype">int</span> len);
<a name="l00752"></a>00752 <span class="comment"></span>
<a name="l00753"></a>00753 <span class="comment"> /*!</span>
<a name="l00754"></a>00754 <span class="comment"> * \brief Start data transfers.</span>
<a name="l00755"></a>00755 <span class="comment"> * Called in base class to derived class order.</span>
<a name="l00756"></a>00756 <span class="comment"> */</span>
<a name="l00757"></a>00757 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a4291ecf3cc0870baaa12644143182db4" title="Start data transfers. Called in base class to derived class order.">start</a> ();
<a name="l00758"></a>00758 <span class="comment"></span>
<a name="l00759"></a>00759 <span class="comment"> /*!</span>
<a name="l00760"></a>00760 <span class="comment"> * \brief Stop data transfers.</span>
<a name="l00761"></a>00761 <span class="comment"> * Called in base class to derived class order.</span>
<a name="l00762"></a>00762 <span class="comment"> */</span>
<a name="l00763"></a>00763 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic.html#a69292bbc3b47b5ca85d4c0404dc4a58a" title="Stop data transfers. Called in base class to derived class order.">stop</a> ();
<a name="l00764"></a>00764 };
<a name="l00765"></a>00765
<a name="l00766"></a>00766 <span class="comment">/*!</span>
<a name="l00767"></a>00767 <span class="comment"> * \brief class for accessing the receive side of the USRP</span>
<a name="l00768"></a>00768 <span class="comment"> * \ingroup usrp</span>
<a name="l00769"></a>00769 <span class="comment"> */</span>
<a name="l00770"></a><a class="code" href="classusrp__basic__rx.html">00770</a> <span class="keyword">class </span><a class="code" href="classusrp__basic__rx.html" title="class for accessing the receive side of the USRP">usrp_basic_rx</a> : <span class="keyword">public</span> <a class="code" href="classusrp__basic.html" title="abstract base class for usrp operations">usrp_basic</a>
<a name="l00771"></a>00771 {
<a name="l00772"></a>00772 <span class="keyword">private</span>:
<a name="l00773"></a>00773 <a class="code" href="classfusb__devhandle.html" title="abstract usb device handle">fusb_devhandle</a> *d_devhandle;
<a name="l00774"></a>00774 <a class="code" href="classfusb__ephandle.html" title="abstract usb end point handle">fusb_ephandle</a> *d_ephandle;
<a name="l00775"></a>00775 <span class="keywordtype">int</span> d_bytes_seen; <span class="comment">// how many bytes we've seen</span>
<a name="l00776"></a>00776 <span class="keywordtype">bool</span> d_first_read;
<a name="l00777"></a>00777 <span class="keywordtype">bool</span> d_rx_enable;
<a name="l00778"></a>00778
<a name="l00779"></a>00779 <span class="keyword">protected</span>:<span class="comment"></span>
<a name="l00780"></a>00780 <span class="comment"> /*!</span>
<a name="l00781"></a>00781 <span class="comment"> * \param which_board Which USRP board on usb (not particularly useful; use 0)</span>
<a name="l00782"></a>00782 <span class="comment"> * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. </span>
<a name="l00783"></a>00783 <span class="comment"> * Use zero for a reasonable default.</span>
<a name="l00784"></a>00784 <span class="comment"> * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. </span>
<a name="l00785"></a>00785 <span class="comment"> * \param fpga_filename name of the rbf file to load</span>
<a name="l00786"></a>00786 <span class="comment"> * \param firmware_filename name of ihx file to load</span>
<a name="l00787"></a>00787 <span class="comment"> */</span>
<a name="l00788"></a>00788 <a class="code" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx</a> (<span class="keywordtype">int</span> which_board,
<a name="l00789"></a>00789 <span class="keywordtype">int</span> fusb_block_size=0,
<a name="l00790"></a>00790 <span class="keywordtype">int</span> fusb_nblocks=0,
<a name="l00791"></a>00791 <span class="keyword">const</span> std::string fpga_filename = <span class="stringliteral">""</span>,
<a name="l00792"></a>00792 <span class="keyword">const</span> std::string firmware_filename = <span class="stringliteral">""</span>
<a name="l00793"></a>00793 ); <span class="comment">// throws if trouble</span>
<a name="l00794"></a>00794
<a name="l00795"></a>00795 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable</a> (<span class="keywordtype">bool</span> on);
<a name="l00796"></a><a class="code" href="classusrp__basic__rx.html#aa25e7e0e84ec50bd8689889401480f84">00796</a> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#aa25e7e0e84ec50bd8689889401480f84">rx_enable</a> ()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> d_rx_enable; }
<a name="l00797"></a>00797
<a name="l00798"></a>00798 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#aec8c94d230440bb38951e9718755b994">disable_rx</a> (); <span class="comment">// conditional disable, return prev state</span>
<a name="l00799"></a>00799 <span class="keywordtype">void</span> <a class="code" href="classusrp__basic__rx.html#a15a44f86a1a019e94d18f3c19b4cd34a">restore_rx</a> (<span class="keywordtype">bool</span> on); <span class="comment">// conditional set</span>
<a name="l00800"></a>00800
<a name="l00801"></a>00801 <span class="keywordtype">void</span> <a class="code" href="classusrp__basic__rx.html#a9edf0c0a2aeab58f7f12483a02dd14ee">probe_rx_slots</a> (<span class="keywordtype">bool</span> verbose);
<a name="l00802"></a>00802
<a name="l00803"></a>00803 <span class="keyword">public</span>:
<a name="l00804"></a>00804 <a class="code" href="classusrp__basic__rx.html#ae50eef2481209ecaa7eb73bfd0cb513d">~usrp_basic_rx</a> ();
<a name="l00805"></a>00805 <span class="comment"></span>
<a name="l00806"></a>00806 <span class="comment"> /*!</span>
<a name="l00807"></a>00807 <span class="comment"> * \brief invokes constructor, returns instance or 0 if trouble</span>
<a name="l00808"></a>00808 <span class="comment"> *</span>
<a name="l00809"></a>00809 <span class="comment"> * \param which_board Which USRP board on usb (not particularly useful; use 0)</span>
<a name="l00810"></a>00810 <span class="comment"> * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. </span>
<a name="l00811"></a>00811 <span class="comment"> * Use zero for a reasonable default.</span>
<a name="l00812"></a>00812 <span class="comment"> * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. </span>
<a name="l00813"></a>00813 <span class="comment"> * \param fpga_filename name of file that contains image to load into FPGA</span>
<a name="l00814"></a>00814 <span class="comment"> * \param firmware_filename name of file that contains image to load into FX2</span>
<a name="l00815"></a>00815 <span class="comment"> */</span>
<a name="l00816"></a>00816 <span class="keyword">static</span> <a class="code" href="classusrp__basic__rx.html" title="class for accessing the receive side of the USRP">usrp_basic_rx</a> *<a class="code" href="classusrp__basic__rx.html#a86b3cc6a1221f5b6bc8bde83ca990811" title="invokes constructor, returns instance or 0 if trouble">make</a> (<span class="keywordtype">int</span> which_board,
<a name="l00817"></a>00817 <span class="keywordtype">int</span> fusb_block_size=0,
<a name="l00818"></a>00818 <span class="keywordtype">int</span> fusb_nblocks=0,
<a name="l00819"></a>00819 <span class="keyword">const</span> std::string fpga_filename = <span class="stringliteral">""</span>,
<a name="l00820"></a>00820 <span class="keyword">const</span> std::string firmware_filename = <span class="stringliteral">""</span>
<a name="l00821"></a>00821 );
<a name="l00822"></a>00822 <span class="comment"></span>
<a name="l00823"></a>00823 <span class="comment"> /*!</span>
<a name="l00824"></a>00824 <span class="comment"> * \brief tell the fpga the rate rx samples are coming from the A/D's</span>
<a name="l00825"></a>00825 <span class="comment"> *</span>
<a name="l00826"></a>00826 <span class="comment"> * div = fpga_master_clock_freq () / sample_rate</span>
<a name="l00827"></a>00827 <span class="comment"> *</span>
<a name="l00828"></a>00828 <span class="comment"> * sample_rate is determined by a myriad of registers</span>
<a name="l00829"></a>00829 <span class="comment"> * in the 9862. That's why you have to tell us, so</span>
<a name="l00830"></a>00830 <span class="comment"> * we can tell the fpga.</span>
<a name="l00831"></a>00831 <span class="comment"> */</span>
<a name="l00832"></a>00832 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#aba133cd0d5c853a51beb96776e7030fc" title="tell the fpga the rate rx samples are coming from the A/D&#39;s">set_fpga_rx_sample_rate_divisor</a> (<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> div);
<a name="l00833"></a>00833 <span class="comment"></span>
<a name="l00834"></a>00834 <span class="comment"> /*!</span>
<a name="l00835"></a>00835 <span class="comment"> * \brief read data from the D/A's via the FPGA.</span>
<a name="l00836"></a>00836 <span class="comment"> * \p len must be a multiple of 512 bytes.</span>
<a name="l00837"></a>00837 <span class="comment"> *</span>
<a name="l00838"></a>00838 <span class="comment"> * \returns the number of bytes read, or -1 on error.</span>
<a name="l00839"></a>00839 <span class="comment"> *</span>
<a name="l00840"></a>00840 <span class="comment"> * If overrun is non-NULL it will be set true iff an RX overrun is detected.</span>
<a name="l00841"></a>00841 <span class="comment"> */</span>
<a name="l00842"></a>00842 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__rx.html#ac339662f98db1292b636baf9f2db3d0a" title="read data from the D/A&#39;s via the FPGA. len must be a multiple of 512 bytes.">read</a> (<span class="keywordtype">void</span> *buf, <span class="keywordtype">int</span> len, <span class="keywordtype">bool</span> *overrun);
<a name="l00843"></a>00843
<a name="l00844"></a>00844 <span class="comment"></span>
<a name="l00845"></a>00845 <span class="comment"> //! sampling rate of A/D converter</span>
<a name="l00846"></a><a class="code" href="classusrp__basic__rx.html#afd14b376f2449cfb71865c9980ea2358">00846</a> <span class="comment"></span> <span class="keyword">virtual</span> <span class="keywordtype">long</span> <a class="code" href="classusrp__basic__rx.html#afd14b376f2449cfb71865c9980ea2358" title="sampling rate of A/D converter">converter_rate</a>()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic.html#a244d4aa01bb6a054cd5bd0998ce2a09a" title="return frequency of master oscillator on USRP">fpga_master_clock_freq</a>(); } <span class="comment">// 64M</span>
<a name="l00847"></a><a class="code" href="classusrp__basic__rx.html#ace4aa6537246ecf948ec0ae35e1d6e48">00847</a> <span class="keywordtype">long</span> <a class="code" href="classusrp__basic__rx.html#ace4aa6537246ecf948ec0ae35e1d6e48">adc_rate</a>()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic__rx.html#afd14b376f2449cfb71865c9980ea2358" title="sampling rate of A/D converter">converter_rate</a>(); }
<a name="l00848"></a><a class="code" href="classusrp__basic__rx.html#a34128f4864ece7fafc011786c42b9994">00848</a> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__rx.html#a34128f4864ece7fafc011786c42b9994" title="Return daughterboard ID for given side [0,1].">daughterboard_id</a> (<span class="keywordtype">int</span> which_side)<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic.html#a686ea66e3f43c9ab6df60bd80f41ac3b">d_dbid</a>[which_side & 0x1]; }
<a name="l00849"></a>00849
<a name="l00850"></a>00850 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a85804ff6612a34c800a7181ea90de6b4" title="Set Programmable Gain Amplifier (PGA)">set_pga</a> (<span class="keywordtype">int</span> which_amp, <span class="keywordtype">double</span> gain_in_db);
<a name="l00851"></a>00851 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__rx.html#a982d36d1f8d64a5bb2604cf04caa22d4" title="Return programmable gain amplifier gain setting in dB.">pga</a> (<span class="keywordtype">int</span> which_amp) <span class="keyword">const</span>;
<a name="l00852"></a>00852 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__rx.html#a984a57196c26958e2927667ab3abe4cf" title="Return minimum legal PGA gain in dB.">pga_min</a> () <span class="keyword">const</span>;
<a name="l00853"></a>00853 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__rx.html#a2089bd929d76f28a620fc66726b525f4" title="Return maximum legal PGA gain in dB.">pga_max</a> () <span class="keyword">const</span>;
<a name="l00854"></a>00854 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__rx.html#a7c570ad5c2cb879f1b9f2073117ecf51" title="Return hardware step size of PGA (linear in dB).">pga_db_per_step</a> () <span class="keyword">const</span>;
<a name="l00855"></a>00855
<a name="l00856"></a>00856 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a83f39a101787d86a0850e72499286c00" title="Write direction register (output enables) for pins that go to daughterboard.">_write_oe</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00857"></a>00857 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a5ab1edec410f1d5399c187cb243905a5" title="Write daughterboard i/o pin value.">write_io</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00858"></a>00858 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a275d14df1506faa570fd5cc231a14ee9" title="Read daughterboard i/o pin value.">read_io</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> *value);
<a name="l00859"></a>00859 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__rx.html#a275d14df1506faa570fd5cc231a14ee9" title="Read daughterboard i/o pin value.">read_io</a> (<span class="keywordtype">int</span> which_side);
<a name="l00860"></a>00860 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#ac6c7387f1bf488ee22c79be22e3f48dd" title="Write daughterboard refclk config register.">write_refclk</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00861"></a>00861 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a0974bedf9b0406709e83e839f40e2b36">write_atr_mask</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00862"></a>00862 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a914e9b61a4b1441dc955b1dc9cd17742">write_atr_txval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00863"></a>00863 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a7cb8b45ce6815d3ee3c97a064a63e9ee">write_atr_rxval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00864"></a>00864
<a name="l00865"></a>00865 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#ae5cbeedfd6df52cdc4b13c87e2521b97" title="Write auxiliary digital to analog converter.">write_aux_dac</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> value);
<a name="l00866"></a>00866 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#acffe1b022ad3ba669ab2131896ebafbf" title="Read auxiliary analog to digital converter.">read_aux_adc</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc, <span class="keywordtype">int</span> *value);
<a name="l00867"></a>00867 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__rx.html#acffe1b022ad3ba669ab2131896ebafbf" title="Read auxiliary analog to digital converter.">read_aux_adc</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc);
<a name="l00868"></a>00868
<a name="l00869"></a>00869 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__rx.html#ab42bca6a45be1e18e074b494905db7db" title="returns current fusb block size">block_size</a>() <span class="keyword">const</span>;
<a name="l00870"></a>00870
<a name="l00871"></a>00871 <span class="comment">// called in base class to derived class order</span>
<a name="l00872"></a>00872 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a6097b0d8b2cac9a67237368d1a81b7f4" title="Start data transfers. Called in base class to derived class order.">start</a> ();
<a name="l00873"></a>00873 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__rx.html#a094cb05d34da15711c6ca5c4b24defe9" title="Stop data transfers. Called in base class to derived class order.">stop</a> ();
<a name="l00874"></a>00874 };
<a name="l00875"></a>00875
<a name="l00876"></a>00876 <span class="comment">/*!</span>
<a name="l00877"></a>00877 <span class="comment"> * \brief class for accessing the transmit side of the USRP</span>
<a name="l00878"></a>00878 <span class="comment"> * \ingroup usrp</span>
<a name="l00879"></a>00879 <span class="comment"> */</span>
<a name="l00880"></a><a class="code" href="classusrp__basic__tx.html">00880</a> <span class="keyword">class </span><a class="code" href="classusrp__basic__tx.html" title="class for accessing the transmit side of the USRP">usrp_basic_tx</a> : <span class="keyword">public</span> <a class="code" href="classusrp__basic.html" title="abstract base class for usrp operations">usrp_basic</a>
<a name="l00881"></a>00881 {
<a name="l00882"></a>00882 <span class="keyword">private</span>:
<a name="l00883"></a>00883 <a class="code" href="classfusb__devhandle.html" title="abstract usb device handle">fusb_devhandle</a> *d_devhandle;
<a name="l00884"></a>00884 <a class="code" href="classfusb__ephandle.html" title="abstract usb end point handle">fusb_ephandle</a> *d_ephandle;
<a name="l00885"></a>00885 <span class="keywordtype">int</span> d_bytes_seen; <span class="comment">// how many bytes we've seen</span>
<a name="l00886"></a>00886 <span class="keywordtype">bool</span> d_first_write;
<a name="l00887"></a>00887 <span class="keywordtype">bool</span> d_tx_enable;
<a name="l00888"></a>00888
<a name="l00889"></a>00889 <span class="keyword">protected</span>:<span class="comment"></span>
<a name="l00890"></a>00890 <span class="comment"> /*!</span>
<a name="l00891"></a>00891 <span class="comment"> * \param which_board Which USRP board on usb (not particularly useful; use 0)</span>
<a name="l00892"></a>00892 <span class="comment"> * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512.</span>
<a name="l00893"></a>00893 <span class="comment"> * Use zero for a reasonable default.</span>
<a name="l00894"></a>00894 <span class="comment"> * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default.</span>
<a name="l00895"></a>00895 <span class="comment"> * \param fpga_filename name of file that contains image to load into FPGA</span>
<a name="l00896"></a>00896 <span class="comment"> * \param firmware_filename name of file that contains image to load into FX2</span>
<a name="l00897"></a>00897 <span class="comment"> */</span>
<a name="l00898"></a>00898 <a class="code" href="classusrp__basic__tx.html#ab8bb942f1c956624553ac18b0a838bd6">usrp_basic_tx</a> (<span class="keywordtype">int</span> which_board,
<a name="l00899"></a>00899 <span class="keywordtype">int</span> fusb_block_size=0,
<a name="l00900"></a>00900 <span class="keywordtype">int</span> fusb_nblocks=0,
<a name="l00901"></a>00901 <span class="keyword">const</span> std::string fpga_filename = <span class="stringliteral">""</span>,
<a name="l00902"></a>00902 <span class="keyword">const</span> std::string firmware_filename = <span class="stringliteral">""</span>
<a name="l00903"></a>00903 ); <span class="comment">// throws if trouble</span>
<a name="l00904"></a>00904
<a name="l00905"></a>00905 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a13148a03a6d6df2be95679bc2bbea896">set_tx_enable</a> (<span class="keywordtype">bool</span> on);
<a name="l00906"></a><a class="code" href="classusrp__basic__tx.html#ada7b24a807ade928dc5e57e823002f6d">00906</a> <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#ada7b24a807ade928dc5e57e823002f6d">tx_enable</a> ()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> d_tx_enable; }
<a name="l00907"></a>00907
<a name="l00908"></a>00908 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a2298762ed6e3f39c000a141a4964e181">disable_tx</a> (); <span class="comment">// conditional disable, return prev state</span>
<a name="l00909"></a>00909 <span class="keywordtype">void</span> <a class="code" href="classusrp__basic__tx.html#a7dd7dc05a7767f38ce25b407a705c2d5">restore_tx</a> (<span class="keywordtype">bool</span> on); <span class="comment">// conditional set</span>
<a name="l00910"></a>00910
<a name="l00911"></a>00911 <span class="keywordtype">void</span> <a class="code" href="classusrp__basic__tx.html#ac9e8934cb2136fd9c1f0bb2677991df0">probe_tx_slots</a> (<span class="keywordtype">bool</span> verbose);
<a name="l00912"></a>00912
<a name="l00913"></a>00913 <span class="keyword">public</span>:
<a name="l00914"></a>00914
<a name="l00915"></a>00915 <a class="code" href="classusrp__basic__tx.html#a1742407fda891ebf3eea8f297310e455">~usrp_basic_tx</a> ();
<a name="l00916"></a>00916 <span class="comment"></span>
<a name="l00917"></a>00917 <span class="comment"> /*!</span>
<a name="l00918"></a>00918 <span class="comment"> * \brief invokes constructor, returns instance or 0 if trouble</span>
<a name="l00919"></a>00919 <span class="comment"> *</span>
<a name="l00920"></a>00920 <span class="comment"> * \param which_board Which USRP board on usb (not particularly useful; use 0)</span>
<a name="l00921"></a>00921 <span class="comment"> * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. </span>
<a name="l00922"></a>00922 <span class="comment"> * Use zero for a reasonable default.</span>
<a name="l00923"></a>00923 <span class="comment"> * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. </span>
<a name="l00924"></a>00924 <span class="comment"> * \param fpga_filename name of file that contains image to load into FPGA</span>
<a name="l00925"></a>00925 <span class="comment"> * \param firmware_filename name of file that contains image to load into FX2</span>
<a name="l00926"></a>00926 <span class="comment"> */</span>
<a name="l00927"></a>00927 <span class="keyword">static</span> <a class="code" href="classusrp__basic__tx.html" title="class for accessing the transmit side of the USRP">usrp_basic_tx</a> *<a class="code" href="classusrp__basic__tx.html#a44841415c4bd1f000ccc6f748050cc57" title="invokes constructor, returns instance or 0 if trouble">make</a> (<span class="keywordtype">int</span> which_board, <span class="keywordtype">int</span> fusb_block_size=0, <span class="keywordtype">int</span> fusb_nblocks=0,
<a name="l00928"></a>00928 <span class="keyword">const</span> std::string fpga_filename = <span class="stringliteral">""</span>,
<a name="l00929"></a>00929 <span class="keyword">const</span> std::string firmware_filename = <span class="stringliteral">""</span>
<a name="l00930"></a>00930 );
<a name="l00931"></a>00931 <span class="comment"></span>
<a name="l00932"></a>00932 <span class="comment"> /*!</span>
<a name="l00933"></a>00933 <span class="comment"> * \brief tell the fpga the rate tx samples are going to the D/A's</span>
<a name="l00934"></a>00934 <span class="comment"> *</span>
<a name="l00935"></a>00935 <span class="comment"> * div = fpga_master_clock_freq () * 2</span>
<a name="l00936"></a>00936 <span class="comment"> *</span>
<a name="l00937"></a>00937 <span class="comment"> * sample_rate is determined by a myriad of registers</span>
<a name="l00938"></a>00938 <span class="comment"> * in the 9862. That's why you have to tell us, so</span>
<a name="l00939"></a>00939 <span class="comment"> * we can tell the fpga.</span>
<a name="l00940"></a>00940 <span class="comment"> */</span>
<a name="l00941"></a>00941 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a51d29f5416c2db61e74e1938aa22af72" title="tell the fpga the rate tx samples are going to the D/A&#39;s">set_fpga_tx_sample_rate_divisor</a> (<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> div);
<a name="l00942"></a>00942 <span class="comment"></span>
<a name="l00943"></a>00943 <span class="comment"> /*!</span>
<a name="l00944"></a>00944 <span class="comment"> * \brief Write data to the A/D's via the FPGA.</span>
<a name="l00945"></a>00945 <span class="comment"> *</span>
<a name="l00946"></a>00946 <span class="comment"> * \p len must be a multiple of 512 bytes.</span>
<a name="l00947"></a>00947 <span class="comment"> * \returns number of bytes written or -1 on error.</span>
<a name="l00948"></a>00948 <span class="comment"> *</span>
<a name="l00949"></a>00949 <span class="comment"> * if \p underrun is non-NULL, it will be set to true iff</span>
<a name="l00950"></a>00950 <span class="comment"> * a transmit underrun condition is detected.</span>
<a name="l00951"></a>00951 <span class="comment"> */</span>
<a name="l00952"></a>00952 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__tx.html#a0dd15899a23869336f455fa948b725af" title="Write data to the A/D&#39;s via the FPGA.">write</a> (<span class="keyword">const</span> <span class="keywordtype">void</span> *buf, <span class="keywordtype">int</span> len, <span class="keywordtype">bool</span> *underrun);
<a name="l00953"></a>00953
<a name="l00954"></a>00954 <span class="comment">/*</span>
<a name="l00955"></a>00955 <span class="comment"> * Block until all outstanding writes have completed.</span>
<a name="l00956"></a>00956 <span class="comment"> * This is typically used to assist with benchmarking</span>
<a name="l00957"></a>00957 <span class="comment"> */</span>
<a name="l00958"></a>00958 <span class="keywordtype">void</span> <a class="code" href="classusrp__basic__tx.html#ad6486f2bff896af6109a338d7d954d50">wait_for_completion</a> ();
<a name="l00959"></a>00959 <span class="comment"></span>
<a name="l00960"></a>00960 <span class="comment"> //! sampling rate of D/A converter</span>
<a name="l00961"></a><a class="code" href="classusrp__basic__tx.html#a4eefc136417ea3a75a296c1b6dbbd470">00961</a> <span class="comment"></span> <span class="keyword">virtual</span> <span class="keywordtype">long</span> <a class="code" href="classusrp__basic__tx.html#a4eefc136417ea3a75a296c1b6dbbd470" title="sampling rate of D/A converter">converter_rate</a>()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic.html#a244d4aa01bb6a054cd5bd0998ce2a09a" title="return frequency of master oscillator on USRP">fpga_master_clock_freq</a> () * 2; } <span class="comment">// 128M</span>
<a name="l00962"></a><a class="code" href="classusrp__basic__tx.html#a618be27f79f9ab769f33ead42c9283a7">00962</a> <span class="keywordtype">long</span> <a class="code" href="classusrp__basic__tx.html#a618be27f79f9ab769f33ead42c9283a7">dac_rate</a>()<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic__tx.html#a4eefc136417ea3a75a296c1b6dbbd470" title="sampling rate of D/A converter">converter_rate</a>(); }
<a name="l00963"></a><a class="code" href="classusrp__basic__tx.html#a25ef6153080bcd83637c87df6ea1d478">00963</a> <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__tx.html#a25ef6153080bcd83637c87df6ea1d478" title="Return daughterboard ID for given side [0,1].">daughterboard_id</a> (<span class="keywordtype">int</span> which_side)<span class="keyword"> const </span>{ <span class="keywordflow">return</span> <a class="code" href="classusrp__basic.html#a686ea66e3f43c9ab6df60bd80f41ac3b">d_dbid</a>[which_side & 0x1]; }
<a name="l00964"></a>00964
<a name="l00965"></a>00965 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a5d950d5f8a8969e17525cee918d9bd06" title="Set Programmable Gain Amplifier (PGA)">set_pga</a> (<span class="keywordtype">int</span> which_amp, <span class="keywordtype">double</span> gain_in_db);
<a name="l00966"></a>00966 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__tx.html#aa7764a14b980820287ebe3d50a303fbd" title="Return programmable gain amplifier gain setting in dB.">pga</a> (<span class="keywordtype">int</span> which_amp) <span class="keyword">const</span>;
<a name="l00967"></a>00967 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__tx.html#a7cae37094ad8d1a0095fc058649829d0" title="Return minimum legal PGA gain in dB.">pga_min</a> () <span class="keyword">const</span>;
<a name="l00968"></a>00968 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__tx.html#ac451445ef6cffdffb9e7817c3885f367" title="Return maximum legal PGA gain in dB.">pga_max</a> () <span class="keyword">const</span>;
<a name="l00969"></a>00969 <span class="keywordtype">double</span> <a class="code" href="classusrp__basic__tx.html#ac8f1b5ab8940fba58fe01d64727deb40" title="Return hardware step size of PGA (linear in dB).">pga_db_per_step</a> () <span class="keyword">const</span>;
<a name="l00970"></a>00970
<a name="l00971"></a>00971 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a0ecdfcb63c28d66b2f036156e33f20d8" title="Write direction register (output enables) for pins that go to daughterboard.">_write_oe</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00972"></a>00972 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a19a1a1db062ac7d3d4625c95770353ff" title="Write daughterboard i/o pin value.">write_io</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value, <span class="keywordtype">int</span> mask);
<a name="l00973"></a>00973 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#ad5b21bcc2798026f5a1555e9ca4c899f" title="Read daughterboard i/o pin value.">read_io</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> *value);
<a name="l00974"></a>00974 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__tx.html#ad5b21bcc2798026f5a1555e9ca4c899f" title="Read daughterboard i/o pin value.">read_io</a> (<span class="keywordtype">int</span> which_side);
<a name="l00975"></a>00975 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a6076561547b3912ea535334e6e6d4c2f" title="Write daughterboard refclk config register.">write_refclk</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00976"></a>00976 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a8cfd094ce093e5d46fcad5531ee20570">write_atr_mask</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00977"></a>00977 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#af4c224f2e92a07ded29fc6dedba8c2d7">write_atr_txval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00978"></a>00978 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a01b222b0ba0a365db87ab74731325d5b">write_atr_rxval</a>(<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> value);
<a name="l00979"></a>00979
<a name="l00980"></a>00980 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a2d3f6eda1859921bb7c0f26d2dd1163d" title="Write auxiliary digital to analog converter.">write_aux_dac</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_dac, <span class="keywordtype">int</span> value);
<a name="l00981"></a>00981 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a237f04837e77f428551b6b66217f8d9b" title="Read auxiliary analog to digital converter.">read_aux_adc</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc, <span class="keywordtype">int</span> *value);
<a name="l00982"></a>00982 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__tx.html#a237f04837e77f428551b6b66217f8d9b" title="Read auxiliary analog to digital converter.">read_aux_adc</a> (<span class="keywordtype">int</span> which_side, <span class="keywordtype">int</span> which_adc);
<a name="l00983"></a>00983
<a name="l00984"></a>00984 <span class="keywordtype">int</span> <a class="code" href="classusrp__basic__tx.html#a3d88f6bddfb24f2ad375b65b935ac6e9" title="returns current fusb block size">block_size</a>() <span class="keyword">const</span>;
<a name="l00985"></a>00985
<a name="l00986"></a>00986 <span class="comment">// called in base class to derived class order</span>
<a name="l00987"></a>00987 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#a3d16b0d8e96d5124b6392bc44014124d" title="Start data transfers. Called in base class to derived class order.">start</a> ();
<a name="l00988"></a>00988 <span class="keywordtype">bool</span> <a class="code" href="classusrp__basic__tx.html#ab1c5851e72e29e86af914da5c7f62cf8" title="Stop data transfers. Called in base class to derived class order.">stop</a> ();
<a name="l00989"></a>00989 };
<a name="l00990"></a>00990
<a name="l00991"></a>00991 <span class="preprocessor">#endif</span>
</pre></div></div>
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