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<h1>usrp_basic_rx Class Reference</h1> </div>
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<!-- doxytag: class="usrp_basic_rx" --><!-- doxytag: inherits="usrp_basic" -->
<p>class for accessing the receive side of the USRP
<a href="#_details">More...</a></p>
<p><code>#include <<a class="el" href="usrp__basic_8h_source.html">usrp_basic.h</a>></code></p>
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Inheritance diagram for usrp_basic_rx:</div>
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<area shape="rect" id="node5" href="classusrp__standard__rx.html" title="The C++ interface the receive side of the USRPThis is the recommended interface to USRP receive funct..." alt="" coords="5,160,128,189"/><area shape="rect" id="node2" href="classusrp__basic.html" title="abstract base class for usrp operations" alt="" coords="24,5,109,35"/></map>
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Collaboration diagram for usrp_basic_rx:</div>
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<area shape="rect" id="node2" href="classusrp__basic.html" title="abstract base class for usrp operations" alt="" coords="5,101,91,131"/><area shape="rect" id="node4" href="structusb__dev__handle.html" title="usb_dev_handle" alt="" coords="59,5,173,35"/><area shape="rect" id="node6" href="classfusb__devhandle.html" title="abstract usb device handle" alt="" coords="115,101,227,131"/><area shape="rect" id="node9" href="classfusb__ephandle.html" title="abstract usb end point handle" alt="" coords="251,101,357,131"/></map>
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<p><a href="classusrp__basic__rx-members.html">List of all members.</a></p>
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<tr><td colspan="2"><h2><a name="pub-methods"></a>
Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#ae50eef2481209ecaa7eb73bfd0cb513d">~usrp_basic_rx</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#aba133cd0d5c853a51beb96776e7030fc">set_fpga_rx_sample_rate_divisor</a> (unsigned int div)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">tell the fpga the rate rx samples are coming from the A/D's <a href="#aba133cd0d5c853a51beb96776e7030fc"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#ac339662f98db1292b636baf9f2db3d0a">read</a> (void *buf, int len, bool *overrun)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">read data from the D/A's via the FPGA. <code>len</code> must be a multiple of 512 bytes. <a href="#ac339662f98db1292b636baf9f2db3d0a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">virtual long </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#afd14b376f2449cfb71865c9980ea2358">converter_rate</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">sampling rate of A/D converter <a href="#afd14b376f2449cfb71865c9980ea2358"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">long </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#ace4aa6537246ecf948ec0ae35e1d6e48">adc_rate</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a34128f4864ece7fafc011786c42b9994">daughterboard_id</a> (int which_side) const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return daughterboard ID for given side [0,1]. <a href="#a34128f4864ece7fafc011786c42b9994"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a85804ff6612a34c800a7181ea90de6b4">set_pga</a> (int which_amp, double gain_in_db)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set Programmable Gain Amplifier (PGA) <a href="#a85804ff6612a34c800a7181ea90de6b4"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a982d36d1f8d64a5bb2604cf04caa22d4">pga</a> (int which_amp) const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return programmable gain amplifier gain setting in dB. <a href="#a982d36d1f8d64a5bb2604cf04caa22d4"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a984a57196c26958e2927667ab3abe4cf">pga_min</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return minimum legal PGA gain in dB. <a href="#a984a57196c26958e2927667ab3abe4cf"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a2089bd929d76f28a620fc66726b525f4">pga_max</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return maximum legal PGA gain in dB. <a href="#a2089bd929d76f28a620fc66726b525f4"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a7c570ad5c2cb879f1b9f2073117ecf51">pga_db_per_step</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Return hardware step size of PGA (linear in dB). <a href="#a7c570ad5c2cb879f1b9f2073117ecf51"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a83f39a101787d86a0850e72499286c00">_write_oe</a> (int which_side, int value, int mask)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write direction register (output enables) for pins that go to daughterboard. <a href="#a83f39a101787d86a0850e72499286c00"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a5ab1edec410f1d5399c187cb243905a5">write_io</a> (int which_side, int value, int mask)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write daughterboard i/o pin value. <a href="#a5ab1edec410f1d5399c187cb243905a5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a275d14df1506faa570fd5cc231a14ee9">read_io</a> (int which_side, int *value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read daughterboard i/o pin value. <a href="#a275d14df1506faa570fd5cc231a14ee9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a67b0c263712cd5bd56f48e6bd8754bc6">read_io</a> (int which_side)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read daughterboard i/o pin value. <a href="#a67b0c263712cd5bd56f48e6bd8754bc6"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#ac6c7387f1bf488ee22c79be22e3f48dd">write_refclk</a> (int which_side, int value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write daughterboard refclk config register. <a href="#ac6c7387f1bf488ee22c79be22e3f48dd"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a0974bedf9b0406709e83e839f40e2b36">write_atr_mask</a> (int which_side, int value)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a914e9b61a4b1441dc955b1dc9cd17742">write_atr_txval</a> (int which_side, int value)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a7cb8b45ce6815d3ee3c97a064a63e9ee">write_atr_rxval</a> (int which_side, int value)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#ae5cbeedfd6df52cdc4b13c87e2521b97">write_aux_dac</a> (int which_side, int which_dac, int value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Write auxiliary digital to analog converter. <a href="#ae5cbeedfd6df52cdc4b13c87e2521b97"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#acffe1b022ad3ba669ab2131896ebafbf">read_aux_adc</a> (int which_side, int which_adc, int *value)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read auxiliary analog to digital converter. <a href="#acffe1b022ad3ba669ab2131896ebafbf"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#aedc2bc043ad6fed139274328a39a11be">read_aux_adc</a> (int which_side, int which_adc)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Read auxiliary analog to digital converter. <a href="#aedc2bc043ad6fed139274328a39a11be"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#ab42bca6a45be1e18e074b494905db7db">block_size</a> () const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">returns current fusb block size <a href="#ab42bca6a45be1e18e074b494905db7db"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a6097b0d8b2cac9a67237368d1a81b7f4">start</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Start data transfers. Called in base class to derived class order. <a href="#a6097b0d8b2cac9a67237368d1a81b7f4"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a094cb05d34da15711c6ca5c4b24defe9">stop</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Stop data transfers. Called in base class to derived class order. <a href="#a094cb05d34da15711c6ca5c4b24defe9"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pub-static-methods"></a>
Static Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static <a class="el" href="classusrp__basic__rx.html">usrp_basic_rx</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a81f51a370ce934e853969e487e2214df">make</a> (int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">invokes constructor, returns instance or 0 if trouble <a href="#a81f51a370ce934e853969e487e2214df"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pro-methods"></a>
Protected Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx</a> (int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable</a> (bool on)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#aa25e7e0e84ec50bd8689889401480f84">rx_enable</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#aec8c94d230440bb38951e9718755b994">disable_rx</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a15a44f86a1a019e94d18f3c19b4cd34a">restore_rx</a> (bool on)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__basic__rx.html#a9edf0c0a2aeab58f7f12483a02dd14ee">probe_rx_slots</a> (bool verbose)</td></tr>
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<hr/><a name="_details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>class for accessing the receive side of the USRP </p>
</div><hr/><h2>Constructor & Destructor Documentation</h2>
<a class="anchor" id="acbda9587edf161df5aa2c504e42096ff"></a><!-- doxytag: member="usrp_basic_rx::usrp_basic_rx" ref="acbda9587edf161df5aa2c504e42096ff" args="(int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")" -->
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<td class="memname">usrp_basic_rx::usrp_basic_rx </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_board</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">int </td>
<td class="paramname"><em>fusb_block_size</em> = <code>0</code>, </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>fusb_nblocks</em> = <code>0</code>, </td>
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<td class="paramtype">const std::string </td>
<td class="paramname"><em>fpga_filename</em> = <code>""</code>, </td>
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<td class="paramtype">const std::string </td>
<td class="paramname"><em>firmware_filename</em> = <code>""</code> </td>
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<td>)</td>
<td></td><td><code> [protected]</code></td>
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<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_board</td><td>Which USRP board on usb (not particularly useful; use 0) </td></tr>
<tr><td class="paramname">fusb_block_size</td><td>fast usb xfer block size. Must be a multiple of 512. Use zero for a reasonable default. </td></tr>
<tr><td class="paramname">fusb_nblocks</td><td>number of fast usb URBs to allocate. Use zero for a reasonable default. </td></tr>
<tr><td class="paramname">fpga_filename</td><td>name of the rbf file to load </td></tr>
<tr><td class="paramname">firmware_filename</td><td>name of ihx file to load </td></tr>
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</dd>
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<p>References <a class="el" href="classusrp__basic.html#a10536cd0fe631c3a1084c0404873ad5b">usrp_basic::d_udh</a>, <a class="el" href="classfusb__sysconfig.html#a4cda421aeeb13395e7dbd01894ac9d34">fusb_sysconfig::default_block_size()</a>, <a class="el" href="classfusb__sysconfig.html#a32801a0df8bab420add3f09b83fb2e8f">fusb_sysconfig::make_devhandle()</a>, <a class="el" href="classfusb__devhandle.html#a9783b6b0082f783dc7638ff557998ff2">fusb_devhandle::make_ephandle()</a>, <a class="el" href="classusrp__basic__rx.html#a9edf0c0a2aeab58f7f12483a02dd14ee">probe_rx_slots()</a>, <a class="el" href="ad9862_8h.html#aa0fcba5d524230a122c57078342ad852">REG_RX_PWR_DN</a>, <a class="el" href="classusrp__basic.html#af20cc324fca8d089226d5a6dfc3d3668">usrp_basic::set_dc_offset_cl_enable()</a>, <a class="el" href="classusrp__basic__rx.html#aba133cd0d5c853a51beb96776e7030fc">set_fpga_rx_sample_rate_divisor()</a>, <a class="el" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable()</a>, <a class="el" href="usrp__prims_8cc.html#ab3cfffe0284bd7b4c512e86cb961204b">usrp_9862_write()</a>, <a class="el" href="usrp__prims_8cc.html#aac1c325a03646703c3432aa66ed886dc">usrp_9862_write_many_all()</a>, <a class="el" href="usrp__prims_8cc.html#ac684986a93d10687ba66ab50c1cfc5ae">usrp_set_fpga_rx_reset()</a>, <a class="el" href="classusrp__basic__rx.html#a0974bedf9b0406709e83e839f40e2b36">write_atr_mask()</a>, <a class="el" href="classusrp__basic__rx.html#a7cb8b45ce6815d3ee3c97a064a63e9ee">write_atr_rxval()</a>, and <a class="el" href="classusrp__basic__rx.html#a914e9b61a4b1441dc955b1dc9cd17742">write_atr_txval()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#a81f51a370ce934e853969e487e2214df">make()</a>.</p>
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<a class="anchor" id="ae50eef2481209ecaa7eb73bfd0cb513d"></a><!-- doxytag: member="usrp_basic_rx::~usrp_basic_rx" ref="ae50eef2481209ecaa7eb73bfd0cb513d" args="()" -->
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<td class="memname">usrp_basic_rx::~usrp_basic_rx </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
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<p>References <a class="el" href="classusrp__basic.html#a10536cd0fe631c3a1084c0404873ad5b">usrp_basic::d_udh</a>, <a class="el" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable()</a>, <a class="el" href="classusrp__basic.html#afaae41796f1468062d4ad237322baf9e">usrp_basic::shutdown_daughterboards()</a>, <a class="el" href="classfusb__ephandle.html#a3cfe2cbb78870a6ce0ec8f696ebe45ab">fusb_ephandle::stop()</a>, and <a class="el" href="usrp__prims_8cc.html#aac1c325a03646703c3432aa66ed886dc">usrp_9862_write_many_all()</a>.</p>
</div>
</div>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a83f39a101787d86a0850e72499286c00"></a><!-- doxytag: member="usrp_basic_rx::_write_oe" ref="a83f39a101787d86a0850e72499286c00" args="(int which_side, int value, int mask)" -->
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<td class="memname">bool usrp_basic_rx::_write_oe </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mask</em> </td>
</tr>
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<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
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<p>Write direction register (output enables) for pins that go to daughterboard. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which size </td></tr>
<tr><td class="paramname">value</td><td>value to write into register </td></tr>
<tr><td class="paramname">mask</td><td>which bits of value to write into reg</td></tr>
</table>
</dd>
</dl>
<p>Each d'board has 16-bits of general purpose i/o. Setting the bit makes it an output from the FPGA to the d'board.</p>
<p>This register is initialized based on a value stored in the d'board EEPROM. In general, you shouldn't be using this routine without a very good reason. Using this method incorrectly will kill your USRP motherboard and/or daughterboard. </p>
<p>Implements <a class="el" href="classusrp__basic.html#ac540c04b719f1ce30426ecb2214107ef">usrp_basic</a>.</p>
<p>References <a class="el" href="classusrp__basic.html#a09ce78134eea035e42464123356096e4">usrp_basic::_common_write_oe()</a>, and <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>.</p>
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<a class="anchor" id="ace4aa6537246ecf948ec0ae35e1d6e48"></a><!-- doxytag: member="usrp_basic_rx::adc_rate" ref="ace4aa6537246ecf948ec0ae35e1d6e48" args="() const " -->
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<td class="memname">long usrp_basic_rx::adc_rate </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const<code> [inline]</code></td>
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<p>References <a class="el" href="classusrp__basic__rx.html#afd14b376f2449cfb71865c9980ea2358">converter_rate()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#af75a82a32f50117b4acfe518b0c31e89">usrp_standard_rx::set_decim_rate()</a>, and <a class="el" href="classusrp__standard__rx.html#a4f3584afcc01962580cf420015d93cda">usrp_standard_rx::set_rx_freq()</a>.</p>
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<a class="anchor" id="ab42bca6a45be1e18e074b494905db7db"></a><!-- doxytag: member="usrp_basic_rx::block_size" ref="ab42bca6a45be1e18e074b494905db7db" args="() const " -->
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<td class="memname">int usrp_basic_rx::block_size </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const<code> [virtual]</code></td>
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<p>returns current fusb block size </p>
<p>Implements <a class="el" href="classusrp__basic.html#a1f769dc9ea28d701fa2f7da2be82325d">usrp_basic</a>.</p>
<p>References <a class="el" href="classfusb__ephandle.html#a969c00b4d8ef3c8ad6444eb92da7a61c">fusb_ephandle::block_size()</a>.</p>
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<a class="anchor" id="afd14b376f2449cfb71865c9980ea2358"></a><!-- doxytag: member="usrp_basic_rx::converter_rate" ref="afd14b376f2449cfb71865c9980ea2358" args="() const " -->
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<td class="memname">virtual long usrp_basic_rx::converter_rate </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const<code> [inline, virtual]</code></td>
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<p>sampling rate of A/D converter </p>
<p>Implements <a class="el" href="classusrp__basic.html#a551a0912d265427e595ba826858cf3d0">usrp_basic</a>.</p>
<p>References <a class="el" href="classusrp__basic.html#a244d4aa01bb6a054cd5bd0998ce2a09a">usrp_basic::fpga_master_clock_freq()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#ace4aa6537246ecf948ec0ae35e1d6e48">adc_rate()</a>, and <a class="el" href="classusrp__standard__rx.html#a261d53e643bfc5e6bdaa2f84a070bd42">usrp_standard_rx::tune()</a>.</p>
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<a class="anchor" id="a34128f4864ece7fafc011786c42b9994"></a><!-- doxytag: member="usrp_basic_rx::daughterboard_id" ref="a34128f4864ece7fafc011786c42b9994" args="(int which_side) const " -->
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<td class="memname">int usrp_basic_rx::daughterboard_id </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em></td><td>)</td>
<td> const<code> [inline, virtual]</code></td>
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<p>Return daughterboard ID for given side [0,1]. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which daughterboard</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>daughterboard id >= 0 if successful </dd>
<dd>
-1 if no daugherboard </dd>
<dd>
-2 if invalid EEPROM on daughterboard </dd></dl>
<p>Implements <a class="el" href="classusrp__basic.html#a6d639e50633c165b23e0c4770b26bec2">usrp_basic</a>.</p>
<p>References <a class="el" href="classusrp__basic.html#a686ea66e3f43c9ab6df60bd80f41ac3b">usrp_basic::d_dbid</a>.</p>
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<a class="anchor" id="aec8c94d230440bb38951e9718755b994"></a><!-- doxytag: member="usrp_basic_rx::disable_rx" ref="aec8c94d230440bb38951e9718755b994" args="()" -->
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<td class="memname">bool usrp_basic_rx::disable_rx </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td><code> [protected]</code></td>
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<p>References <a class="el" href="classusrp__basic__rx.html#aa25e7e0e84ec50bd8689889401480f84">rx_enable()</a>, and <a class="el" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#af75a82a32f50117b4acfe518b0c31e89">usrp_standard_rx::set_decim_rate()</a>, and <a class="el" href="classusrp__standard__rx.html#a182048083827bf3e2efddb918677e51e">usrp_standard_rx::write_hw_mux_reg()</a>.</p>
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<a class="anchor" id="a81f51a370ce934e853969e487e2214df"></a><!-- doxytag: member="usrp_basic_rx::make" ref="a81f51a370ce934e853969e487e2214df" args="(int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")" -->
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<td class="memname"><a class="el" href="classusrp__basic__rx.html">usrp_basic_rx</a> * usrp_basic_rx::make </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_board</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>fusb_block_size</em> = <code>0</code>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>fusb_nblocks</em> = <code>0</code>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::string </td>
<td class="paramname"><em>fpga_filename</em> = <code>""</code>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::string </td>
<td class="paramname"><em>firmware_filename</em> = <code>""</code> </td>
</tr>
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<td></td>
<td>)</td>
<td></td><td><code> [static]</code></td>
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<p>invokes constructor, returns instance or 0 if trouble </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_board</td><td>Which USRP board on usb (not particularly useful; use 0) </td></tr>
<tr><td class="paramname">fusb_block_size</td><td>fast usb xfer block size. Must be a multiple of 512. Use zero for a reasonable default. </td></tr>
<tr><td class="paramname">fusb_nblocks</td><td>number of fast usb URBs to allocate. Use zero for a reasonable default. </td></tr>
<tr><td class="paramname">fpga_filename</td><td>name of file that contains image to load into FPGA </td></tr>
<tr><td class="paramname">firmware_filename</td><td>name of file that contains image to load into FX2 </td></tr>
</table>
</dd>
</dl>
<p>References <a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx()</a>.</p>
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<a class="anchor" id="a982d36d1f8d64a5bb2604cf04caa22d4"></a><!-- doxytag: member="usrp_basic_rx::pga" ref="a982d36d1f8d64a5bb2604cf04caa22d4" args="(int which_amp) const " -->
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<td class="memname">double usrp_basic_rx::pga </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_amp</em></td><td>)</td>
<td> const<code> [virtual]</code></td>
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<p>Return programmable gain amplifier gain setting in dB. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_amp</td><td>which amp [0,3] </td></tr>
</table>
</dd>
</dl>
<p>Implements <a class="el" href="classusrp__basic.html#a731389d216c7232020041f7cecd3d581">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#ac25d56e74572309a87397f0fce1a102b">usrp_basic::common_pga()</a>.</p>
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<a class="anchor" id="a7c570ad5c2cb879f1b9f2073117ecf51"></a><!-- doxytag: member="usrp_basic_rx::pga_db_per_step" ref="a7c570ad5c2cb879f1b9f2073117ecf51" args="() const " -->
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<td class="memname">double usrp_basic_rx::pga_db_per_step </td>
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<td> const<code> [virtual]</code></td>
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<p>Return hardware step size of PGA (linear in dB). </p>
<p>Implements <a class="el" href="classusrp__basic.html#ae67abb570f10f1216c001f2409fe3331">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a06cfd0e5675618f773c5466bd235a369">usrp_basic::common_pga_db_per_step()</a>.</p>
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<a class="anchor" id="a2089bd929d76f28a620fc66726b525f4"></a><!-- doxytag: member="usrp_basic_rx::pga_max" ref="a2089bd929d76f28a620fc66726b525f4" args="() const " -->
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<td class="memname">double usrp_basic_rx::pga_max </td>
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<td> const<code> [virtual]</code></td>
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<p>Return maximum legal PGA gain in dB. </p>
<p>Implements <a class="el" href="classusrp__basic.html#ae6a0027c59862dcc2d4da73d50b6a598">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a7dd5c384b9d2cd4e412939c3b7b7ac79">usrp_basic::common_pga_max()</a>.</p>
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<a class="anchor" id="a984a57196c26958e2927667ab3abe4cf"></a><!-- doxytag: member="usrp_basic_rx::pga_min" ref="a984a57196c26958e2927667ab3abe4cf" args="() const " -->
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<td class="memname">double usrp_basic_rx::pga_min </td>
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<td> const<code> [virtual]</code></td>
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<p>Return minimum legal PGA gain in dB. </p>
<p>Implements <a class="el" href="classusrp__basic.html#afcab635a411c57f16820e44a83bfe259">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a95453e5bb4d0ed4c05b1ea64c880170a">usrp_basic::common_pga_min()</a>.</p>
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<a class="anchor" id="a9edf0c0a2aeab58f7f12483a02dd14ee"></a><!-- doxytag: member="usrp_basic_rx::probe_rx_slots" ref="a9edf0c0a2aeab58f7f12483a02dd14ee" args="(bool verbose)" -->
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<td class="memname">void usrp_basic_rx::probe_rx_slots </td>
<td>(</td>
<td class="paramtype">bool </td>
<td class="paramname"><em>verbose</em></td><td>)</td>
<td><code> [protected]</code></td>
</tr>
</table>
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<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>, <a class="el" href="classusrp__basic.html#a686ea66e3f43c9ab6df60bd80f41ac3b">usrp_basic::d_dbid</a>, <a class="el" href="classusrp__basic.html#a10536cd0fe631c3a1084c0404873ad5b">usrp_basic::d_udh</a>, <a class="el" href="structusrp__dboard__eeprom.html#abb084f9acf442d8b439c8e13479d0618">usrp_dboard_eeprom::id</a>, <a class="el" href="structusrp__dboard__eeprom.html#a644392481788aabc0226af00d4371124">usrp_dboard_eeprom::oe</a>, <a class="el" href="structusrp__dboard__eeprom.html#a55332624480ff6273a9910686286fab1">usrp_dboard_eeprom::offset</a>, <a class="el" href="classusrp__basic.html#ad0e07c8d85aa220aaf150e27dd8b545f">usrp_basic::set_adc_offset()</a>, <a class="el" href="usrp__prims_8h.html#aff88561a43ab4eb5a12f1f6b6e1a5319ad40e7b8cbbd8ffbac091eaf5a3d5f800">UDBE_BAD_SLOT</a>, <a class="el" href="usrp__prims_8h.html#aff88561a43ab4eb5a12f1f6b6e1a5319a065b565a87b98cdb159a36fdbbbdc4a3">UDBE_INVALID_EEPROM</a>, <a class="el" href="usrp__prims_8h.html#aff88561a43ab4eb5a12f1f6b6e1a5319a52291acb7ae7f8b6ca4cc43a2a0c1444">UDBE_NO_EEPROM</a>, <a class="el" href="usrp__prims_8h.html#aff88561a43ab4eb5a12f1f6b6e1a5319a4511bf9a250718650f856819ec07132a">UDBE_OK</a>, <a class="el" href="usrp__dbid_8cc.html#ab860189f7bc6e0531912c03aa52d3dbe">usrp_dbid_to_string()</a>, and <a class="el" href="usrp__prims_8cc.html#a5a545da40c2e491440921355d5ed5e22">usrp_read_dboard_eeprom()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx()</a>.</p>
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<a class="anchor" id="ac339662f98db1292b636baf9f2db3d0a"></a><!-- doxytag: member="usrp_basic_rx::read" ref="ac339662f98db1292b636baf9f2db3d0a" args="(void *buf, int len, bool *overrun)" -->
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<td class="memname">int usrp_basic_rx::read </td>
<td>(</td>
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<td class="paramname"><em>buf</em>, </td>
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<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>len</em>, </td>
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<td></td>
<td class="paramtype">bool * </td>
<td class="paramname"><em>overrun</em> </td>
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<td>)</td>
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<p>read data from the D/A's via the FPGA. <code>len</code> must be a multiple of 512 bytes. </p>
<dl class="return"><dt><b>Returns:</b></dt><dd>the number of bytes read, or -1 on error.</dd></dl>
<p>If overrun is non-NULL it will be set true iff an RX overrun is detected. </p>
<p>References <a class="el" href="classusrp__basic.html#a1d6b6839b9ba385d93684c3497c3fb16">usrp_basic::d_bytes_per_poll</a>, <a class="el" href="classusrp__basic.html#a10536cd0fe631c3a1084c0404873ad5b">usrp_basic::d_udh</a>, <a class="el" href="classfusb__ephandle.html#a835533e974fb159174c44f2ec0d5668d">fusb_ephandle::read()</a>, and <a class="el" href="usrp__prims_8cc.html#a03f17343426a963b66ce52334dddb419">usrp_check_rx_overrun()</a>.</p>
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<a class="anchor" id="aedc2bc043ad6fed139274328a39a11be"></a><!-- doxytag: member="usrp_basic_rx::read_aux_adc" ref="aedc2bc043ad6fed139274328a39a11be" args="(int which_side, int which_adc)" -->
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<td class="memname">int usrp_basic_rx::read_aux_adc </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_adc</em> </td>
</tr>
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<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
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<p>Read auxiliary analog to digital converter. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">which_adc</td><td>[0,1] </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>value in the range [0,4095] if successful, else READ_FAILED. </dd></dl>
<p>Implements <a class="el" href="classusrp__basic.html#ab8b3158fe7448c951ad78bb54a06f5c5">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a37bd03473a98cf3776f1988914c1a5ce">usrp_basic::common_read_aux_adc()</a>.</p>
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<td class="memname">bool usrp_basic_rx::read_aux_adc </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_adc</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int * </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Read auxiliary analog to digital converter. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">which_adc</td><td>[0,1] </td></tr>
<tr><td class="paramname">value</td><td>return 12-bit value [0,4095] </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful </dd></dl>
<p>Implements <a class="el" href="classusrp__basic.html#a7e90fb51366e9d6a8f2c844dbca2798a">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a37bd03473a98cf3776f1988914c1a5ce">usrp_basic::common_read_aux_adc()</a>.</p>
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<a class="anchor" id="a275d14df1506faa570fd5cc231a14ee9"></a><!-- doxytag: member="usrp_basic_rx::read_io" ref="a275d14df1506faa570fd5cc231a14ee9" args="(int which_side, int *value)" -->
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<td class="memname">bool usrp_basic_rx::read_io </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int * </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
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<div class="memdoc">
<p>Read daughterboard i/o pin value. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">value</td><td>output </td></tr>
</table>
</dd>
</dl>
<p>Implements <a class="el" href="classusrp__basic.html#ad443caee9815e7c69a8b39a29cf8846a">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#af7e33b5762cd9c80a714806fa6fa2244">usrp_basic::common_read_io()</a>.</p>
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<a class="anchor" id="a67b0c263712cd5bd56f48e6bd8754bc6"></a><!-- doxytag: member="usrp_basic_rx::read_io" ref="a67b0c263712cd5bd56f48e6bd8754bc6" args="(int which_side)" -->
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<td class="memname">int usrp_basic_rx::read_io </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em></td><td>)</td>
<td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Read daughterboard i/o pin value. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>register value if successful, else READ_FAILED </dd></dl>
<p>Implements <a class="el" href="classusrp__basic.html#a166feedb83f6425d3bbbbf65f29bf42c">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#af7e33b5762cd9c80a714806fa6fa2244">usrp_basic::common_read_io()</a>.</p>
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<a class="anchor" id="a15a44f86a1a019e94d18f3c19b4cd34a"></a><!-- doxytag: member="usrp_basic_rx::restore_rx" ref="a15a44f86a1a019e94d18f3c19b4cd34a" args="(bool on)" -->
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<td class="memname">void usrp_basic_rx::restore_rx </td>
<td>(</td>
<td class="paramtype">bool </td>
<td class="paramname"><em>on</em></td><td>)</td>
<td><code> [protected]</code></td>
</tr>
</table>
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<div class="memdoc">
<p>References <a class="el" href="classusrp__basic__rx.html#aa25e7e0e84ec50bd8689889401480f84">rx_enable()</a>, and <a class="el" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#af75a82a32f50117b4acfe518b0c31e89">usrp_standard_rx::set_decim_rate()</a>, and <a class="el" href="classusrp__standard__rx.html#a182048083827bf3e2efddb918677e51e">usrp_standard_rx::write_hw_mux_reg()</a>.</p>
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<a class="anchor" id="aa25e7e0e84ec50bd8689889401480f84"></a><!-- doxytag: member="usrp_basic_rx::rx_enable" ref="aa25e7e0e84ec50bd8689889401480f84" args="() const " -->
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<td class="memname">bool usrp_basic_rx::rx_enable </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const<code> [inline, protected]</code></td>
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<p>Referenced by <a class="el" href="classusrp__basic__rx.html#aec8c94d230440bb38951e9718755b994">disable_rx()</a>, and <a class="el" href="classusrp__basic__rx.html#a15a44f86a1a019e94d18f3c19b4cd34a">restore_rx()</a>.</p>
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<a class="anchor" id="aba133cd0d5c853a51beb96776e7030fc"></a><!-- doxytag: member="usrp_basic_rx::set_fpga_rx_sample_rate_divisor" ref="aba133cd0d5c853a51beb96776e7030fc" args="(unsigned int div)" -->
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<td class="memname">bool usrp_basic_rx::set_fpga_rx_sample_rate_divisor </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>div</em></td><td>)</td>
<td></td>
</tr>
</table>
</div>
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<p>tell the fpga the rate rx samples are coming from the A/D's </p>
<p>div = fpga_master_clock_freq () / sample_rate</p>
<p>sample_rate is determined by a myriad of registers in the 9862. That's why you have to tell us, so we can tell the fpga. </p>
<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx()</a>.</p>
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<a class="anchor" id="a85804ff6612a34c800a7181ea90de6b4"></a><!-- doxytag: member="usrp_basic_rx::set_pga" ref="a85804ff6612a34c800a7181ea90de6b4" args="(int which_amp, double gain_in_db)" -->
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<td class="memname">bool usrp_basic_rx::set_pga </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_amp</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">double </td>
<td class="paramname"><em>gain_in_db</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
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<div class="memdoc">
<p>Set Programmable Gain Amplifier (PGA) </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_amp</td><td>which amp [0,3] </td></tr>
<tr><td class="paramname">gain_in_db</td><td>gain value (linear in dB)</td></tr>
</table>
</dd>
</dl>
<p>gain is rounded to closest setting supported by hardware.</p>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff sucessful.</dd></dl>
<dl class="see"><dt><b>See also:</b></dt><dd><a class="el" href="classusrp__basic__rx.html#a984a57196c26958e2927667ab3abe4cf" title="Return minimum legal PGA gain in dB.">pga_min()</a>, <a class="el" href="classusrp__basic__rx.html#a2089bd929d76f28a620fc66726b525f4" title="Return maximum legal PGA gain in dB.">pga_max()</a>, <a class="el" href="classusrp__basic__rx.html#a7c570ad5c2cb879f1b9f2073117ecf51" title="Return hardware step size of PGA (linear in dB).">pga_db_per_step()</a> </dd></dl>
<p>Implements <a class="el" href="classusrp__basic.html#afdcf0497f2554589b36a57806e239a07">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a52f96a90c91ed6e74bfc6a91691a7fa2">usrp_basic::common_set_pga()</a>.</p>
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<a class="anchor" id="a14fa02bdeea1bc11d5611b879dae5405"></a><!-- doxytag: member="usrp_basic_rx::set_rx_enable" ref="a14fa02bdeea1bc11d5611b879dae5405" args="(bool on)" -->
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<td class="memname">bool usrp_basic_rx::set_rx_enable </td>
<td>(</td>
<td class="paramtype">bool </td>
<td class="paramname"><em>on</em></td><td>)</td>
<td><code> [protected]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>References <a class="el" href="classusrp__basic.html#a10536cd0fe631c3a1084c0404873ad5b">usrp_basic::d_udh</a>, and <a class="el" href="usrp__prims_8cc.html#afeed1d956ed81e64cfd43be74c085e32">usrp_set_fpga_rx_enable()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#aec8c94d230440bb38951e9718755b994">disable_rx()</a>, <a class="el" href="classusrp__basic__rx.html#a15a44f86a1a019e94d18f3c19b4cd34a">restore_rx()</a>, <a class="el" href="classusrp__basic__rx.html#a6097b0d8b2cac9a67237368d1a81b7f4">start()</a>, <a class="el" href="classusrp__basic__rx.html#a094cb05d34da15711c6ca5c4b24defe9">stop()</a>, <a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx()</a>, and <a class="el" href="classusrp__basic__rx.html#ae50eef2481209ecaa7eb73bfd0cb513d">~usrp_basic_rx()</a>.</p>
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<a class="anchor" id="a6097b0d8b2cac9a67237368d1a81b7f4"></a><!-- doxytag: member="usrp_basic_rx::start" ref="a6097b0d8b2cac9a67237368d1a81b7f4" args="()" -->
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<td class="memname">bool usrp_basic_rx::start </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>Start data transfers. Called in base class to derived class order. </p>
<p>Reimplemented from <a class="el" href="classusrp__basic.html#a4291ecf3cc0870baaa12644143182db4">usrp_basic</a>.</p>
<p>Reimplemented in <a class="el" href="classusrp__standard__rx.html#ac97772bce1c0aaca0fee2462accd8123">usrp_standard_rx</a>.</p>
<p>References <a class="el" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable()</a>, <a class="el" href="classfusb__ephandle.html#aac0498804e009ab78c47f2265f34a054">fusb_ephandle::start()</a>, and <a class="el" href="classusrp__basic.html#a4291ecf3cc0870baaa12644143182db4">usrp_basic::start()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#ac97772bce1c0aaca0fee2462accd8123">usrp_standard_rx::start()</a>.</p>
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<a class="anchor" id="a094cb05d34da15711c6ca5c4b24defe9"></a><!-- doxytag: member="usrp_basic_rx::stop" ref="a094cb05d34da15711c6ca5c4b24defe9" args="()" -->
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<td class="memname">bool usrp_basic_rx::stop </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>Stop data transfers. Called in base class to derived class order. </p>
<p>Reimplemented from <a class="el" href="classusrp__basic.html#a69292bbc3b47b5ca85d4c0404dc4a58a">usrp_basic</a>.</p>
<p>Reimplemented in <a class="el" href="classusrp__standard__rx.html#a545808dbbdc7de3331123e7af6021144">usrp_standard_rx</a>.</p>
<p>References <a class="el" href="classusrp__basic__rx.html#a14fa02bdeea1bc11d5611b879dae5405">set_rx_enable()</a>, and <a class="el" href="classfusb__ephandle.html#a3cfe2cbb78870a6ce0ec8f696ebe45ab">fusb_ephandle::stop()</a>.</p>
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<a class="anchor" id="a0974bedf9b0406709e83e839f40e2b36"></a><!-- doxytag: member="usrp_basic_rx::write_atr_mask" ref="a0974bedf9b0406709e83e839f40e2b36" args="(int which_side, int value)" -->
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<td class="memname">bool usrp_basic_rx::write_atr_mask </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
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<div class="memdoc">
<p>Implements <a class="el" href="classusrp__basic.html#a49074783b3757b6af17ddf8e8f56be6c">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a0997e93568c71e5432c2445b1ebcc991">usrp_basic::common_write_atr_mask()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx()</a>.</p>
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<a class="anchor" id="a7cb8b45ce6815d3ee3c97a064a63e9ee"></a><!-- doxytag: member="usrp_basic_rx::write_atr_rxval" ref="a7cb8b45ce6815d3ee3c97a064a63e9ee" args="(int which_side, int value)" -->
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<td class="memname">bool usrp_basic_rx::write_atr_rxval </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Implements <a class="el" href="classusrp__basic.html#ae5466590dd7ec5646fefbb82d92ad899">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a89eda6a96bc7f4d2d634da793eccbc20">usrp_basic::common_write_atr_rxval()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx()</a>.</p>
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<a class="anchor" id="a914e9b61a4b1441dc955b1dc9cd17742"></a><!-- doxytag: member="usrp_basic_rx::write_atr_txval" ref="a914e9b61a4b1441dc955b1dc9cd17742" args="(int which_side, int value)" -->
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<td class="memname">bool usrp_basic_rx::write_atr_txval </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
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<div class="memdoc">
<p>Implements <a class="el" href="classusrp__basic.html#a504bf45d241c56ddf00ee07fc946207e">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#a26e38a0f9f98390b712709812e3387af">usrp_basic::common_write_atr_txval()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__basic__rx.html#acbda9587edf161df5aa2c504e42096ff">usrp_basic_rx()</a>.</p>
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<a class="anchor" id="ae5cbeedfd6df52cdc4b13c87e2521b97"></a><!-- doxytag: member="usrp_basic_rx::write_aux_dac" ref="ae5cbeedfd6df52cdc4b13c87e2521b97" args="(int which_side, int which_dac, int value)" -->
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<td class="memname">bool usrp_basic_rx::write_aux_dac </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_dac</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
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<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
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<p>Write auxiliary digital to analog converter. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. </td></tr>
<tr><td class="paramname">which_dac</td><td>[2,3] TX slots must use only 2 and 3. </td></tr>
<tr><td class="paramname">value</td><td>[0,4095] </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff successful </dd></dl>
<p>Implements <a class="el" href="classusrp__basic.html#a332790fa84b6b64f82de8983b45b611a">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#ac7354a9c4f7e961cb1b541c970a8d009">usrp_basic::common_write_aux_dac()</a>.</p>
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<a class="anchor" id="a5ab1edec410f1d5399c187cb243905a5"></a><!-- doxytag: member="usrp_basic_rx::write_io" ref="a5ab1edec410f1d5399c187cb243905a5" args="(int which_side, int value, int mask)" -->
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<td class="memname">bool usrp_basic_rx::write_io </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mask</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Write daughterboard i/o pin value. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">value</td><td>value to write into register </td></tr>
<tr><td class="paramname">mask</td><td>which bits of value to write into reg </td></tr>
</table>
</dd>
</dl>
<p>Implements <a class="el" href="classusrp__basic.html#a75aca6cca672ac2deedf14fb2c04ab0e">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#acf3120592af4df79d38d253c98c633ae">usrp_basic::common_write_io()</a>.</p>
</div>
</div>
<a class="anchor" id="ac6c7387f1bf488ee22c79be22e3f48dd"></a><!-- doxytag: member="usrp_basic_rx::write_refclk" ref="ac6c7387f1bf488ee22c79be22e3f48dd" args="(int which_side, int value)" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">bool usrp_basic_rx::write_refclk </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_side</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>value</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [virtual]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Write daughterboard refclk config register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_side</td><td>[0,1] which d'board </td></tr>
<tr><td class="paramname">value</td><td>value to write into register, see below</td></tr>
</table>
</dd>
</dl>
<pre>
Control whether a reference clock is sent to the daughterboards,
and what frequency. The refclk is sent on d'board i/o pin 0.</pre><pre> 3 2 1
1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+-----------------------------------------------+-+------------+
| Reserved (Must be zero) |E| DIVISOR |
+-----------------------------------------------+-+------------+</pre><pre> Bit 7 -- 1 turns on refclk, 0 allows IO use
Bits 6:0 Divider value
</pre>
<p>Implements <a class="el" href="classusrp__basic.html#a80a4f8800742b6b06ec6f1908a448fc8">usrp_basic</a>.</p>
<p>References <a class="el" href="usrp__basic_8h.html#a62f19b5a3751ce085242fa46f8761f71a29836aad5b486173ae3f31b3cb59f6b9">C_RX</a>, and <a class="el" href="classusrp__basic.html#ad673bc49b311e29ab01727c5933ea028">usrp_basic::common_write_refclk()</a>.</p>
</div>
</div>
<hr/>The documentation for this class was generated from the following files:<ul>
<li><a class="el" href="usrp__basic_8h_source.html">usrp_basic.h</a></li>
<li><a class="el" href="usrp__basic_8cc.html">usrp_basic.cc</a></li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Thu Feb 17 2011 for Universal Software Radio Peripheral by 
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