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<title>Universal Software Radio Peripheral: usrp_standard_common Class Reference</title>
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<h1>usrp_standard_common Class Reference</h1>  </div>
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<p><code>#include &lt;<a class="el" href="usrp__standard_8h_source.html">usrp_standard.h</a>&gt;</code></p>
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Inheritance diagram for usrp_standard_common:</div>
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<div class="center"><img src="classusrp__standard__common__inherit__graph.png" border="0" usemap="#usrp__standard__common_inherit__map" alt="Inheritance graph"/></div>
<map name="usrp__standard__common_inherit__map" id="usrp__standard__common_inherit__map">
<area shape="rect" id="node3" href="classusrp__standard__rx.html" title="The C++ interface the receive side of the USRPThis is the recommended interface to USRP receive funct..." alt="" coords="5,83,128,112"/><area shape="rect" id="node5" href="classusrp__standard__tx.html" title="The C++ interface the transmit side of the USRPThis is the recommended interface to USRP transmit fun..." alt="" coords="152,83,275,112"/></map>
<center><span class="legend">[<a href="graph_legend.html">legend</a>]</span></center></div>

<p><a href="classusrp__standard__common-members.html">List of all members.</a></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-methods"></a>
Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__common.html#ac259e77beebe73376a45b6116ab845e1">has_rx_halfband</a> () const </td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">does the FPGA implement the final Rx half-band filter? If it doesn't, the maximum decimation factor with proper gain is 1/2 of what it would otherwise be.  <a href="#ac259e77beebe73376a45b6116ab845e1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__common.html#a07b889dbe4fecd870f40ddf2401948c6">nddcs</a> () const </td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">number of digital downconverters implemented in the FPGA This will be 0, 1, 2 or 4.  <a href="#a07b889dbe4fecd870f40ddf2401948c6"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__common.html#a4192e505766a5920f8771bde1fd871ae">has_tx_halfband</a> () const </td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">does the FPGA implement the initial Tx half-band filter?  <a href="#a4192e505766a5920f8771bde1fd871ae"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__common.html#a9dec671bc0d7c50157083f46538844af">nducs</a> () const </td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">number of digital upconverters implemented in the FPGA This will be 0, 1, or 2.  <a href="#a9dec671bc0d7c50157083f46538844af"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pub-static-methods"></a>
Static Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__common.html#a9452b1ce5881965ca36d780f928b6cb6">calc_dxc_freq</a> (double target_freq, double baseband_freq, double fs, double *dxc_freq, bool *inverted)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Calculate the frequency to use for setting the digital up or down converter.  <a href="#a9452b1ce5881965ca36d780f928b6cb6"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pro-methods"></a>
Protected Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__common.html#a084f39cd160734d41e6c1cb8f6513dd6">usrp_standard_common</a> (<a class="el" href="classusrp__basic.html">usrp_basic</a> *parent)</td></tr>
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<hr/><h2>Constructor &amp; Destructor Documentation</h2>
<a class="anchor" id="a084f39cd160734d41e6c1cb8f6513dd6"></a><!-- doxytag: member="usrp_standard_common::usrp_standard_common" ref="a084f39cd160734d41e6c1cb8f6513dd6" args="(usrp_basic *parent)" -->
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          <td class="memname">usrp_standard_common::usrp_standard_common </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="classusrp__basic.html">usrp_basic</a> *&#160;</td>
          <td class="paramname"><em>parent</em></td><td>)</td>
          <td><code> [protected]</code></td>
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<p>References <a class="el" href="classusrp__basic.html#a4fa26bd8164bd5782adf7fbe00b3d411">usrp_basic::_read_fpga_reg()</a>.</p>

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<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a9452b1ce5881965ca36d780f928b6cb6"></a><!-- doxytag: member="usrp_standard_common::calc_dxc_freq" ref="a9452b1ce5881965ca36d780f928b6cb6" args="(double target_freq, double baseband_freq, double fs, double *dxc_freq, bool *inverted)" -->
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          <td class="memname">void usrp_standard_common::calc_dxc_freq </td>
          <td>(</td>
          <td class="paramtype">double&#160;</td>
          <td class="paramname"><em>target_freq</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">double&#160;</td>
          <td class="paramname"><em>baseband_freq</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">double&#160;</td>
          <td class="paramname"><em>fs</em>, </td>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">double *&#160;</td>
          <td class="paramname"><em>dxc_freq</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool *&#160;</td>
          <td class="paramname"><em>inverted</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td><code> [static]</code></td>
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<p>Calculate the frequency to use for setting the digital up or down converter. </p>
<dl><dt><b>Parameters:</b></dt><dd>
  <table class="params">
    <tr><td class="paramdir"></td><td class="paramname">target_freq</td><td>is the desired RF frequency (Hz). </td></tr>
    <tr><td class="paramdir"></td><td class="paramname">baseband_freq</td><td>is the RF frequency that corresponds to DC in the IF coming from the d'board. </td></tr>
    <tr><td class="paramdir"></td><td class="paramname">fs</td><td>is the sampling frequency. </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">dxc_freq</td><td>the frequency to program into the DDC (or DUC). </td></tr>
    <tr><td class="paramdir">[out]</td><td class="paramname">inverted</td><td>is true if we're operating in an inverted Nyquist zone. </td></tr>
  </table>
  </dd>
</dl>

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<a class="anchor" id="ac259e77beebe73376a45b6116ab845e1"></a><!-- doxytag: member="usrp_standard_common::has_rx_halfband" ref="ac259e77beebe73376a45b6116ab845e1" args="() const " -->
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          <td class="memname">bool usrp_standard_common::has_rx_halfband </td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td> const</td>
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<p>does the FPGA implement the final Rx half-band filter? If it doesn't, the maximum decimation factor with proper gain is 1/2 of what it would otherwise be. </p>

<p>Referenced by <a class="el" href="classusrp__standard__rx.html#af75a82a32f50117b4acfe518b0c31e89">usrp_standard_rx::set_decim_rate()</a>.</p>

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<a class="anchor" id="a4192e505766a5920f8771bde1fd871ae"></a><!-- doxytag: member="usrp_standard_common::has_tx_halfband" ref="a4192e505766a5920f8771bde1fd871ae" args="() const " -->
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          <td class="memname">bool usrp_standard_common::has_tx_halfband </td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td> const</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>does the FPGA implement the initial Tx half-band filter? </p>

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<a class="anchor" id="a07b889dbe4fecd870f40ddf2401948c6"></a><!-- doxytag: member="usrp_standard_common::nddcs" ref="a07b889dbe4fecd870f40ddf2401948c6" args="() const " -->
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          <td class="memname">int usrp_standard_common::nddcs </td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td> const</td>
        </tr>
      </table>
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<p>number of digital downconverters implemented in the FPGA This will be 0, 1, 2 or 4. </p>

<p>Referenced by <a class="el" href="classusrp__standard__rx.html#a9ab9aa92005647b967d063003a841ca0">usrp_standard_rx::set_nchannels()</a>.</p>

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<a class="anchor" id="a9dec671bc0d7c50157083f46538844af"></a><!-- doxytag: member="usrp_standard_common::nducs" ref="a9dec671bc0d7c50157083f46538844af" args="() const " -->
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      <table class="memname">
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          <td class="memname">int usrp_standard_common::nducs </td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td> const</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>number of digital upconverters implemented in the FPGA This will be 0, 1, or 2. </p>

<p>Referenced by <a class="el" href="classusrp__standard__tx.html#a5e9167c1f811c6446467ba2935cde618">usrp_standard_tx::set_nchannels()</a>.</p>

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<hr/>The documentation for this class was generated from the following files:<ul>
<li><a class="el" href="usrp__standard_8h_source.html">usrp_standard.h</a></li>
<li><a class="el" href="usrp__standard_8cc.html">usrp_standard.cc</a></li>
</ul>
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