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<title>Universal Software Radio Peripheral: usrp_standard_rx Class Reference</title>
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<a href="#pub-types">Public Types</a> |
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<h1>usrp_standard_rx Class Reference</h1> </div>
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<!-- doxytag: class="usrp_standard_rx" --><!-- doxytag: inherits="usrp_basic_rx,usrp_standard_common" -->
<p>The C++ interface the receive side of the USRPThis is the recommended interface to USRP receive functionality for applications that use the USRP but not GNU Radio.
<a href="#_details">More...</a></p>
<p><code>#include <<a class="el" href="usrp__standard_8h_source.html">usrp_standard.h</a>></code></p>
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Inheritance diagram for usrp_standard_rx:</div>
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<area shape="rect" id="node2" href="classusrp__basic__rx.html" title="class for accessing the receive side of the USRP" alt="" coords="5,83,107,112"/><area shape="rect" id="node4" href="classusrp__basic.html" title="abstract base class for usrp operations" alt="" coords="13,5,99,35"/><area shape="rect" id="node6" href="classusrp__standard__common.html" title="usrp_standard_common" alt="" coords="131,83,291,112"/></map>
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Collaboration diagram for usrp_standard_rx:</div>
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<area shape="rect" id="node2" href="classusrp__basic__rx.html" title="class for accessing the receive side of the USRP" alt="" coords="120,197,221,227"/><area shape="rect" id="node4" href="classusrp__basic.html" title="abstract base class for usrp operations" alt="" coords="5,101,91,131"/><area shape="rect" id="node6" href="structusb__dev__handle.html" title="usb_dev_handle" alt="" coords="59,5,173,35"/><area shape="rect" id="node8" href="classfusb__devhandle.html" title="abstract usb device handle" alt="" coords="115,101,227,131"/><area shape="rect" id="node11" href="classfusb__ephandle.html" title="abstract usb end point handle" alt="" coords="251,101,357,131"/><area shape="rect" id="node13" href="classusrp__standard__common.html" title="usrp_standard_common" alt="" coords="245,197,405,227"/></map>
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<p><a href="classusrp__standard__rx-members.html">List of all members.</a></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-types"></a>
Public Types</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <a class="el" href="classusrp__standard__rx.html#a745ee8680106fee8e3937019e48c0c41ad3f99a72b4201bac21d8c103eff81568">FPGA_MODE_NORMAL</a> = 0x00,
<a class="el" href="classusrp__standard__rx.html#a745ee8680106fee8e3937019e48c0c41adc8004f6da0507be39531d73039011f8">FPGA_MODE_LOOPBACK</a> = 0x01,
<a class="el" href="classusrp__standard__rx.html#a745ee8680106fee8e3937019e48c0c41a5749d17a9377d91ea89fc6b8f94620b9">FPGA_MODE_COUNTING</a> = 0x02,
<a class="el" href="classusrp__standard__rx.html#a745ee8680106fee8e3937019e48c0c41a26cf58fafbdee14b54d0eef63660332e">FPGA_MODE_COUNTING_32BIT</a> = 0x04
}</td></tr>
<tr><td colspan="2"><h2><a name="pub-methods"></a>
Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a51b7fde714bddf8bc2352172f07f42df">~usrp_standard_rx</a> ()</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#af75a82a32f50117b4acfe518b0c31e89">set_decim_rate</a> (unsigned int rate)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set decimator rate. <code>rate</code> MUST BE EVEN and in [8, 256]. <a href="#af75a82a32f50117b4acfe518b0c31e89"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a9ab9aa92005647b967d063003a841ca0">set_nchannels</a> (int nchannels)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set number of active channels. <code>nchannels</code> must be 1, 2 or 4. <a href="#a9ab9aa92005647b967d063003a841ca0"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#aa98b7831a644635f19ee84a7ecd404b2">set_mux</a> (int mux)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set input mux configuration. <a href="#aa98b7831a644635f19ee84a7ecd404b2"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a1b1d513ec9017203d3d2eede645093d5">determine_rx_mux_value</a> (const <a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> &ss)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#abfe3924bcd4da66e431bac0d20a99bf4">determine_rx_mux_value</a> (const <a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> &ss_a, const <a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> &ss_b)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a4f3584afcc01962580cf420015d93cda">set_rx_freq</a> (int channel, double freq)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">set the frequency of the digital down converter. <a href="#a4f3584afcc01962580cf420015d93cda"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#aafcd5898e3cddfaacd0535a6a678aafd">set_fpga_mode</a> (int mode)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">set fpga mode <a href="#aafcd5898e3cddfaacd0535a6a678aafd"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a71a1352e5b799f798ea528a09f240b7d">set_ddc_phase</a> (int channel, int phase)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Set the digital down converter phase register. <a href="#a71a1352e5b799f798ea528a09f240b7d"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#ad196898bb518333f3ce753905d3cfd0a">set_format</a> (unsigned int format)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Specify Rx data format. <a href="#ad196898bb518333f3ce753905d3cfd0a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a261d53e643bfc5e6bdaa2f84a070bd42">tune</a> (int chan, <a class="el" href="db__base_8h.html#a61ead10400f658a22128a321e14ae0ac">db_base_sptr</a> db, double target_freq, <a class="el" href="classusrp__tune__result.html">usrp_tune_result</a> *result)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">High-level "tune" method. Works for the single channel case. <a href="#a261d53e643bfc5e6bdaa2f84a070bd42"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#ab92676b3ff5e472846e957f95c3374e5">decim_rate</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">double </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a1b8044ecae8a8acc9bb84e40dce4076e">rx_freq</a> (int channel) const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a0ad5d52ec8a7c7270e6248614ae0a4a4">nchannels</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a5705205822065977c5e777aafe5c203f">mux</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a138542206516dba75c5c90af984dcf84">format</a> () const </td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#ac97772bce1c0aaca0fee2462accd8123">start</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Start data transfers. Called in base class to derived class order. <a href="#ac97772bce1c0aaca0fee2462accd8123"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a545808dbbdc7de3331123e7af6021144">stop</a> ()</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Stop data transfers. Called in base class to derived class order. <a href="#a545808dbbdc7de3331123e7af6021144"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pub-static-methods"></a>
Static Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static <a class="el" href="usrp__standard_8h.html#a987bd3ee218650a56a698f797f349596">usrp_standard_rx_sptr</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a988775e6036abf58339c689d94b3bcf5">make</a> (int which_board, unsigned int decim_rate, int nchan=1, int mux=-1, int mode=0, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">invokes constructor, returns shared_ptr or shared_ptr equivalent of 0 if trouble <a href="#a988775e6036abf58339c689d94b3bcf5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#ae77c37e8be21095bb6add76e1c261121">make_format</a> (int width=16, int shift=0, bool want_q=true, bool bypass_halfband=false)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a7e7b2474c65673c9a68dfc8f08293399">format_width</a> (unsigned int format)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static int </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a15cc1572f31cd9b0436dbc4aaad4b634">format_shift</a> (unsigned int format)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#ad5f82de396844f5e1864b6602f3f1066">format_want_q</a> (unsigned int format)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">static bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a8bc4f06d059eff8bc6bc3766d89b5d41">format_bypass_halfband</a> (unsigned int format)</td></tr>
<tr><td colspan="2"><h2><a name="pro-methods"></a>
Protected Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx</a> (int which_board, unsigned int decim_rate, int nchan=1, int mux=-1, int mode=0, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="classusrp__standard__rx.html#a182048083827bf3e2efddb918677e51e">write_hw_mux_reg</a> ()</td></tr>
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<hr/><a name="_details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>The C++ interface the receive side of the USRP</p>
<p>This is the recommended interface to USRP receive functionality for applications that use the USRP but not GNU Radio. </p>
</div><hr/><h2>Member Enumeration Documentation</h2>
<a class="anchor" id="a745ee8680106fee8e3937019e48c0c41"></a><!-- doxytag: member="usrp_standard_rx::@2" ref="a745ee8680106fee8e3937019e48c0c41" args="" -->
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<td class="memname">anonymous enum</td>
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<dl><dt><b>Enumerator: </b></dt><dd><table border="0" cellspacing="2" cellpadding="0">
<tr><td valign="top"><em><a class="anchor" id="a745ee8680106fee8e3937019e48c0c41ad3f99a72b4201bac21d8c103eff81568"></a><!-- doxytag: member="FPGA_MODE_NORMAL" ref="a745ee8680106fee8e3937019e48c0c41ad3f99a72b4201bac21d8c103eff81568" args="" -->FPGA_MODE_NORMAL</em> </td><td>
</td></tr>
<tr><td valign="top"><em><a class="anchor" id="a745ee8680106fee8e3937019e48c0c41adc8004f6da0507be39531d73039011f8"></a><!-- doxytag: member="FPGA_MODE_LOOPBACK" ref="a745ee8680106fee8e3937019e48c0c41adc8004f6da0507be39531d73039011f8" args="" -->FPGA_MODE_LOOPBACK</em> </td><td>
</td></tr>
<tr><td valign="top"><em><a class="anchor" id="a745ee8680106fee8e3937019e48c0c41a5749d17a9377d91ea89fc6b8f94620b9"></a><!-- doxytag: member="FPGA_MODE_COUNTING" ref="a745ee8680106fee8e3937019e48c0c41a5749d17a9377d91ea89fc6b8f94620b9" args="" -->FPGA_MODE_COUNTING</em> </td><td>
</td></tr>
<tr><td valign="top"><em><a class="anchor" id="a745ee8680106fee8e3937019e48c0c41a26cf58fafbdee14b54d0eef63660332e"></a><!-- doxytag: member="FPGA_MODE_COUNTING_32BIT" ref="a745ee8680106fee8e3937019e48c0c41a26cf58fafbdee14b54d0eef63660332e" args="" -->FPGA_MODE_COUNTING_32BIT</em> </td><td>
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</dl>
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<hr/><h2>Constructor & Destructor Documentation</h2>
<a class="anchor" id="acf2afdc165b27469cc8f793851c78a3c"></a><!-- doxytag: member="usrp_standard_rx::usrp_standard_rx" ref="acf2afdc165b27469cc8f793851c78a3c" args="(int which_board, unsigned int decim_rate, int nchan=1, int mux=-1, int mode=0, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")" -->
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<td class="memname">usrp_standard_rx::usrp_standard_rx </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_board</em>, </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>decim_rate</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>nchan</em> = <code>1</code>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mux</em> = <code>-1</code>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>mode</em> = <code>0</code>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>fusb_block_size</em> = <code>0</code>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">int </td>
<td class="paramname"><em>fusb_nblocks</em> = <code>0</code>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">const std::string </td>
<td class="paramname"><em>fpga_filename</em> = <code>""</code>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">const std::string </td>
<td class="paramname"><em>firmware_filename</em> = <code>""</code> </td>
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<td></td>
<td>)</td>
<td></td><td><code> [protected]</code></td>
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</table>
</div>
<div class="memdoc">
<p>References <a class="el" href="classusrp__standard__rx.html#ae77c37e8be21095bb6add76e1c261121">make_format()</a>, <a class="el" href="classusrp__standard__rx.html#a71a1352e5b799f798ea528a09f240b7d">set_ddc_phase()</a>, <a class="el" href="classusrp__standard__rx.html#af75a82a32f50117b4acfe518b0c31e89">set_decim_rate()</a>, <a class="el" href="classusrp__standard__rx.html#ad196898bb518333f3ce753905d3cfd0a">set_format()</a>, <a class="el" href="classusrp__standard__rx.html#aafcd5898e3cddfaacd0535a6a678aafd">set_fpga_mode()</a>, <a class="el" href="classusrp__standard__rx.html#aa98b7831a644635f19ee84a7ecd404b2">set_mux()</a>, <a class="el" href="classusrp__standard__rx.html#a9ab9aa92005647b967d063003a841ca0">set_nchannels()</a>, and <a class="el" href="classusrp__standard__rx.html#a4f3584afcc01962580cf420015d93cda">set_rx_freq()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#a988775e6036abf58339c689d94b3bcf5">make()</a>.</p>
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<a class="anchor" id="a51b7fde714bddf8bc2352172f07f42df"></a><!-- doxytag: member="usrp_standard_rx::~usrp_standard_rx" ref="a51b7fde714bddf8bc2352172f07f42df" args="()" -->
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<td class="memname">usrp_standard_rx::~usrp_standard_rx </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
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</div>
<div class="memdoc">
</div>
</div>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="ab92676b3ff5e472846e957f95c3374e5"></a><!-- doxytag: member="usrp_standard_rx::decim_rate" ref="ab92676b3ff5e472846e957f95c3374e5" args="() const " -->
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<td class="memname">unsigned int usrp_standard_rx::decim_rate </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td> const</td>
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<a class="anchor" id="a1b1d513ec9017203d3d2eede645093d5"></a><!-- doxytag: member="usrp_standard_rx::determine_rx_mux_value" ref="a1b1d513ec9017203d3d2eede645093d5" args="(const usrp_subdev_spec &ss)" -->
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<td class="memname">int usrp_standard_rx::determine_rx_mux_value </td>
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<td class="paramtype">const <a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> & </td>
<td class="paramname"><em>ss</em></td><td>)</td>
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<p>Determine the appropriate Rx mux value as a function of the subdevice choosen and the characteristics of the respective daughterboard. </p>
<p>References <a class="el" href="classusrp__basic.html#a8eb1f58ca819437d7f43ad87574bd6da">usrp_basic::db()</a>, <a class="el" href="classusrp__basic.html#a61af504df443a9d846ecf909871f1481">usrp_basic::is_valid()</a>, <a class="el" href="structusrp__subdev__spec.html#aeff15f40736fb2af3e1eddb85a243252">usrp_subdev_spec::side</a>, and <a class="el" href="structusrp__subdev__spec.html#abb7b7dbdca4355d0957b2233a32119ef">usrp_subdev_spec::subdev</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#abfe3924bcd4da66e431bac0d20a99bf4">determine_rx_mux_value()</a>.</p>
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<a class="anchor" id="abfe3924bcd4da66e431bac0d20a99bf4"></a><!-- doxytag: member="usrp_standard_rx::determine_rx_mux_value" ref="abfe3924bcd4da66e431bac0d20a99bf4" args="(const usrp_subdev_spec &ss_a, const usrp_subdev_spec &ss_b)" -->
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<td class="memname">int usrp_standard_rx::determine_rx_mux_value </td>
<td>(</td>
<td class="paramtype">const <a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> & </td>
<td class="paramname"><em>ss_a</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">const <a class="el" href="structusrp__subdev__spec.html">usrp_subdev_spec</a> & </td>
<td class="paramname"><em>ss_b</em> </td>
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<td>)</td>
<td></td><td></td>
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<p>References <a class="el" href="classusrp__basic.html#a8eb1f58ca819437d7f43ad87574bd6da">usrp_basic::db()</a>, <a class="el" href="classusrp__standard__rx.html#a1b1d513ec9017203d3d2eede645093d5">determine_rx_mux_value()</a>, <a class="el" href="structusrp__subdev__spec.html#aeff15f40736fb2af3e1eddb85a243252">usrp_subdev_spec::side</a>, and <a class="el" href="structusrp__subdev__spec.html#abb7b7dbdca4355d0957b2233a32119ef">usrp_subdev_spec::subdev</a>.</p>
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<a class="anchor" id="a138542206516dba75c5c90af984dcf84"></a><!-- doxytag: member="usrp_standard_rx::format" ref="a138542206516dba75c5c90af984dcf84" args="() const " -->
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<td class="memname">unsigned int usrp_standard_rx::format </td>
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<td class="paramname"></td><td>)</td>
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<p>References <a class="el" href="classusrp__basic.html#af3d08c8bcdd0ed116e76ffa5449004f2">usrp_basic::d_fpga_shadows</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#ae77c37e8be21095bb6add76e1c261121">make_format()</a>.</p>
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<a class="anchor" id="a8bc4f06d059eff8bc6bc3766d89b5d41"></a><!-- doxytag: member="usrp_standard_rx::format_bypass_halfband" ref="a8bc4f06d059eff8bc6bc3766d89b5d41" args="(unsigned int format)" -->
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<td class="memname">bool usrp_standard_rx::format_bypass_halfband </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>format</em></td><td>)</td>
<td><code> [static]</code></td>
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<a class="anchor" id="a15cc1572f31cd9b0436dbc4aaad4b634"></a><!-- doxytag: member="usrp_standard_rx::format_shift" ref="a15cc1572f31cd9b0436dbc4aaad4b634" args="(unsigned int format)" -->
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<td class="memname">int usrp_standard_rx::format_shift </td>
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<td class="paramtype">unsigned int </td>
<td class="paramname"><em>format</em></td><td>)</td>
<td><code> [static]</code></td>
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<a class="anchor" id="ad5f82de396844f5e1864b6602f3f1066"></a><!-- doxytag: member="usrp_standard_rx::format_want_q" ref="ad5f82de396844f5e1864b6602f3f1066" args="(unsigned int format)" -->
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<td class="paramtype">unsigned int </td>
<td class="paramname"><em>format</em></td><td>)</td>
<td><code> [static]</code></td>
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<a class="anchor" id="a7e7b2474c65673c9a68dfc8f08293399"></a><!-- doxytag: member="usrp_standard_rx::format_width" ref="a7e7b2474c65673c9a68dfc8f08293399" args="(unsigned int format)" -->
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<td class="memname">int usrp_standard_rx::format_width </td>
<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>format</em></td><td>)</td>
<td><code> [static]</code></td>
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<a class="anchor" id="a988775e6036abf58339c689d94b3bcf5"></a><!-- doxytag: member="usrp_standard_rx::make" ref="a988775e6036abf58339c689d94b3bcf5" args="(int which_board, unsigned int decim_rate, int nchan=1, int mux=-1, int mode=0, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")" -->
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<td class="memname"><a class="el" href="usrp__standard_8h.html#a987bd3ee218650a56a698f797f349596">usrp_standard_rx_sptr</a> usrp_standard_rx::make </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>which_board</em>, </td>
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<td class="paramtype">unsigned int </td>
<td class="paramname"><em>decim_rate</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>nchan</em> = <code>1</code>, </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>mux</em> = <code>-1</code>, </td>
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<td class="paramname"><em>mode</em> = <code>0</code>, </td>
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<td class="paramname"><em>fusb_block_size</em> = <code>0</code>, </td>
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<td class="paramname"><em>fusb_nblocks</em> = <code>0</code>, </td>
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<td class="paramname"><em>fpga_filename</em> = <code>""</code>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">const std::string </td>
<td class="paramname"><em>firmware_filename</em> = <code>""</code> </td>
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<td>)</td>
<td></td><td><code> [static]</code></td>
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<p>invokes constructor, returns shared_ptr or shared_ptr equivalent of 0 if trouble </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">which_board</td><td>Which USRP board on usb (not particularly useful; use 0) </td></tr>
<tr><td class="paramname">decim_rate</td><td>decimation factor </td></tr>
<tr><td class="paramname">nchan</td><td>number of channels </td></tr>
<tr><td class="paramname">mux</td><td>Rx mux setting, </td></tr>
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</dd>
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<dl class="see"><dt><b>See also:</b></dt><dd><a class="el" href="classusrp__standard__rx.html#aa98b7831a644635f19ee84a7ecd404b2" title="Set input mux configuration.">set_mux</a> </dd></dl>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">mode</td><td>mode </td></tr>
<tr><td class="paramname">fusb_block_size</td><td>fast usb xfer block size. Must be a multiple of 512. Use zero for a reasonable default. </td></tr>
<tr><td class="paramname">fusb_nblocks</td><td>number of fast usb URBs to allocate. Use zero for a reasonable default. </td></tr>
<tr><td class="paramname">fpga_filename</td><td>Name of rbf file to load </td></tr>
<tr><td class="paramname">firmware_filename</td><td>Name of ihx file to load </td></tr>
</table>
</dd>
</dl>
<p>References <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
<p>Referenced by <a class="el" href="test__usrp__standard__rx_8cc.html#a3c04138a5bfe5d72780bb7e82a18e627">main()</a>.</p>
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<a class="anchor" id="ae77c37e8be21095bb6add76e1c261121"></a><!-- doxytag: member="usrp_standard_rx::make_format" ref="ae77c37e8be21095bb6add76e1c261121" args="(int width=16, int shift=0, bool want_q=true, bool bypass_halfband=false)" -->
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<td class="memname">unsigned int usrp_standard_rx::make_format </td>
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<td class="paramname"><em>shift</em> = <code>0</code>, </td>
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<td class="paramtype">bool </td>
<td class="paramname"><em>want_q</em> = <code>true</code>, </td>
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<td class="paramname"><em>bypass_halfband</em> = <code>false</code> </td>
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<td>)</td>
<td></td><td><code> [static]</code></td>
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<p>References <a class="el" href="classusrp__standard__rx.html#a138542206516dba75c5c90af984dcf84">format()</a>.</p>
<p>Referenced by <a class="el" href="test__usrp__standard__rx_8cc.html#a3c04138a5bfe5d72780bb7e82a18e627">main()</a>, and <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="a5705205822065977c5e777aafe5c203f"></a><!-- doxytag: member="usrp_standard_rx::mux" ref="a5705205822065977c5e777aafe5c203f" args="() const " -->
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<td class="memname">int usrp_standard_rx::mux </td>
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<p>Referenced by <a class="el" href="classusrp__standard__rx.html#aa98b7831a644635f19ee84a7ecd404b2">set_mux()</a>.</p>
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<a class="anchor" id="a0ad5d52ec8a7c7270e6248614ae0a4a4"></a><!-- doxytag: member="usrp_standard_rx::nchannels" ref="a0ad5d52ec8a7c7270e6248614ae0a4a4" args="() const " -->
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<td class="memname">int usrp_standard_rx::nchannels </td>
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<td> const</td>
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<p>Referenced by <a class="el" href="classusrp__standard__rx.html#af75a82a32f50117b4acfe518b0c31e89">set_decim_rate()</a>.</p>
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<a class="anchor" id="a1b8044ecae8a8acc9bb84e40dce4076e"></a><!-- doxytag: member="usrp_standard_rx::rx_freq" ref="a1b8044ecae8a8acc9bb84e40dce4076e" args="(int channel) const " -->
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<td class="memname">double usrp_standard_rx::rx_freq </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>channel</em></td><td>)</td>
<td> const</td>
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<a class="anchor" id="a71a1352e5b799f798ea528a09f240b7d"></a><!-- doxytag: member="usrp_standard_rx::set_ddc_phase" ref="a71a1352e5b799f798ea528a09f240b7d" args="(int channel, int phase)" -->
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<td class="memname">bool usrp_standard_rx::set_ddc_phase </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>channel</em>, </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">int </td>
<td class="paramname"><em>phase</em> </td>
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<p>Set the digital down converter phase register. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">channel</td><td>which ddc channel [0, 3] </td></tr>
<tr><td class="paramname">phase</td><td>32-bit integer phase value. </td></tr>
</table>
</dd>
</dl>
<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="af75a82a32f50117b4acfe518b0c31e89"></a><!-- doxytag: member="usrp_standard_rx::set_decim_rate" ref="af75a82a32f50117b4acfe518b0c31e89" args="(unsigned int rate)" -->
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<td class="paramtype">unsigned int </td>
<td class="paramname"><em>rate</em></td><td>)</td>
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<p>Set decimator rate. <code>rate</code> MUST BE EVEN and in [8, 256]. </p>
<p>The final complex sample rate across the USB is adc_freq () / decim_rate () * nchannels () </p>
<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>, <a class="el" href="classusrp__basic__rx.html#ace4aa6537246ecf948ec0ae35e1d6e48">usrp_basic_rx::adc_rate()</a>, <a class="el" href="classusrp__basic__rx.html#aec8c94d230440bb38951e9718755b994">usrp_basic_rx::disable_rx()</a>, <a class="el" href="classusrp__standard__common.html#ac259e77beebe73376a45b6116ab845e1">usrp_standard_common::has_rx_halfband()</a>, <a class="el" href="classusrp__standard__rx.html#a0ad5d52ec8a7c7270e6248614ae0a4a4">nchannels()</a>, <a class="el" href="classusrp__basic__rx.html#a15a44f86a1a019e94d18f3c19b4cd34a">usrp_basic_rx::restore_rx()</a>, and <a class="el" href="classusrp__basic.html#a77535750946e7d8443a76941a9611cae">usrp_basic::set_usb_data_rate()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="ad196898bb518333f3ce753905d3cfd0a"></a><!-- doxytag: member="usrp_standard_rx::set_format" ref="ad196898bb518333f3ce753905d3cfd0a" args="(unsigned int format)" -->
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<td>(</td>
<td class="paramtype">unsigned int </td>
<td class="paramname"><em>format</em></td><td>)</td>
<td></td>
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<p>Specify Rx data format. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">format</td><td>format specifier</td></tr>
</table>
</dd>
</dl>
<p>Rx data format control register</p>
<p>3 2 1 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +-----------------------------------------+-+-+---------+-------+ | Reserved (Must be zero) |B|Q| WIDTH | SHIFT | +-----------------------------------------+-+-+---------+-------+</p>
<p>SHIFT specifies arithmetic right shift [0, 15] WIDTH specifies bit-width of I & Q samples across the USB [1, 16] (not all valid) Q if set deliver both I & Q, else just I B if set bypass half-band filter.</p>
<p>Right now the acceptable values are:</p>
<p>B Q WIDTH SHIFT 0 1 16 0 0 1 8 8</p>
<p>More valid combos to come.</p>
<p>Default value is 0x00000300 16-bits, 0 shift, deliver both I & Q. </p>
<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="aafcd5898e3cddfaacd0535a6a678aafd"></a><!-- doxytag: member="usrp_standard_rx::set_fpga_mode" ref="aafcd5898e3cddfaacd0535a6a678aafd" args="(int mode)" -->
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<td class="memname">bool usrp_standard_rx::set_fpga_mode </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>mode</em></td><td>)</td>
<td></td>
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<p>set fpga mode </p>
<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="aa98b7831a644635f19ee84a7ecd404b2"></a><!-- doxytag: member="usrp_standard_rx::set_mux" ref="aa98b7831a644635f19ee84a7ecd404b2" args="(int mux)" -->
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<td class="memname">bool usrp_standard_rx::set_mux </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>mux</em></td><td>)</td>
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<p>Set input mux configuration. </p>
<p>This determines which ADC (or constant zero) is connected to each DDC input. There are 4 DDCs. Each has two inputs.</p>
<pre>
Mux value:</pre><pre> 3 2 1
1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+-------+-------+-------+-------+-------+-------+-------+-------+
| Q3 | I3 | Q2 | I2 | Q1 | I1 | Q0 | I0 |
+-------+-------+-------+-------+-------+-------+-------+-------+</pre><pre> Each 4-bit I field is either 0,1,2,3
Each 4-bit Q field is either 0,1,2,3 or 0xf (input is const zero)
All Q's must be 0xf or none of them may be 0xf
</pre>
<p>References <a class="el" href="classusrp__standard__rx.html#a5705205822065977c5e777aafe5c203f">mux()</a>, and <a class="el" href="classusrp__standard__rx.html#a182048083827bf3e2efddb918677e51e">write_hw_mux_reg()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="a9ab9aa92005647b967d063003a841ca0"></a><!-- doxytag: member="usrp_standard_rx::set_nchannels" ref="a9ab9aa92005647b967d063003a841ca0" args="(int nchannels)" -->
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<td class="memname">bool usrp_standard_rx::set_nchannels </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>nchannels</em></td><td>)</td>
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<p>Set number of active channels. <code>nchannels</code> must be 1, 2 or 4. </p>
<p>The final complex sample rate across the USB is adc_freq () / decim_rate () * nchannels () </p>
<p>References <a class="el" href="classusrp__standard__common.html#a07b889dbe4fecd870f40ddf2401948c6">usrp_standard_common::nddcs()</a>, and <a class="el" href="classusrp__standard__rx.html#a182048083827bf3e2efddb918677e51e">write_hw_mux_reg()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="a4f3584afcc01962580cf420015d93cda"></a><!-- doxytag: member="usrp_standard_rx::set_rx_freq" ref="a4f3584afcc01962580cf420015d93cda" args="(int channel, double freq)" -->
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<td class="memname">bool usrp_standard_rx::set_rx_freq </td>
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<td class="paramtype">int </td>
<td class="paramname"><em>channel</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">double </td>
<td class="paramname"><em>freq</em> </td>
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<p>set the frequency of the digital down converter. </p>
<p><code>channel</code> must be in the range [0,3]. <code>freq</code> is the center frequency in Hz. <code>freq</code> may be either negative or postive. The frequency specified is quantized. Use rx_freq to retrieve the actual value used. </p>
<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>, <a class="el" href="classusrp__basic__rx.html#ace4aa6537246ecf948ec0ae35e1d6e48">usrp_basic_rx::adc_rate()</a>, and <a class="el" href="classusrp__basic.html#a6d0fecbe64f35fef20293c27dc33a0b0">usrp_basic::d_verbose</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#acf2afdc165b27469cc8f793851c78a3c">usrp_standard_rx()</a>.</p>
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<a class="anchor" id="ac97772bce1c0aaca0fee2462accd8123"></a><!-- doxytag: member="usrp_standard_rx::start" ref="ac97772bce1c0aaca0fee2462accd8123" args="()" -->
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<td class="memname">bool usrp_standard_rx::start </td>
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<p>Start data transfers. Called in base class to derived class order. </p>
<p>Reimplemented from <a class="el" href="classusrp__basic__rx.html#a6097b0d8b2cac9a67237368d1a81b7f4">usrp_basic_rx</a>.</p>
<p>References <a class="el" href="classusrp__basic__rx.html#a6097b0d8b2cac9a67237368d1a81b7f4">usrp_basic_rx::start()</a>.</p>
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<a class="anchor" id="a545808dbbdc7de3331123e7af6021144"></a><!-- doxytag: member="usrp_standard_rx::stop" ref="a545808dbbdc7de3331123e7af6021144" args="()" -->
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<td class="memname">bool usrp_standard_rx::stop </td>
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<p>Stop data transfers. Called in base class to derived class order. </p>
<p>Reimplemented from <a class="el" href="classusrp__basic__rx.html#a094cb05d34da15711c6ca5c4b24defe9">usrp_basic_rx</a>.</p>
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<a class="anchor" id="a261d53e643bfc5e6bdaa2f84a070bd42"></a><!-- doxytag: member="usrp_standard_rx::tune" ref="a261d53e643bfc5e6bdaa2f84a070bd42" args="(int chan, db_base_sptr db, double target_freq, usrp_tune_result *result)" -->
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<td class="memname">bool usrp_standard_rx::tune </td>
<td>(</td>
<td class="paramtype">int </td>
<td class="paramname"><em>chan</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="db__base_8h.html#a61ead10400f658a22128a321e14ae0ac">db_base_sptr</a> </td>
<td class="paramname"><em>db</em>, </td>
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<td class="paramtype">double </td>
<td class="paramname"><em>target_freq</em>, </td>
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<td class="paramtype"><a class="el" href="classusrp__tune__result.html">usrp_tune_result</a> * </td>
<td class="paramname"><em>result</em> </td>
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<p>High-level "tune" method. Works for the single channel case. </p>
<p>This method adjusts both the daughterboard LO and the DDC so that target_freq ends up at DC in the complex baseband samples.</p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramdir"></td><td class="paramname">chan</td><td>which DDC channel we're controlling (almost always 0). </td></tr>
<tr><td class="paramdir"></td><td class="paramname">db</td><td>the daughterboard we're controlling. </td></tr>
<tr><td class="paramdir"></td><td class="paramname">target_freq</td><td>the RF frequency we want at DC in the complex baseband. </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">result</td><td>details how the hardware was configured.</td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>true iff everything was successful. </dd></dl>
<p>References <a class="el" href="classusrp__basic__rx.html#afd14b376f2449cfb71865c9980ea2358">usrp_basic_rx::converter_rate()</a>.</p>
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<a class="anchor" id="a182048083827bf3e2efddb918677e51e"></a><!-- doxytag: member="usrp_standard_rx::write_hw_mux_reg" ref="a182048083827bf3e2efddb918677e51e" args="()" -->
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<td class="memname">bool usrp_standard_rx::write_hw_mux_reg </td>
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<td class="paramname"></td><td>)</td>
<td><code> [protected]</code></td>
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<p>References <a class="el" href="classusrp__basic.html#ac5bdb9be69f27eb3a0530cba9536d0f4">usrp_basic::_write_fpga_reg()</a>, <a class="el" href="classusrp__basic__rx.html#aec8c94d230440bb38951e9718755b994">usrp_basic_rx::disable_rx()</a>, and <a class="el" href="classusrp__basic__rx.html#a15a44f86a1a019e94d18f3c19b4cd34a">usrp_basic_rx::restore_rx()</a>.</p>
<p>Referenced by <a class="el" href="classusrp__standard__rx.html#aa98b7831a644635f19ee84a7ecd404b2">set_mux()</a>, and <a class="el" href="classusrp__standard__rx.html#a9ab9aa92005647b967d063003a841ca0">set_nchannels()</a>.</p>
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<hr/>The documentation for this class was generated from the following files:<ul>
<li><a class="el" href="usrp__standard_8h_source.html">usrp_standard.h</a></li>
<li><a class="el" href="usrp__standard_8cc.html">usrp_standard.cc</a></li>
</ul>
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<hr class="footer"/><address class="footer"><small>Generated on Thu Feb 17 2011 for Universal Software Radio Peripheral by 
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