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<title>src/ForSyDe/Backend/VHDL/Translate.hs</title>
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<pre><a name="line-1"></a><span class='hs-comment'>{-# LANGUAGE TemplateHaskell, TypeOperators #-}</span>
<a name="line-2"></a><span class='hs-comment'>-----------------------------------------------------------------------------</span>
<a name="line-3"></a><span class='hs-comment'>-- |</span>
<a name="line-4"></a><span class='hs-comment'>-- Module : ForSyDe.Backend.VHDL.Traverse</span>
<a name="line-5"></a><span class='hs-comment'>-- Copyright : (c) SAM Group, KTH/ICT/ECS 2007-2008</span>
<a name="line-6"></a><span class='hs-comment'>-- License : BSD-style (see the file LICENSE)</span>
<a name="line-7"></a><span class='hs-comment'>-- </span>
<a name="line-8"></a><span class='hs-comment'>-- Maintainer : forsyde-dev@ict.kth.se</span>
<a name="line-9"></a><span class='hs-comment'>-- Stability : experimental</span>
<a name="line-10"></a><span class='hs-comment'>-- Portability : portable</span>
<a name="line-11"></a><span class='hs-comment'>--</span>
<a name="line-12"></a><span class='hs-comment'>-- Functions to translate elements of the intermediate system </span>
<a name="line-13"></a><span class='hs-comment'>-- representation to elements of the VHDL AST.</span>
<a name="line-14"></a><span class='hs-comment'>-----------------------------------------------------------------------------</span>
<a name="line-15"></a><span class='hs-keyword'>module</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Backend</span><span class='hs-varop'>.</span><span class='hs-conid'>VHDL</span><span class='hs-varop'>.</span><span class='hs-conid'>Translate</span> <span class='hs-keyword'>where</span>
<a name="line-16"></a>
<a name="line-17"></a>
<a name="line-18"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Backend</span><span class='hs-varop'>.</span><span class='hs-conid'>VHDL</span><span class='hs-varop'>.</span><span class='hs-conid'>AST</span>
<a name="line-19"></a><span class='hs-keyword'>import</span> <span class='hs-keyword'>qualified</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Backend</span><span class='hs-varop'>.</span><span class='hs-conid'>VHDL</span><span class='hs-varop'>.</span><span class='hs-conid'>AST</span> <span class='hs-keyword'>as</span> <span class='hs-conid'>VHDL</span>
<a name="line-20"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Backend</span><span class='hs-varop'>.</span><span class='hs-conid'>VHDL</span><span class='hs-varop'>.</span><span class='hs-conid'>Constants</span>
<a name="line-21"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Backend</span><span class='hs-varop'>.</span><span class='hs-conid'>VHDL</span><span class='hs-varop'>.</span><span class='hs-conid'>Generate</span>
<a name="line-22"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Backend</span><span class='hs-varop'>.</span><span class='hs-conid'>VHDL</span><span class='hs-varop'>.</span><span class='hs-conid'>Traverse</span><span class='hs-varop'>.</span><span class='hs-conid'>VHDLM</span>
<a name="line-23"></a>
<a name="line-24"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Ids</span>
<a name="line-25"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>AbsentExt</span>
<a name="line-26"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Signal</span>
<a name="line-27"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Bit</span> <span class='hs-varid'>hiding</span> <span class='hs-layout'>(</span><span class='hs-varid'>not</span><span class='hs-layout'>)</span>
<a name="line-28"></a><span class='hs-keyword'>import</span> <span class='hs-keyword'>qualified</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Bit</span> <span class='hs-keyword'>as</span> <span class='hs-conid'>B</span>
<a name="line-29"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>ForSyDeErr</span>
<a name="line-30"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>System</span><span class='hs-varop'>.</span><span class='hs-conid'>SysDef</span>
<a name="line-31"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Process</span><span class='hs-varop'>.</span><span class='hs-conid'>ProcFun</span>
<a name="line-32"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Process</span><span class='hs-varop'>.</span><span class='hs-conid'>ProcVal</span>
<a name="line-33"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>ForSyDe</span><span class='hs-varop'>.</span><span class='hs-conid'>Process</span><span class='hs-varop'>.</span><span class='hs-conid'>ProcType</span>
<a name="line-34"></a>
<a name="line-35"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Typeable</span><span class='hs-varop'>.</span><span class='hs-conid'>TypeRepLib</span> <span class='hs-layout'>(</span><span class='hs-varid'>unArrowT</span><span class='hs-layout'>)</span>
<a name="line-36"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Language</span><span class='hs-varop'>.</span><span class='hs-conid'>Haskell</span><span class='hs-varop'>.</span><span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>TypeLib</span> <span class='hs-layout'>(</span><span class='hs-varid'>type2TypeRep</span><span class='hs-layout'>)</span>
<a name="line-37"></a>
<a name="line-38"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Data</span> <span class='hs-layout'>(</span><span class='hs-varid'>tyconUQname</span><span class='hs-layout'>)</span>
<a name="line-39"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Int</span>
<a name="line-40"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Char</span> <span class='hs-layout'>(</span><span class='hs-varid'>digitToInt</span><span class='hs-layout'>)</span>
<a name="line-41"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>List</span> <span class='hs-layout'>(</span><span class='hs-varid'>intersperse</span><span class='hs-layout'>)</span>
<a name="line-42"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Maybe</span> <span class='hs-layout'>(</span><span class='hs-varid'>isJust</span><span class='hs-layout'>,</span> <span class='hs-varid'>fromJust</span><span class='hs-layout'>)</span>
<a name="line-43"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Control</span><span class='hs-varop'>.</span><span class='hs-conid'>Monad</span><span class='hs-varop'>.</span><span class='hs-conid'>State</span>
<a name="line-44"></a><span class='hs-keyword'>import</span> <span class='hs-keyword'>qualified</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Set</span> <span class='hs-keyword'>as</span> <span class='hs-conid'>S</span>
<a name="line-45"></a><span class='hs-keyword'>import</span> <span class='hs-keyword'>qualified</span> <span class='hs-conid'>Language</span><span class='hs-varop'>.</span><span class='hs-conid'>Haskell</span><span class='hs-varop'>.</span><span class='hs-conid'>TH</span> <span class='hs-keyword'>as</span> <span class='hs-conid'>TH</span>
<a name="line-46"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Language</span><span class='hs-varop'>.</span><span class='hs-conid'>Haskell</span><span class='hs-varop'>.</span><span class='hs-conid'>TH</span> <span class='hs-varid'>hiding</span> <span class='hs-layout'>(</span><span class='hs-varid'>global</span><span class='hs-layout'>,</span><span class='hs-conid'>Loc</span><span class='hs-layout'>)</span>
<a name="line-47"></a><span class='hs-keyword'>import</span> <span class='hs-keyword'>qualified</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Traversable</span> <span class='hs-keyword'>as</span> <span class='hs-conid'>DT</span>
<a name="line-48"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Typeable</span>
<a name="line-49"></a><span class='hs-keyword'>import</span> <span class='hs-keyword'>qualified</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>Param</span><span class='hs-varop'>.</span><span class='hs-conid'>FSVec</span> <span class='hs-keyword'>as</span> <span class='hs-conid'>V</span>
<a name="line-50"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Text</span><span class='hs-varop'>.</span><span class='hs-conid'>Regex</span><span class='hs-varop'>.</span><span class='hs-conid'>Posix</span> <span class='hs-layout'>(</span><span class='hs-layout'>(</span><span class='hs-varop'>=~</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-51"></a>
<a name="line-52"></a><span class='hs-keyword'>import</span> <span class='hs-conid'>Data</span><span class='hs-varop'>.</span><span class='hs-conid'>TypeLevel</span><span class='hs-varop'>.</span><span class='hs-conid'>Num</span><span class='hs-varop'>.</span><span class='hs-conid'>Reps</span>
<a name="line-53"></a>
<a name="line-54"></a><a name="transSysDef2Ent"></a><span class='hs-comment'>-- | Translate a System Definition to an Entity, explicitly returning</span>
<a name="line-55"></a><span class='hs-comment'>-- the VHDL identifiers of its output signals.</span>
<a name="line-56"></a><span class='hs-definition'>transSysDef2Ent</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>SysLogic</span> <span class='hs-comment'>-- ^ logic of the system </span>
<a name="line-57"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>SysDefVal</span> <span class='hs-comment'>-- ^ system to translate </span>
<a name="line-58"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>EntityDec</span>
<a name="line-59"></a><span class='hs-definition'>transSysDef2Ent</span> <span class='hs-varid'>logic</span> <span class='hs-varid'>sysDefVal</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-60"></a> <span class='hs-varid'>entId</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transSysId2VHDL</span> <span class='hs-layout'>(</span><span class='hs-varid'>sid</span> <span class='hs-varid'>sysDefVal</span><span class='hs-layout'>)</span>
<a name="line-61"></a> <span class='hs-varid'>inDecs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-layout'>(</span><span class='hs-varid'>uncurry</span> <span class='hs-varop'>$</span> <span class='hs-varid'>transPort2IfaceSigDec</span> <span class='hs-conid'>In</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>iIface</span> <span class='hs-varid'>sysDefVal</span><span class='hs-layout'>)</span>
<a name="line-62"></a> <span class='hs-varid'>outDecs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-layout'>(</span><span class='hs-varid'>uncurry</span> <span class='hs-varop'>$</span> <span class='hs-varid'>transPort2IfaceSigDec</span> <span class='hs-conid'>Out</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>oIface</span> <span class='hs-varid'>sysDefVal</span><span class='hs-layout'>)</span>
<a name="line-63"></a> <span class='hs-comment'>-- clock and reset implicit declarations</span>
<a name="line-64"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>implicitDecs</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>if</span> <span class='hs-varid'>logic</span> <span class='hs-varop'>==</span> <span class='hs-conid'>Sequential</span> <span class='hs-keyword'>then</span>
<a name="line-65"></a> <span class='hs-keyglyph'>[</span><span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>resetId</span> <span class='hs-conid'>In</span> <span class='hs-varid'>std_logicTM</span><span class='hs-layout'>,</span>
<a name="line-66"></a> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>clockId</span> <span class='hs-conid'>In</span> <span class='hs-varid'>std_logicTM</span><span class='hs-keyglyph'>]</span>
<a name="line-67"></a> <span class='hs-keyword'>else</span> <span class='hs-conid'>[]</span>
<a name="line-68"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>EntityDec</span> <span class='hs-varid'>entId</span> <span class='hs-layout'>(</span><span class='hs-varid'>implicitDecs</span> <span class='hs-varop'>++</span> <span class='hs-varid'>inDecs</span> <span class='hs-varop'>++</span> <span class='hs-varid'>outDecs</span><span class='hs-layout'>)</span>
<a name="line-69"></a>
<a name="line-70"></a><a name="transZipWithN2Block"></a><span class='hs-comment'>-- | Translate a 'ZipwithNSY' process to a block returning a declaration of</span>
<a name="line-71"></a><span class='hs-comment'>-- the resulting signal.</span>
<a name="line-72"></a><span class='hs-definition'>transZipWithN2Block</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Label</span> <span class='hs-comment'>-- ^ process identifier</span>
<a name="line-73"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>VHDLId</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ input signals</span>
<a name="line-74"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Loc</span> <span class='hs-comment'>-- ^ location of the inner function</span>
<a name="line-75"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypedProcFunAST</span> <span class='hs-comment'>-- ^ AST of the inner function</span>
<a name="line-76"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLId</span> <span class='hs-comment'>-- ^ output signal</span>
<a name="line-77"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span><span class='hs-layout'>,</span> <span class='hs-conid'>SigDec</span><span class='hs-layout'>)</span>
<a name="line-78"></a><span class='hs-definition'>transZipWithN2Block</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>ins</span> <span class='hs-varid'>loc</span> <span class='hs-varid'>ast</span> <span class='hs-varid'>out</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-79"></a> <span class='hs-comment'>-- Translate the process function</span>
<a name="line-80"></a> <span class='hs-layout'>(</span><span class='hs-varid'>f</span><span class='hs-layout'>,</span><span class='hs-varid'>fName</span> <span class='hs-layout'>,</span> <span class='hs-varid'>inFPars</span><span class='hs-layout'>,</span> <span class='hs-varid'>inFTypes</span><span class='hs-layout'>,</span> <span class='hs-varid'>retFType</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'><-</span>
<a name="line-81"></a> <span class='hs-varid'>withProcFunC</span> <span class='hs-layout'>(</span><span class='hs-layout'>(</span><span class='hs-varid'>name</span><span class='hs-varop'>.</span><span class='hs-varid'>tpast</span><span class='hs-layout'>)</span> <span class='hs-varid'>ast</span><span class='hs-layout'>)</span> <span class='hs-varid'>loc</span> <span class='hs-varop'>$</span> <span class='hs-varid'>transProcFun2VHDL</span> <span class='hs-varid'>ast</span>
<a name="line-82"></a> <span class='hs-comment'>-- Generate the formal parameters of the block</span>
<a name="line-83"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>inPars</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>n</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-layout'>(</span><span class='hs-str'>"_in"</span> <span class='hs-varop'>++</span> <span class='hs-varid'>show</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>[</span><span class='hs-num'>1</span><span class='hs-keyglyph'>..</span><span class='hs-varid'>length</span> <span class='hs-varid'>ins</span><span class='hs-keyglyph'>]</span>
<a name="line-84"></a> <span class='hs-varid'>outPar</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-str'>"_out"</span>
<a name="line-85"></a> <span class='hs-comment'>-- Generate the port interface of the block </span>
<a name="line-86"></a> <span class='hs-varid'>inDecs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>zipWith</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>par</span> <span class='hs-varid'>typ</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>par</span> <span class='hs-conid'>In</span> <span class='hs-varid'>typ</span><span class='hs-layout'>)</span> <span class='hs-varid'>inPars</span> <span class='hs-varid'>inFTypes</span>
<a name="line-87"></a> <span class='hs-varid'>outDec</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>outPar</span> <span class='hs-conid'>Out</span> <span class='hs-varid'>retFType</span>
<a name="line-88"></a> <span class='hs-varid'>iface</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>inDecs</span> <span class='hs-varop'>++</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>outDec</span><span class='hs-keyglyph'>]</span>
<a name="line-89"></a> <span class='hs-comment'>-- Generate the port map</span>
<a name="line-90"></a> <span class='hs-varid'>pMap</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genPMap</span> <span class='hs-layout'>(</span><span class='hs-varid'>inPars</span> <span class='hs-varop'>++</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>outPar</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>ins</span> <span class='hs-varop'>++</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>out</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-91"></a> <span class='hs-comment'>-- Generate the function call and signal assignment</span>
<a name="line-92"></a> <span class='hs-varid'>outAssign</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genFCallAssign</span> <span class='hs-varid'>out</span> <span class='hs-varid'>fName</span> <span class='hs-varid'>inFPars</span> <span class='hs-varid'>ins</span>
<a name="line-93"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>iface</span> <span class='hs-varid'>pMap</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>BDISPB</span> <span class='hs-varid'>f</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>CSSASm</span> <span class='hs-varid'>outAssign</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span>
<a name="line-94"></a> <span class='hs-conid'>SigDec</span> <span class='hs-varid'>out</span> <span class='hs-varid'>retFType</span> <span class='hs-conid'>Nothing</span><span class='hs-layout'>)</span>
<a name="line-95"></a>
<a name="line-96"></a>
<a name="line-97"></a><a name="transZipWithx2Block"></a><span class='hs-comment'>-- | Translate a 'ZipwithxSY' process to a block returning a declaration of</span>
<a name="line-98"></a><span class='hs-comment'>-- the resulting signal.</span>
<a name="line-99"></a><span class='hs-definition'>transZipWithx2Block</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Label</span> <span class='hs-comment'>-- ^ process identifier</span>
<a name="line-100"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>VHDLId</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ input signals</span>
<a name="line-101"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Loc</span> <span class='hs-comment'>-- ^ location of the inner function</span>
<a name="line-102"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypedProcFunAST</span> <span class='hs-comment'>-- ^ AST of the inner function</span>
<a name="line-103"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLId</span> <span class='hs-comment'>-- ^ output signal</span>
<a name="line-104"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span><span class='hs-layout'>,</span> <span class='hs-conid'>SigDec</span><span class='hs-layout'>)</span>
<a name="line-105"></a><span class='hs-definition'>transZipWithx2Block</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>ins</span> <span class='hs-varid'>loc</span> <span class='hs-varid'>ast</span> <span class='hs-varid'>out</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-106"></a> <span class='hs-comment'>-- Translate the process function</span>
<a name="line-107"></a> <span class='hs-layout'>(</span><span class='hs-varid'>f</span><span class='hs-layout'>,</span> <span class='hs-varid'>fName</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>inFPar</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>inFType</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-varid'>retFType</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'><-</span>
<a name="line-108"></a> <span class='hs-varid'>withProcFunC</span> <span class='hs-layout'>(</span><span class='hs-layout'>(</span><span class='hs-varid'>name</span><span class='hs-varop'>.</span><span class='hs-varid'>tpast</span><span class='hs-layout'>)</span> <span class='hs-varid'>ast</span><span class='hs-layout'>)</span> <span class='hs-varid'>loc</span> <span class='hs-varop'>$</span> <span class='hs-varid'>transProcFun2VHDL</span> <span class='hs-varid'>ast</span>
<a name="line-109"></a> <span class='hs-comment'>-- Figure out the type of the inputs from the </span>
<a name="line-110"></a> <span class='hs-comment'>-- function's input vector type (horrible hack, but it works)</span>
<a name="line-111"></a> <span class='hs-keyword'>let</span> <span class='hs-keyglyph'>[</span><span class='hs-keyglyph'>[</span><span class='hs-keyword'>_</span><span class='hs-layout'>,</span><span class='hs-varid'>suffix</span><span class='hs-keyglyph'>]</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>fromVHDLId</span> <span class='hs-varid'>inFType</span><span class='hs-layout'>)</span> <span class='hs-varop'>=~</span> <span class='hs-str'>"^fsvec_[0-9]*_(.*)$"</span>
<a name="line-112"></a> <span class='hs-varid'>inType</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeVHDLBasicId</span> <span class='hs-varop'>$</span> <span class='hs-varid'>suffix</span>
<a name="line-113"></a> <span class='hs-comment'>-- Generate the formal parameters of the block</span>
<a name="line-114"></a> <span class='hs-varid'>inPars</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>n</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-layout'>(</span><span class='hs-str'>"_in"</span> <span class='hs-varop'>++</span> <span class='hs-varid'>show</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>[</span><span class='hs-num'>1</span><span class='hs-keyglyph'>..</span><span class='hs-varid'>length</span> <span class='hs-varid'>ins</span><span class='hs-keyglyph'>]</span>
<a name="line-115"></a> <span class='hs-varid'>outPar</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-str'>"_out"</span>
<a name="line-116"></a> <span class='hs-comment'>-- Generate the port interface of the block </span>
<a name="line-117"></a> <span class='hs-varid'>inDecs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>par</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>par</span> <span class='hs-conid'>In</span> <span class='hs-varid'>inType</span><span class='hs-layout'>)</span> <span class='hs-varid'>inPars</span>
<a name="line-118"></a> <span class='hs-varid'>outDec</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>outPar</span> <span class='hs-conid'>Out</span> <span class='hs-varid'>retFType</span>
<a name="line-119"></a> <span class='hs-varid'>iface</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>inDecs</span> <span class='hs-varop'>++</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>outDec</span><span class='hs-keyglyph'>]</span>
<a name="line-120"></a> <span class='hs-comment'>-- Generate the port map</span>
<a name="line-121"></a> <span class='hs-varid'>pMap</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genPMap</span> <span class='hs-layout'>(</span><span class='hs-varid'>inPars</span> <span class='hs-varop'>++</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>outPar</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>ins</span> <span class='hs-varop'>++</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>out</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-122"></a> <span class='hs-comment'>-- Generate the function call and signal assignment</span>
<a name="line-123"></a> <span class='hs-varid'>aggregate</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>Aggregate</span> <span class='hs-varop'>$</span>
<a name="line-124"></a> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>e</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>ElemAssoc</span> <span class='hs-conid'>Nothing</span> <span class='hs-layout'>(</span><span class='hs-conid'>PrimName</span><span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>e</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-varid'>inPars</span>
<a name="line-125"></a> <span class='hs-varid'>fCall</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>PrimFCall</span> <span class='hs-varop'>$</span> <span class='hs-conid'>FCall</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>fName</span><span class='hs-layout'>)</span>
<a name="line-126"></a> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Just</span> <span class='hs-varid'>inFPar</span> <span class='hs-conop'>:=>:</span> <span class='hs-conid'>ADExpr</span> <span class='hs-varid'>aggregate</span><span class='hs-keyglyph'>]</span>
<a name="line-127"></a> <span class='hs-varid'>outAssign</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genExprAssign</span> <span class='hs-varid'>outPar</span> <span class='hs-varid'>fCall</span>
<a name="line-128"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>iface</span> <span class='hs-varid'>pMap</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>BDISPB</span> <span class='hs-varid'>f</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>CSSASm</span> <span class='hs-varid'>outAssign</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span>
<a name="line-129"></a> <span class='hs-conid'>SigDec</span> <span class='hs-varid'>out</span> <span class='hs-varid'>retFType</span> <span class='hs-conid'>Nothing</span><span class='hs-layout'>)</span>
<a name="line-130"></a>
<a name="line-131"></a><a name="transUnzipNSY2Block"></a><span class='hs-comment'>-- | Translate a 'UnzipNSY' process to a block returning a declaration of</span>
<a name="line-132"></a><span class='hs-comment'>-- the resulting signal.</span>
<a name="line-133"></a><span class='hs-definition'>transUnzipNSY2Block</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Label</span> <span class='hs-comment'>-- ^ process identifier</span>
<a name="line-134"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLId</span> <span class='hs-comment'>-- ^ input signal</span>
<a name="line-135"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>VHDLId</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ output signals</span>
<a name="line-136"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>TypeRep</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ output signal types</span>
<a name="line-137"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>SigDec</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-138"></a><span class='hs-definition'>transUnzipNSY2Block</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>inSig</span> <span class='hs-varid'>outSigs</span> <span class='hs-varid'>outTRTypes</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-139"></a> <span class='hs-comment'>-- Generate the formal parameters of the block</span>
<a name="line-140"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>inPar</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-str'>"_in"</span>
<a name="line-141"></a> <span class='hs-varid'>outPars</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>n</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-layout'>(</span><span class='hs-str'>"_out"</span> <span class='hs-varop'>++</span> <span class='hs-varid'>show</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-142"></a> <span class='hs-keyglyph'>[</span><span class='hs-num'>1</span><span class='hs-keyglyph'>..</span><span class='hs-varid'>length</span> <span class='hs-varid'>outSigs</span><span class='hs-keyglyph'>]</span>
<a name="line-143"></a> <span class='hs-comment'>-- Generate the port interface of the block</span>
<a name="line-144"></a> <span class='hs-varid'>nOuts</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>length</span> <span class='hs-varid'>outSigs</span>
<a name="line-145"></a> <span class='hs-varid'>tupTyCon</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>mkTyCon</span> <span class='hs-varop'>$</span> <span class='hs-chr'>'('</span><span class='hs-conop'>:</span><span class='hs-varid'>replicate</span> <span class='hs-layout'>(</span><span class='hs-varid'>nOuts</span><span class='hs-comment'>-</span><span class='hs-num'>1</span><span class='hs-layout'>)</span> <span class='hs-chr'>','</span><span class='hs-varop'>++</span><span class='hs-str'>")"</span>
<a name="line-146"></a> <span class='hs-varid'>inTRType</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>tupTyCon</span> <span class='hs-varop'>`mkTyConApp`</span> <span class='hs-varid'>outTRTypes</span>
<a name="line-147"></a> <span class='hs-varid'>outTMTypes</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>outTRTypes</span>
<a name="line-148"></a> <span class='hs-varid'>inTMType</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>inTRType</span>
<a name="line-149"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>inDec</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>inPar</span> <span class='hs-conid'>In</span> <span class='hs-varid'>inTMType</span>
<a name="line-150"></a> <span class='hs-varid'>outDecs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>zipWith</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>par</span> <span class='hs-varid'>typ</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>par</span> <span class='hs-conid'>Out</span> <span class='hs-varid'>typ</span><span class='hs-layout'>)</span> <span class='hs-varid'>outPars</span> <span class='hs-varid'>outTMTypes</span>
<a name="line-151"></a> <span class='hs-varid'>iface</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>inDec</span> <span class='hs-conop'>:</span> <span class='hs-varid'>outDecs</span>
<a name="line-152"></a> <span class='hs-comment'>-- Generate the port map</span>
<a name="line-153"></a> <span class='hs-varid'>pMap</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genPMap</span> <span class='hs-layout'>(</span><span class='hs-varid'>inPar</span> <span class='hs-conop'>:</span> <span class='hs-varid'>outPars</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>inSig</span> <span class='hs-conop'>:</span> <span class='hs-varid'>outSigs</span><span class='hs-layout'>)</span>
<a name="line-154"></a> <span class='hs-comment'>-- Generate the signal assignments</span>
<a name="line-155"></a> <span class='hs-varid'>genOrigExp</span> <span class='hs-varid'>n</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-conid'>PrimName</span> <span class='hs-varop'>$</span> <span class='hs-conid'>NSelected</span>
<a name="line-156"></a> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>inPar</span> <span class='hs-conop'>:.:</span> <span class='hs-varid'>tupVHDLSuffix</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-157"></a> <span class='hs-varid'>genOutAssign</span> <span class='hs-varid'>outSig</span> <span class='hs-varid'>n</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>CSSASm</span> <span class='hs-varop'>$</span> <span class='hs-varid'>genExprAssign</span> <span class='hs-varid'>outSig</span> <span class='hs-layout'>(</span><span class='hs-varid'>genOrigExp</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span>
<a name="line-158"></a> <span class='hs-varid'>outAssigns</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>zipWith</span> <span class='hs-varid'>genOutAssign</span> <span class='hs-varid'>outPars</span> <span class='hs-keyglyph'>[</span><span class='hs-layout'>(</span><span class='hs-num'>1</span><span class='hs-keyglyph'>::</span><span class='hs-conid'>Int</span><span class='hs-layout'>)</span><span class='hs-keyglyph'>..</span><span class='hs-keyglyph'>]</span>
<a name="line-159"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>iface</span> <span class='hs-varid'>pMap</span> <span class='hs-conid'>[]</span> <span class='hs-varid'>outAssigns</span><span class='hs-layout'>,</span>
<a name="line-160"></a> <span class='hs-varid'>zipWith</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>sig</span> <span class='hs-varid'>typ</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>SigDec</span> <span class='hs-varid'>sig</span> <span class='hs-varid'>typ</span> <span class='hs-conid'>Nothing</span><span class='hs-layout'>)</span> <span class='hs-varid'>outSigs</span> <span class='hs-varid'>outTMTypes</span><span class='hs-layout'>)</span>
<a name="line-161"></a>
<a name="line-162"></a>
<a name="line-163"></a>
<a name="line-164"></a><a name="transUnzipxSY2Block"></a><span class='hs-comment'>-- | Translate a 'UnzipxSY' process to a block returning a declaration of</span>
<a name="line-165"></a><span class='hs-comment'>-- the resulting signal.</span>
<a name="line-166"></a><span class='hs-definition'>transUnzipxSY2Block</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Label</span> <span class='hs-comment'>-- ^ process identifier</span>
<a name="line-167"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLId</span> <span class='hs-comment'>-- ^ input signal</span>
<a name="line-168"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>VHDLId</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ output signals</span>
<a name="line-169"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypeRep</span> <span class='hs-comment'>-- ^ type of vector elements</span>
<a name="line-170"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Int</span> <span class='hs-comment'>-- ^ vector Size</span>
<a name="line-171"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>SigDec</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-172"></a><span class='hs-definition'>transUnzipxSY2Block</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>inSig</span> <span class='hs-varid'>outSigs</span> <span class='hs-varid'>elemTR</span> <span class='hs-varid'>vSize</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-173"></a> <span class='hs-comment'>-- Generate the formal parameters of the block</span>
<a name="line-174"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>inPar</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-str'>"_in"</span>
<a name="line-175"></a> <span class='hs-varid'>outPars</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>n</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-layout'>(</span><span class='hs-str'>"_out"</span> <span class='hs-varop'>++</span> <span class='hs-varid'>show</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-176"></a> <span class='hs-keyglyph'>[</span><span class='hs-num'>1</span><span class='hs-keyglyph'>..</span><span class='hs-varid'>length</span> <span class='hs-varid'>outSigs</span><span class='hs-keyglyph'>]</span>
<a name="line-177"></a> <span class='hs-comment'>-- Generate the port interface of the block</span>
<a name="line-178"></a> <span class='hs-varid'>inTRType</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>fSVecTyCon</span> <span class='hs-varop'>`mkTyConApp`</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>transInt2TLNat</span> <span class='hs-varid'>vSize</span><span class='hs-layout'>,</span> <span class='hs-varid'>elemTR</span><span class='hs-keyglyph'>]</span>
<a name="line-179"></a> <span class='hs-varid'>inTMType</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>inTRType</span>
<a name="line-180"></a> <span class='hs-varid'>elemTM</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>elemTR</span>
<a name="line-181"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>inDec</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>inPar</span> <span class='hs-conid'>In</span> <span class='hs-varid'>inTMType</span>
<a name="line-182"></a> <span class='hs-varid'>outDecs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>par</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>par</span> <span class='hs-conid'>Out</span> <span class='hs-varid'>elemTM</span><span class='hs-layout'>)</span> <span class='hs-varid'>outPars</span>
<a name="line-183"></a> <span class='hs-varid'>iface</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>inDec</span> <span class='hs-conop'>:</span> <span class='hs-varid'>outDecs</span>
<a name="line-184"></a> <span class='hs-comment'>-- Generate the port map</span>
<a name="line-185"></a> <span class='hs-varid'>pMap</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genPMap</span> <span class='hs-layout'>(</span><span class='hs-varid'>inPar</span> <span class='hs-conop'>:</span> <span class='hs-varid'>outPars</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>inSig</span> <span class='hs-conop'>:</span> <span class='hs-varid'>outSigs</span><span class='hs-layout'>)</span>
<a name="line-186"></a> <span class='hs-comment'>-- Generate the signal assignments</span>
<a name="line-187"></a> <span class='hs-varid'>genOrigExp</span> <span class='hs-varid'>n</span> <span class='hs-keyglyph'>=</span>
<a name="line-188"></a> <span class='hs-conid'>PrimName</span> <span class='hs-varop'>$</span> <span class='hs-conid'>NIndexed</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>inPar</span> <span class='hs-varop'>`IndexedName`</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>PrimLit</span> <span class='hs-varop'>$</span> <span class='hs-varid'>show</span> <span class='hs-varid'>n</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-189"></a> <span class='hs-varid'>genOutAssign</span> <span class='hs-varid'>outSig</span> <span class='hs-varid'>n</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>CSSASm</span> <span class='hs-varop'>$</span> <span class='hs-varid'>genExprAssign</span> <span class='hs-varid'>outSig</span> <span class='hs-layout'>(</span><span class='hs-varid'>genOrigExp</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span>
<a name="line-190"></a> <span class='hs-varid'>outAssigns</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>zipWith</span> <span class='hs-varid'>genOutAssign</span> <span class='hs-varid'>outPars</span> <span class='hs-keyglyph'>[</span><span class='hs-layout'>(</span><span class='hs-num'>0</span><span class='hs-keyglyph'>::</span><span class='hs-conid'>Int</span><span class='hs-layout'>)</span><span class='hs-keyglyph'>..</span><span class='hs-keyglyph'>]</span>
<a name="line-191"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>iface</span> <span class='hs-varid'>pMap</span> <span class='hs-conid'>[]</span> <span class='hs-varid'>outAssigns</span><span class='hs-layout'>,</span>
<a name="line-192"></a> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>sig</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>SigDec</span> <span class='hs-varid'>sig</span> <span class='hs-varid'>elemTM</span> <span class='hs-conid'>Nothing</span><span class='hs-layout'>)</span> <span class='hs-varid'>outSigs</span><span class='hs-layout'>)</span>
<a name="line-193"></a>
<a name="line-194"></a>
<a name="line-195"></a>
<a name="line-196"></a>
<a name="line-197"></a><a name="transDelay2Block"></a><span class='hs-comment'>-- | Translate a 'DelaySY' process to a block returning a declaration of</span>
<a name="line-198"></a><span class='hs-comment'>-- the resulting signal.</span>
<a name="line-199"></a><span class='hs-definition'>transDelay2Block</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Label</span> <span class='hs-comment'>-- ^ process identifier</span>
<a name="line-200"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLId</span> <span class='hs-comment'>-- ^ input signal</span>
<a name="line-201"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>ProcValAST</span> <span class='hs-comment'>-- ^ AST of the initial value </span>
<a name="line-202"></a> <span class='hs-comment'>-- of the delay process</span>
<a name="line-203"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLId</span> <span class='hs-comment'>-- ^ output signal</span>
<a name="line-204"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span><span class='hs-layout'>,</span> <span class='hs-conid'>SigDec</span><span class='hs-layout'>)</span>
<a name="line-205"></a><span class='hs-definition'>transDelay2Block</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>inS</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcValAST</span> <span class='hs-varid'>exp</span> <span class='hs-varid'>tr</span> <span class='hs-varid'>enums</span><span class='hs-layout'>)</span> <span class='hs-varid'>outS</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-206"></a> <span class='hs-comment'>-- Add the enumerated types associated with the value to the global results</span>
<a name="line-207"></a> <span class='hs-varid'>addEnumTypes</span> <span class='hs-varid'>enums</span>
<a name="line-208"></a> <span class='hs-comment'>-- Get the type of the initial value</span>
<a name="line-209"></a> <span class='hs-varid'>initTR</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>tr</span>
<a name="line-210"></a> <span class='hs-comment'>-- Translate the initial value</span>
<a name="line-211"></a> <span class='hs-varid'>initExp</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>withProcValC</span> <span class='hs-varid'>exp</span> <span class='hs-varop'>$</span> <span class='hs-varid'>withInitFunTransST</span> <span class='hs-varop'>$</span> <span class='hs-layout'>(</span><span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>exp</span><span class='hs-layout'>)</span>
<a name="line-212"></a> <span class='hs-comment'>-- Build the block</span>
<a name="line-213"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>formalIn</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-str'>"_in"</span>
<a name="line-214"></a> <span class='hs-varid'>formalOut</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeIdAppend</span> <span class='hs-varid'>vPid</span> <span class='hs-str'>"_out"</span>
<a name="line-215"></a> <span class='hs-varid'>iface</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>resetId</span> <span class='hs-conid'>In</span> <span class='hs-varid'>std_logicTM</span><span class='hs-layout'>,</span>
<a name="line-216"></a> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>clockId</span> <span class='hs-conid'>In</span> <span class='hs-varid'>std_logicTM</span><span class='hs-layout'>,</span>
<a name="line-217"></a> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>formalIn</span> <span class='hs-conid'>In</span> <span class='hs-varid'>initTR</span><span class='hs-layout'>,</span>
<a name="line-218"></a> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>formalOut</span> <span class='hs-conid'>Out</span> <span class='hs-varid'>initTR</span><span class='hs-keyglyph'>]</span>
<a name="line-219"></a> <span class='hs-varid'>assocs</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Just</span> <span class='hs-varid'>resetId</span> <span class='hs-conop'>:=>:</span> <span class='hs-conid'>ADName</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>resetId</span><span class='hs-layout'>)</span><span class='hs-layout'>,</span>
<a name="line-220"></a> <span class='hs-conid'>Just</span> <span class='hs-varid'>clockId</span> <span class='hs-conop'>:=>:</span> <span class='hs-conid'>ADName</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>clockId</span><span class='hs-layout'>)</span><span class='hs-layout'>,</span>
<a name="line-221"></a> <span class='hs-conid'>Just</span> <span class='hs-varid'>formalIn</span> <span class='hs-conop'>:=>:</span> <span class='hs-conid'>ADName</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>inS</span><span class='hs-layout'>)</span><span class='hs-layout'>,</span>
<a name="line-222"></a> <span class='hs-conid'>Just</span> <span class='hs-varid'>formalOut</span> <span class='hs-conop'>:=>:</span> <span class='hs-conid'>ADName</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>outS</span><span class='hs-layout'>)</span><span class='hs-keyglyph'>]</span>
<a name="line-223"></a> <span class='hs-varid'>sigAssign</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>CSSASm</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>formalOut</span> <span class='hs-conop'>:<==:</span>
<a name="line-224"></a> <span class='hs-layout'>(</span><span class='hs-conid'>ConWforms</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>whenElseReset</span><span class='hs-keyglyph'>]</span> <span class='hs-varid'>inWform</span> <span class='hs-layout'>(</span><span class='hs-conid'>Just</span> <span class='hs-varid'>whenRE</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-225"></a> <span class='hs-varid'>whenElseReset</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>WhenElse</span> <span class='hs-layout'>(</span><span class='hs-conid'>Wform</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>WformElem</span> <span class='hs-varid'>initExp</span> <span class='hs-conid'>Nothing</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-226"></a> <span class='hs-layout'>(</span><span class='hs-conid'>PrimName</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>resetId</span><span class='hs-layout'>)</span> <span class='hs-conop'>:=:</span> <span class='hs-conid'>PrimLit</span> <span class='hs-str'>"'0'"</span><span class='hs-layout'>)</span>
<a name="line-227"></a> <span class='hs-varid'>inWform</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>Wform</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>WformElem</span> <span class='hs-layout'>(</span><span class='hs-conid'>PrimName</span> <span class='hs-varop'>$</span> <span class='hs-conid'>NSimple</span> <span class='hs-varid'>formalIn</span><span class='hs-layout'>)</span> <span class='hs-conid'>Nothing</span><span class='hs-keyglyph'>]</span>
<a name="line-228"></a> <span class='hs-varid'>whenRE</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>When</span> <span class='hs-layout'>(</span><span class='hs-conid'>PrimFCall</span> <span class='hs-varop'>$</span> <span class='hs-conid'>FCall</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varop'>$</span> <span class='hs-varid'>unsafeVHDLBasicId</span> <span class='hs-str'>"rising_edge"</span><span class='hs-layout'>)</span>
<a name="line-229"></a> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Nothing</span> <span class='hs-conop'>:=>:</span> <span class='hs-conid'>ADName</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>clockId</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-230"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>BlockSm</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>iface</span> <span class='hs-layout'>(</span><span class='hs-conid'>PMapAspect</span> <span class='hs-varid'>assocs</span><span class='hs-layout'>)</span> <span class='hs-conid'>[]</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>sigAssign</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span>
<a name="line-231"></a> <span class='hs-conid'>SigDec</span> <span class='hs-varid'>outS</span> <span class='hs-varid'>initTR</span> <span class='hs-conid'>Nothing</span><span class='hs-layout'>)</span>
<a name="line-232"></a>
<a name="line-233"></a><a name="transSysIns2CompIns"></a><span class='hs-comment'>-- | Translate a System instance into a VHDL component instantion</span>
<a name="line-234"></a><span class='hs-comment'>-- returning the declartion of the output signals</span>
<a name="line-235"></a><span class='hs-definition'>transSysIns2CompIns</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>SysLogic</span> <span class='hs-comment'>-- ^ parent system logic</span>
<a name="line-236"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Label</span> <span class='hs-comment'>-- ^ instance identifier</span>
<a name="line-237"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>VHDLId</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ input signals</span>
<a name="line-238"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-layout'>(</span><span class='hs-conid'>VHDLId</span><span class='hs-layout'>,</span> <span class='hs-conid'>TypeRep</span><span class='hs-layout'>)</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ output signals</span>
<a name="line-239"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>SysId</span> <span class='hs-comment'>-- ^ parent system identifier</span>
<a name="line-240"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>PortId</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ parent input identifiers</span>
<a name="line-241"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>PortId</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ parent output identifiers</span>
<a name="line-242"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>Maybe</span> <span class='hs-conid'>CompInsSm</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>SigDec</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-243"></a><span class='hs-definition'>transSysIns2CompIns</span> <span class='hs-varid'>logic</span> <span class='hs-varid'>vPid</span> <span class='hs-varid'>ins</span> <span class='hs-varid'>typedOuts</span> <span class='hs-varid'>parentId</span> <span class='hs-varid'>parentInIds</span> <span class='hs-varid'>parentOutIds</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-244"></a> <span class='hs-keyword'>if</span> <span class='hs-varid'>length</span> <span class='hs-varid'>ins</span> <span class='hs-varop'>==</span> <span class='hs-num'>0</span> <span class='hs-varop'>&&</span> <span class='hs-varid'>length</span> <span class='hs-varid'>typedOuts</span> <span class='hs-varop'>==</span> <span class='hs-num'>0</span>
<a name="line-245"></a> <span class='hs-keyword'>then</span> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>Nothing</span><span class='hs-layout'>,</span> <span class='hs-conid'>[]</span><span class='hs-layout'>)</span>
<a name="line-246"></a> <span class='hs-keyword'>else</span> <span class='hs-keyword'>do</span>
<a name="line-247"></a> <span class='hs-comment'>-- Create the declarations for the signals</span>
<a name="line-248"></a> <span class='hs-varid'>decs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-layout'>(</span><span class='hs-varid'>name</span><span class='hs-layout'>,</span><span class='hs-varid'>typ</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>transVHDLName2SigDec</span> <span class='hs-varid'>name</span> <span class='hs-varid'>typ</span> <span class='hs-conid'>Nothing</span><span class='hs-layout'>)</span> <span class='hs-varid'>typedOuts</span>
<a name="line-249"></a> <span class='hs-comment'>-- Create the portmap </span>
<a name="line-250"></a> <span class='hs-varid'>vParentId</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transSysId2VHDL</span> <span class='hs-varid'>parentId</span>
<a name="line-251"></a> <span class='hs-varid'>vParentInIds</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>liftEProne</span> <span class='hs-varop'>$</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>mkVHDLExtId</span> <span class='hs-varid'>parentInIds</span>
<a name="line-252"></a> <span class='hs-varid'>vParentOutIds</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>liftEProne</span> <span class='hs-varop'>$</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>mkVHDLExtId</span> <span class='hs-varid'>parentOutIds</span>
<a name="line-253"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>implicitAssocIds</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>if</span> <span class='hs-varid'>logic</span> <span class='hs-varop'>==</span> <span class='hs-conid'>Sequential</span> <span class='hs-keyword'>then</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>resetId</span><span class='hs-layout'>,</span> <span class='hs-varid'>clockId</span><span class='hs-keyglyph'>]</span> <span class='hs-keyword'>else</span> <span class='hs-conid'>[]</span>
<a name="line-254"></a> <span class='hs-varid'>assocs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genAssocElems</span>
<a name="line-255"></a> <span class='hs-layout'>(</span><span class='hs-varid'>implicitAssocIds</span> <span class='hs-varop'>++</span> <span class='hs-varid'>vParentInIds</span> <span class='hs-varop'>++</span> <span class='hs-varid'>vParentOutIds</span><span class='hs-layout'>)</span>
<a name="line-256"></a> <span class='hs-layout'>(</span><span class='hs-varid'>implicitAssocIds</span> <span class='hs-varop'>++</span> <span class='hs-varid'>ins</span> <span class='hs-varop'>++</span> <span class='hs-varid'>map</span> <span class='hs-varid'>fst</span> <span class='hs-varid'>typedOuts</span><span class='hs-layout'>)</span>
<a name="line-257"></a> <span class='hs-varid'>entityName</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>NSelected</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>workId</span> <span class='hs-conop'>:.:</span> <span class='hs-conid'>SSimple</span> <span class='hs-varid'>vParentId</span><span class='hs-layout'>)</span>
<a name="line-258"></a> <span class='hs-varid'>instantiation</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>CompInsSm</span> <span class='hs-varid'>vPid</span> <span class='hs-layout'>(</span><span class='hs-conid'>IUEntity</span> <span class='hs-varid'>entityName</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-conid'>PMapAspect</span> <span class='hs-varid'>assocs</span><span class='hs-layout'>)</span>
<a name="line-259"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>Just</span> <span class='hs-varid'>instantiation</span><span class='hs-layout'>,</span> <span class='hs-varid'>decs</span><span class='hs-layout'>)</span>
<a name="line-260"></a>
<a name="line-261"></a>
<a name="line-262"></a><a name="transVHDLName2SigDec"></a><span class='hs-comment'>-- | Translate a VHDL Signal to a VHDL Signal declaration</span>
<a name="line-263"></a><span class='hs-definition'>transVHDLName2SigDec</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>SimpleName</span> <span class='hs-comment'>-- ^ Signal name </span>
<a name="line-264"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypeRep</span> <span class='hs-comment'>-- ^ Type of the intermediate signal </span>
<a name="line-265"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Maybe</span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Exp</span> <span class='hs-comment'>-- ^ Maybe an initializer expression for the signal</span>
<a name="line-266"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>SigDec</span>
<a name="line-267"></a><span class='hs-definition'>transVHDLName2SigDec</span> <span class='hs-varid'>vId</span> <span class='hs-varid'>tr</span> <span class='hs-varid'>mExp</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-268"></a> <span class='hs-varid'>tm</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>tr</span>
<a name="line-269"></a> <span class='hs-varid'>mVExp</span> <span class='hs-keyglyph'><-</span> <span class='hs-conid'>DT</span><span class='hs-varop'>.</span><span class='hs-varid'>mapM</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>e</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>withInitFunTransST</span> <span class='hs-layout'>(</span><span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>e</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-varid'>mExp</span>
<a name="line-270"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>SigDec</span> <span class='hs-varid'>vId</span> <span class='hs-varid'>tm</span> <span class='hs-varid'>mVExp</span>
<a name="line-271"></a>
<a name="line-272"></a>
<a name="line-273"></a>
<a name="line-274"></a><span class='hs-comment'>-------------------------</span>
<a name="line-275"></a><span class='hs-comment'>-- Identifier translation</span>
<a name="line-276"></a><span class='hs-comment'>-------------------------</span>
<a name="line-277"></a>
<a name="line-278"></a>
<a name="line-279"></a><a name="transVHDLId2IfaceSigDec"></a><span class='hs-comment'>-- | Translate a VHDL identifier and a type to an interface signal declaration</span>
<a name="line-280"></a><span class='hs-definition'>transVHDLId2IfaceSigDec</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Mode</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLId</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypeRep</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>IfaceSigDec</span>
<a name="line-281"></a><span class='hs-definition'>transVHDLId2IfaceSigDec</span> <span class='hs-varid'>m</span> <span class='hs-varid'>vid</span> <span class='hs-varid'>trep</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-282"></a> <span class='hs-varid'>tm</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>trep</span>
<a name="line-283"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>IfaceSigDec</span> <span class='hs-varid'>vid</span> <span class='hs-varid'>m</span> <span class='hs-varid'>tm</span>
<a name="line-284"></a>
<a name="line-285"></a>
<a name="line-286"></a><a name="transPort2IfaceSigDec"></a><span class='hs-comment'>-- | Translate a Port to a VHDL Interface signal declaration</span>
<a name="line-287"></a><span class='hs-definition'>transPort2IfaceSigDec</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Mode</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>PortId</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypeRep</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>IfaceSigDec</span>
<a name="line-288"></a><span class='hs-definition'>transPort2IfaceSigDec</span> <span class='hs-varid'>m</span> <span class='hs-varid'>pid</span> <span class='hs-varid'>trep</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-289"></a> <span class='hs-varid'>sid</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transPortId2VHDL</span> <span class='hs-varid'>pid</span>
<a name="line-290"></a> <span class='hs-varid'>transVHDLId2IfaceSigDec</span> <span class='hs-varid'>m</span> <span class='hs-varid'>sid</span> <span class='hs-varid'>trep</span>
<a name="line-291"></a>
<a name="line-292"></a><a name="transTHName2VHDL"></a><span class='hs-comment'>-- | Translate a local TH name to a VHDL Identifier</span>
<a name="line-293"></a><span class='hs-definition'>transTHName2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Name</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>VHDLId</span>
<a name="line-294"></a><span class='hs-comment'>-- we use pprint becase it shows unique names for local names</span>
<a name="line-295"></a><span class='hs-comment'>-- e.g. let x = 1 in let x =2 in x is printed as</span>
<a name="line-296"></a><span class='hs-comment'>-- let x_0 = 1 in let x_1 = 2 in x_1</span>
<a name="line-297"></a><span class='hs-comment'>-- we want unique names because it saves us from dealing wiht</span>
<a name="line-298"></a><span class='hs-comment'>-- name scopes and having a global name table.</span>
<a name="line-299"></a><span class='hs-definition'>transTHName2VHDL</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>transPortId2VHDL</span> <span class='hs-varop'>.</span> <span class='hs-varid'>tyconUQname</span> <span class='hs-varop'>.</span> <span class='hs-varid'>pprint</span>
<a name="line-300"></a>
<a name="line-301"></a><a name="transSysId2VHDL"></a><span class='hs-comment'>-- | Translate a system identifier to a VHDL identifier</span>
<a name="line-302"></a><span class='hs-definition'>transSysId2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>SysId</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>VHDLId</span>
<a name="line-303"></a><span class='hs-definition'>transSysId2VHDL</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>transPortId2VHDL</span>
<a name="line-304"></a>
<a name="line-305"></a><a name="transProcId2VHDL"></a><span class='hs-comment'>-- | Translate a process identifier to a VHDL identifier</span>
<a name="line-306"></a><span class='hs-definition'>transProcId2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>ProcId</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>VHDLId</span>
<a name="line-307"></a><span class='hs-definition'>transProcId2VHDL</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>transPortId2VHDL</span>
<a name="line-308"></a>
<a name="line-309"></a><a name="transPortId2VHDL"></a><span class='hs-comment'>-- | translate a port identifier to a VHDL Identifier</span>
<a name="line-310"></a><span class='hs-definition'>transPortId2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>PortId</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>VHDLId</span>
<a name="line-311"></a><span class='hs-definition'>transPortId2VHDL</span> <span class='hs-varid'>str</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>liftEProne</span> <span class='hs-varop'>$</span> <span class='hs-varid'>mkVHDLExtId</span> <span class='hs-varid'>str</span>
<a name="line-312"></a>
<a name="line-313"></a>
<a name="line-314"></a><span class='hs-comment'>-------------------</span>
<a name="line-315"></a><span class='hs-comment'>-- Type translation </span>
<a name="line-316"></a><span class='hs-comment'>-------------------</span>
<a name="line-317"></a>
<a name="line-318"></a><a name="transTR2TM"></a><span class='hs-comment'>-- | translate a 'TypeRep' to a VHDL 'TypeMark'</span>
<a name="line-319"></a><span class='hs-comment'>-- We don't distinguish between a type and its version nested in 'Signal'</span>
<a name="line-320"></a><span class='hs-comment'>-- since it makes no difference in VHDL</span>
<a name="line-321"></a><span class='hs-definition'>transTR2TM</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TypeRep</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>TypeMark</span>
<a name="line-322"></a><span class='hs-definition'>transTR2TM</span> <span class='hs-varid'>rep</span>
<a name="line-323"></a> <span class='hs-comment'>-- Is it a Signal?</span>
<a name="line-324"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isSignal</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>nestedTR</span>
<a name="line-325"></a> <span class='hs-comment'>-- Is it a primitive type?</span>
<a name="line-326"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isJust</span> <span class='hs-varid'>mPrimitiveTM</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-varid'>fromJust</span> <span class='hs-varid'>mPrimitiveTM</span>
<a name="line-327"></a> <span class='hs-comment'>-- Non-Primitive type, try to translate it</span>
<a name="line-328"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>otherwise</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>customTR2TM</span> <span class='hs-varid'>rep</span>
<a name="line-329"></a> <span class='hs-keyword'>where</span> <span class='hs-layout'>(</span><span class='hs-varid'>isSignal</span><span class='hs-layout'>,</span> <span class='hs-varid'>nestedTR</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>let</span> <span class='hs-layout'>(</span><span class='hs-varid'>tc</span><span class='hs-layout'>,</span><span class='hs-keyglyph'>~</span><span class='hs-keyglyph'>[</span><span class='hs-varid'>tr</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>splitTyConApp</span> <span class='hs-varid'>rep</span>
<a name="line-330"></a> <span class='hs-keyword'>in</span> <span class='hs-layout'>(</span><span class='hs-varid'>tc</span> <span class='hs-varop'>==</span> <span class='hs-varid'>signalTyCon</span><span class='hs-layout'>,</span> <span class='hs-varid'>tr</span><span class='hs-layout'>)</span>
<a name="line-331"></a> <span class='hs-varid'>signalTyCon</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>typeRepTyCon</span><span class='hs-varop'>.</span><span class='hs-varid'>typeOf</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Signal</span> <span class='hs-conid'>()</span><span class='hs-layout'>)</span>
<a name="line-332"></a> <span class='hs-varid'>mPrimitiveTM</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>lookup</span> <span class='hs-varid'>rep</span> <span class='hs-varid'>primTypeTable</span>
<a name="line-333"></a>
<a name="line-334"></a>
<a name="line-335"></a><a name="customTR2TM"></a><span class='hs-comment'>-- | Translate a custom 'TypeRep' to a VHDL 'TypeMark'</span>
<a name="line-336"></a><span class='hs-definition'>customTR2TM</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TypeRep</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>TypeMark</span>
<a name="line-337"></a><span class='hs-definition'>customTR2TM</span> <span class='hs-varid'>rep</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-338"></a> <span class='hs-comment'>-- Check if it was previously translated</span>
<a name="line-339"></a> <span class='hs-varid'>mTranslated</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>lookupCustomType</span> <span class='hs-varid'>rep</span>
<a name="line-340"></a> <span class='hs-keyword'>case</span> <span class='hs-varid'>mTranslated</span> <span class='hs-keyword'>of</span>
<a name="line-341"></a> <span class='hs-comment'>-- Not translated previously</span>
<a name="line-342"></a> <span class='hs-conid'>Nothing</span> <span class='hs-keyglyph'>-></span> <span class='hs-keyword'>do</span>
<a name="line-343"></a> <span class='hs-comment'>-- translate it</span>
<a name="line-344"></a> <span class='hs-varid'>e</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>doCustomTR2TM</span> <span class='hs-varid'>rep</span>
<a name="line-345"></a> <span class='hs-comment'>-- update the translation table and the accumulated type declarations</span>
<a name="line-346"></a> <span class='hs-varid'>addCustomType</span> <span class='hs-varid'>rep</span> <span class='hs-varid'>e</span>
<a name="line-347"></a> <span class='hs-comment'>-- return the translation</span>
<a name="line-348"></a> <span class='hs-keyword'>case</span> <span class='hs-varid'>e</span> <span class='hs-keyword'>of</span>
<a name="line-349"></a> <span class='hs-conid'>Left</span> <span class='hs-layout'>(</span><span class='hs-conid'>TypeDec</span> <span class='hs-varid'>id</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>return</span> <span class='hs-varid'>id</span>
<a name="line-350"></a> <span class='hs-conid'>Right</span> <span class='hs-layout'>(</span><span class='hs-conid'>SubtypeDec</span> <span class='hs-varid'>id</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>return</span> <span class='hs-varid'>id</span>
<a name="line-351"></a> <span class='hs-comment'>-- Translated previously</span>
<a name="line-352"></a> <span class='hs-conid'>Just</span> <span class='hs-varid'>tm</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>return</span> <span class='hs-varid'>tm</span>
<a name="line-353"></a>
<a name="line-354"></a><a name="doCustomTR2TM"></a><span class='hs-comment'>-- | Really do the translation (customTR2TM deals with caching)</span>
<a name="line-355"></a><span class='hs-definition'>doCustomTR2TM</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TypeRep</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>Either</span> <span class='hs-conid'>TypeDec</span> <span class='hs-conid'>SubtypeDec</span><span class='hs-layout'>)</span>
<a name="line-356"></a>
<a name="line-357"></a><span class='hs-comment'>-- | FSVec?</span>
<a name="line-358"></a><span class='hs-comment'>-- FSVecs are translated to subtypes of unconstrained vectors.</span>
<a name="line-359"></a><span class='hs-comment'>-- All FSVec operations are translated as operations for the</span>
<a name="line-360"></a><span class='hs-comment'>-- unconstrained type.</span>
<a name="line-361"></a><span class='hs-definition'>doCustomTR2TM</span> <span class='hs-varid'>rep</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isFSVec</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-362"></a> <span class='hs-comment'>-- Translate the type of the elements contained in the vector</span>
<a name="line-363"></a> <span class='hs-varid'>valTM</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>valueType</span>
<a name="line-364"></a> <span class='hs-comment'>-- Build the unconstrained vector identifier</span>
<a name="line-365"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>vectorId</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeVHDLBasicId</span> <span class='hs-layout'>(</span><span class='hs-str'>"fsvec_"</span><span class='hs-varop'>++</span> <span class='hs-varid'>fromVHDLId</span> <span class='hs-varid'>valTM</span><span class='hs-layout'>)</span>
<a name="line-366"></a> <span class='hs-comment'>-- Obtain the unconstrained vector together with its functions and add them</span>
<a name="line-367"></a> <span class='hs-comment'>-- to the global traversing-results (if this wasn't previously done):</span>
<a name="line-368"></a> <span class='hs-comment'>-- * Check if the unconstrained array was previously translated</span>
<a name="line-369"></a> <span class='hs-varid'>vecs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>gets</span> <span class='hs-layout'>(</span><span class='hs-varid'>transUnconsFSVecs</span><span class='hs-varop'>.</span><span class='hs-varid'>global</span><span class='hs-layout'>)</span>
<a name="line-370"></a> <span class='hs-comment'>-- * if it wasn't ...</span>
<a name="line-371"></a> <span class='hs-varid'>when</span> <span class='hs-layout'>(</span><span class='hs-varid'>not</span> <span class='hs-varop'>$</span> <span class='hs-varid'>elem</span> <span class='hs-varid'>valueType</span> <span class='hs-varid'>vecs</span><span class='hs-layout'>)</span> <span class='hs-varop'>$</span> <span class='hs-keyword'>do</span>
<a name="line-372"></a> <span class='hs-comment'>-- create the unconstrained vector type and add it to the global</span>
<a name="line-373"></a> <span class='hs-comment'>-- results. _Only_ if we are not working with "FSVec _ Bit" becuase</span>
<a name="line-374"></a> <span class='hs-comment'>-- "type fsvec_std_logic" is already included in forsyde.vhd.</span>
<a name="line-375"></a> <span class='hs-varid'>when</span> <span class='hs-layout'>(</span><span class='hs-varid'>valueType</span> <span class='hs-varop'>/=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Bit</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-376"></a> <span class='hs-layout'>(</span><span class='hs-varid'>addTypeDec</span> <span class='hs-varop'>$</span> <span class='hs-conid'>TypeDec</span> <span class='hs-varid'>vectorId</span> <span class='hs-layout'>(</span><span class='hs-conid'>TDA</span> <span class='hs-layout'>(</span><span class='hs-conid'>UnconsArrayDef</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>fsvec_indexTM</span><span class='hs-keyglyph'>]</span> <span class='hs-varid'>valTM</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-377"></a> <span class='hs-comment'>-- Add the default functions for the unconstrained</span>
<a name="line-378"></a> <span class='hs-comment'>-- vector type to the global results</span>
<a name="line-379"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>funs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genUnconsVectorFuns</span> <span class='hs-varid'>valTM</span> <span class='hs-varid'>vectorId</span>
<a name="line-380"></a> <span class='hs-varid'>mapM_</span> <span class='hs-varid'>addSubProgBody</span> <span class='hs-varid'>funs</span>
<a name="line-381"></a> <span class='hs-comment'>-- Mark the unconstrained array as translated</span>
<a name="line-382"></a> <span class='hs-varid'>addUnconsFSVec</span> <span class='hs-varid'>valueType</span>
<a name="line-383"></a>
<a name="line-384"></a> <span class='hs-comment'>-- Create the vector subtype identifier</span>
<a name="line-385"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>subvectorId</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeVHDLBasicId</span> <span class='hs-layout'>(</span><span class='hs-str'>"fsvec_"</span> <span class='hs-varop'>++</span> <span class='hs-varid'>show</span> <span class='hs-varid'>size</span> <span class='hs-varop'>++</span> <span class='hs-str'>"_"</span> <span class='hs-varop'>++</span>
<a name="line-386"></a> <span class='hs-varid'>fromVHDLId</span> <span class='hs-varid'>valTM</span><span class='hs-layout'>)</span>
<a name="line-387"></a> <span class='hs-comment'>-- Create the vector subtype declaration</span>
<a name="line-388"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>Right</span> <span class='hs-varop'>$</span>
<a name="line-389"></a> <span class='hs-conid'>SubtypeDec</span> <span class='hs-varid'>subvectorId</span> <span class='hs-layout'>(</span><span class='hs-conid'>SubtypeIn</span> <span class='hs-varid'>vectorId</span>
<a name="line-390"></a> <span class='hs-layout'>(</span><span class='hs-conid'>Just</span> <span class='hs-varop'>$</span> <span class='hs-conid'>IndexConstraint</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>ToRange</span> <span class='hs-layout'>(</span><span class='hs-conid'>PrimLit</span> <span class='hs-str'>"0"</span><span class='hs-layout'>)</span>
<a name="line-391"></a> <span class='hs-layout'>(</span><span class='hs-conid'>PrimLit</span> <span class='hs-layout'>(</span><span class='hs-varid'>show</span> <span class='hs-varop'>$</span> <span class='hs-varid'>size</span><span class='hs-comment'>-</span><span class='hs-num'>1</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-392"></a> <span class='hs-keyword'>where</span> <span class='hs-layout'>(</span><span class='hs-varid'>cons</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>~</span><span class='hs-keyglyph'>[</span><span class='hs-varid'>sizeType</span><span class='hs-layout'>,</span><span class='hs-varid'>valueType</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>splitTyConApp</span> <span class='hs-varid'>rep</span>
<a name="line-393"></a> <span class='hs-varid'>isFSVec</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>cons</span> <span class='hs-varop'>==</span> <span class='hs-varid'>fSVecTyCon</span>
<a name="line-394"></a> <span class='hs-varid'>size</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>transTLNat2Int</span> <span class='hs-varid'>sizeType</span>
<a name="line-395"></a>
<a name="line-396"></a>
<a name="line-397"></a><span class='hs-comment'>-- | Tuple?</span>
<a name="line-398"></a><span class='hs-definition'>doCustomTR2TM</span> <span class='hs-varid'>rep</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isTuple</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-399"></a> <span class='hs-comment'>-- Create the elements of the record</span>
<a name="line-400"></a> <span class='hs-varid'>fieldTMs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>args</span>
<a name="line-401"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>elems</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>zipWith</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>fieldId</span> <span class='hs-varid'>fieldTM</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>ElementDec</span> <span class='hs-varid'>fieldId</span> <span class='hs-varid'>fieldTM</span> <span class='hs-layout'>)</span>
<a name="line-402"></a> <span class='hs-keyglyph'>[</span><span class='hs-varid'>tupVHDLIdSuffix</span> <span class='hs-varid'>n</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>n</span> <span class='hs-keyglyph'><-</span> <span class='hs-keyglyph'>[</span><span class='hs-num'>1</span><span class='hs-keyglyph'>..</span><span class='hs-keyglyph'>]</span><span class='hs-keyglyph'>]</span> <span class='hs-varid'>fieldTMs</span>
<a name="line-403"></a> <span class='hs-comment'>-- Create the Type Declaration identifier</span>
<a name="line-404"></a> <span class='hs-varid'>recordId</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeVHDLBasicId</span> <span class='hs-varop'>$</span>
<a name="line-405"></a> <span class='hs-layout'>(</span><span class='hs-varid'>tupStrSuffix</span> <span class='hs-varop'>$</span> <span class='hs-varid'>length</span> <span class='hs-varid'>fieldTMs</span><span class='hs-layout'>)</span> <span class='hs-varop'>++</span> <span class='hs-str'>"_"</span> <span class='hs-varop'>++</span>
<a name="line-406"></a> <span class='hs-layout'>(</span><span class='hs-varid'>concatMap</span> <span class='hs-varid'>fromVHDLId</span><span class='hs-varop'>.</span><span class='hs-varid'>intersperse</span> <span class='hs-layout'>(</span><span class='hs-varid'>unsafeVHDLBasicId</span> <span class='hs-str'>"_"</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-varid'>fieldTMs</span>
<a name="line-407"></a> <span class='hs-comment'>-- Add the default functions for the tuple type to the global results</span>
<a name="line-408"></a> <span class='hs-varid'>funs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genTupleFuns</span> <span class='hs-varid'>fieldTMs</span> <span class='hs-varid'>recordId</span>
<a name="line-409"></a> <span class='hs-varid'>mapM_</span> <span class='hs-varid'>addSubProgBody</span> <span class='hs-varid'>funs</span>
<a name="line-410"></a> <span class='hs-comment'>-- Create the record</span>
<a name="line-411"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>Left</span> <span class='hs-varop'>$</span> <span class='hs-layout'>(</span><span class='hs-conid'>TypeDec</span> <span class='hs-varid'>recordId</span> <span class='hs-layout'>(</span><span class='hs-conid'>TDR</span> <span class='hs-varop'>$</span> <span class='hs-conid'>RecordTypeDef</span> <span class='hs-varid'>elems</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-412"></a> <span class='hs-keyword'>where</span> <span class='hs-layout'>(</span><span class='hs-varid'>cons</span><span class='hs-layout'>,</span> <span class='hs-varid'>args</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>splitTyConApp</span> <span class='hs-varid'>rep</span>
<a name="line-413"></a> <span class='hs-varid'>conStr</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>tyConString</span> <span class='hs-varid'>cons</span>
<a name="line-414"></a> <span class='hs-varid'>isTuple</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>length</span> <span class='hs-varid'>conStr</span> <span class='hs-varop'>></span> <span class='hs-num'>2</span><span class='hs-layout'>)</span> <span class='hs-varop'>&&</span> <span class='hs-layout'>(</span><span class='hs-varid'>all</span> <span class='hs-layout'>(</span><span class='hs-varop'>==</span><span class='hs-chr'>','</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>reverse</span><span class='hs-varop'>.</span><span class='hs-varid'>tail</span><span class='hs-varop'>.</span><span class='hs-varid'>reverse</span><span class='hs-varop'>.</span><span class='hs-varid'>tail</span> <span class='hs-varop'>$</span> <span class='hs-varid'>conStr</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-415"></a>
<a name="line-416"></a>
<a name="line-417"></a><span class='hs-comment'>-- | AbstExt?</span>
<a name="line-418"></a><span class='hs-definition'>doCustomTR2TM</span> <span class='hs-varid'>rep</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isAbsExt</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-419"></a> <span class='hs-comment'>-- Create the elements of the record</span>
<a name="line-420"></a> <span class='hs-varid'>valueTM</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>valueTR</span>
<a name="line-421"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>elems</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>ElementDec</span> <span class='hs-varid'>isPresentId</span> <span class='hs-varid'>booleanTM</span><span class='hs-layout'>,</span>
<a name="line-422"></a> <span class='hs-conid'>ElementDec</span> <span class='hs-varid'>valueId</span> <span class='hs-varid'>valueTM</span> <span class='hs-keyglyph'>]</span>
<a name="line-423"></a>
<a name="line-424"></a> <span class='hs-comment'>-- Create the Type Declaration identifier</span>
<a name="line-425"></a> <span class='hs-varid'>recordId</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unsafeVHDLBasicId</span> <span class='hs-varop'>$</span>
<a name="line-426"></a> <span class='hs-str'>"abs_ext_"</span> <span class='hs-varop'>++</span> <span class='hs-varid'>fromVHDLId</span> <span class='hs-varid'>valueTM</span>
<a name="line-427"></a> <span class='hs-comment'>-- Add the default functions for the vector type to the global results</span>
<a name="line-428"></a> <span class='hs-varid'>funs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genAbstExtFuns</span> <span class='hs-varid'>valueTM</span> <span class='hs-varid'>recordId</span>
<a name="line-429"></a> <span class='hs-varid'>mapM_</span> <span class='hs-varid'>addSubProgBody</span> <span class='hs-varid'>funs</span>
<a name="line-430"></a> <span class='hs-comment'>-- Return the resulting the record</span>
<a name="line-431"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>Left</span> <span class='hs-varop'>$</span> <span class='hs-layout'>(</span><span class='hs-conid'>TypeDec</span> <span class='hs-varid'>recordId</span> <span class='hs-layout'>(</span><span class='hs-conid'>TDR</span> <span class='hs-varop'>$</span> <span class='hs-conid'>RecordTypeDef</span> <span class='hs-varid'>elems</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-432"></a> <span class='hs-keyword'>where</span> <span class='hs-layout'>(</span><span class='hs-varid'>cons</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>~</span><span class='hs-keyglyph'>[</span><span class='hs-varid'>valueTR</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>splitTyConApp</span> <span class='hs-varid'>rep</span>
<a name="line-433"></a> <span class='hs-varid'>absExtTyCon</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>typeRepTyCon</span><span class='hs-varop'>.</span><span class='hs-varid'>typeOf</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>AbstExt</span> <span class='hs-conid'>()</span><span class='hs-layout'>)</span>
<a name="line-434"></a> <span class='hs-varid'>isAbsExt</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>cons</span> <span class='hs-varop'>==</span> <span class='hs-varid'>absExtTyCon</span>
<a name="line-435"></a>
<a name="line-436"></a><span class='hs-comment'>-- | Finally, it is an Enumerated algebraic type </span>
<a name="line-437"></a><span class='hs-comment'>-- or an unkown custom type (in that case we throw an error)</span>
<a name="line-438"></a><span class='hs-comment'>--</span>
<a name="line-439"></a><span class='hs-comment'>-- NOTE: It would be cleaner to have a different clauses for each case but</span>
<a name="line-440"></a><span class='hs-comment'>-- since we need to access the state to check if it's an enumerated </span>
<a name="line-441"></a><span class='hs-comment'>-- algebraic type, we cannot do it.</span>
<a name="line-442"></a><span class='hs-definition'>doCustomTR2TM</span> <span class='hs-varid'>rep</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-443"></a> <span class='hs-comment'>-- Get the accumulated Enumerated Algebraic Types</span>
<a name="line-444"></a> <span class='hs-varid'>eTys</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>gets</span> <span class='hs-layout'>(</span><span class='hs-varid'>enumTypes</span><span class='hs-varop'>.</span><span class='hs-varid'>global</span><span class='hs-layout'>)</span>
<a name="line-445"></a> <span class='hs-comment'>-- Check if current Type representation can be found in eTys</span>
<a name="line-446"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>equalsRep</span> <span class='hs-layout'>(</span><span class='hs-conid'>EnumAlgTy</span> <span class='hs-varid'>name</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>name</span> <span class='hs-varop'>==</span> <span class='hs-layout'>(</span><span class='hs-varid'>tyConString</span><span class='hs-varop'>.</span><span class='hs-varid'>typeRepTyCon</span><span class='hs-layout'>)</span> <span class='hs-varid'>rep</span>
<a name="line-447"></a> <span class='hs-keyword'>case</span> <span class='hs-layout'>(</span><span class='hs-conid'>S</span><span class='hs-varop'>.</span><span class='hs-varid'>toList</span><span class='hs-varop'>.</span><span class='hs-layout'>(</span><span class='hs-conid'>S</span><span class='hs-varop'>.</span><span class='hs-varid'>filter</span> <span class='hs-varid'>equalsRep</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-varid'>eTys</span> <span class='hs-keyword'>of</span>
<a name="line-448"></a> <span class='hs-comment'>-- Found!</span>
<a name="line-449"></a> <span class='hs-keyglyph'>[</span><span class='hs-varid'>enumDef</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>liftM</span> <span class='hs-conid'>Left</span> <span class='hs-varop'>$</span> <span class='hs-varid'>enumAlg2TypeDec</span> <span class='hs-varid'>enumDef</span>
<a name="line-450"></a> <span class='hs-comment'>-- Not found, unkown custom type</span>
<a name="line-451"></a> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>throwFError</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UnsupportedType</span> <span class='hs-varid'>rep</span>
<a name="line-452"></a>
<a name="line-453"></a><a name="enumAlg2TypeDec"></a><span class='hs-comment'>-- | Transform an enumerated Algebraic type to a VHDL</span>
<a name="line-454"></a><span class='hs-comment'>-- TypeMark adding its default function to the global results</span>
<a name="line-455"></a><span class='hs-definition'>enumAlg2TypeDec</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>EnumAlgTy</span> <span class='hs-comment'>-- ^ Enumerated type definition</span>
<a name="line-456"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>TypeDec</span>
<a name="line-457"></a><span class='hs-definition'>enumAlg2TypeDec</span> <span class='hs-layout'>(</span><span class='hs-conid'>EnumAlgTy</span> <span class='hs-varid'>tn</span> <span class='hs-varid'>cons</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-458"></a> <span class='hs-comment'>-- Get the TypeMark</span>
<a name="line-459"></a> <span class='hs-varid'>tMark</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>liftEProne</span> <span class='hs-varop'>$</span> <span class='hs-varid'>mkVHDLExtId</span> <span class='hs-varid'>tn</span>
<a name="line-460"></a> <span class='hs-comment'>-- Get the enumeration literals</span>
<a name="line-461"></a> <span class='hs-varid'>enumLits</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-varid'>firstLit</span><span class='hs-conop'>:</span><span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>liftEProne</span> <span class='hs-varop'>$</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>mkVHDLExtId</span> <span class='hs-varid'>cons</span>
<a name="line-462"></a> <span class='hs-comment'>-- Add the default functions for the enumeration type</span>
<a name="line-463"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>funs</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>genEnumAlgFuns</span> <span class='hs-varid'>tMark</span> <span class='hs-varid'>firstLit</span>
<a name="line-464"></a> <span class='hs-varid'>mapM_</span> <span class='hs-varid'>addSubProgBody</span> <span class='hs-varid'>funs</span>
<a name="line-465"></a> <span class='hs-comment'>-- Create the enumeration type</span>
<a name="line-466"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>TypeDec</span> <span class='hs-varid'>tMark</span> <span class='hs-layout'>(</span><span class='hs-conid'>TDE</span> <span class='hs-varop'>$</span> <span class='hs-conid'>EnumTypeDef</span> <span class='hs-varid'>enumLits</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-467"></a>
<a name="line-468"></a><a name="primTypeTable"></a><span class='hs-comment'>-- | Translation table for primitive types</span>
<a name="line-469"></a><span class='hs-definition'>primTypeTable</span> <span class='hs-keyglyph'>::</span> <span class='hs-keyglyph'>[</span><span class='hs-layout'>(</span><span class='hs-conid'>TypeRep</span><span class='hs-layout'>,</span> <span class='hs-conid'>TypeMark</span><span class='hs-layout'>)</span><span class='hs-keyglyph'>]</span>
<a name="line-470"></a><span class='hs-definition'>primTypeTable</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyglyph'>[</span><span class='hs-comment'>-- Commented out due to representation overflow</span>
<a name="line-471"></a> <span class='hs-comment'>-- (typeOf (undefined :: Int64), int64TM) ,</span>
<a name="line-472"></a> <span class='hs-layout'>(</span><span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Int32</span><span class='hs-layout'>)</span><span class='hs-layout'>,</span> <span class='hs-varid'>int32TM</span><span class='hs-layout'>)</span> <span class='hs-layout'>,</span>
<a name="line-473"></a> <span class='hs-layout'>(</span><span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Int16</span><span class='hs-layout'>)</span><span class='hs-layout'>,</span> <span class='hs-varid'>int16TM</span><span class='hs-layout'>)</span> <span class='hs-layout'>,</span>
<a name="line-474"></a> <span class='hs-layout'>(</span><span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Int8</span><span class='hs-layout'>)</span> <span class='hs-layout'>,</span> <span class='hs-varid'>int8TM</span><span class='hs-layout'>)</span> <span class='hs-layout'>,</span>
<a name="line-475"></a> <span class='hs-layout'>(</span><span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Bool</span><span class='hs-layout'>)</span> <span class='hs-layout'>,</span> <span class='hs-varid'>booleanTM</span><span class='hs-layout'>)</span> <span class='hs-layout'>,</span>
<a name="line-476"></a> <span class='hs-layout'>(</span><span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Bit</span><span class='hs-layout'>)</span> <span class='hs-layout'>,</span> <span class='hs-varid'>std_logicTM</span><span class='hs-layout'>)</span><span class='hs-keyglyph'>]</span>
<a name="line-477"></a>
<a name="line-478"></a><span class='hs-comment'>---------------------------------------</span>
<a name="line-479"></a><span class='hs-comment'>-- Translating functions and expresions</span>
<a name="line-480"></a><span class='hs-comment'>---------------------------------------</span>
<a name="line-481"></a>
<a name="line-482"></a><span class='hs-comment'>------------------------</span>
<a name="line-483"></a><span class='hs-comment'>-- Translating functions</span>
<a name="line-484"></a><span class='hs-comment'>------------------------</span>
<a name="line-485"></a>
<a name="line-486"></a>
<a name="line-487"></a><a name="funErr"></a><span class='hs-comment'>-- | Throw a function error</span>
<a name="line-488"></a><span class='hs-definition'>funErr</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>VHDLFunErr</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-varid'>a</span>
<a name="line-489"></a><span class='hs-definition'>funErr</span> <span class='hs-varid'>err</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>throwFError</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UntranslatableVHDLFun</span> <span class='hs-varid'>err</span>
<a name="line-490"></a>
<a name="line-491"></a><a name="transProcFun2VHDL"></a><span class='hs-comment'>-- | Translate a typed function AST to VHDL</span>
<a name="line-492"></a><span class='hs-definition'>transProcFun2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TypedProcFunAST</span> <span class='hs-comment'>-- ^ input ast</span>
<a name="line-493"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>SubProgBody</span><span class='hs-layout'>,</span> <span class='hs-conid'>VHDLId</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>VHDLId</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>TypeMark</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-conid'>TypeMark</span><span class='hs-layout'>)</span>
<a name="line-494"></a> <span class='hs-comment'>-- ^ Function, Function name, name of inputs, type of inputs, return type </span>
<a name="line-495"></a><span class='hs-definition'>transProcFun2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>TypedProcFunAST</span> <span class='hs-varid'>fType</span> <span class='hs-varid'>fEnums</span> <span class='hs-varid'>fAST</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-496"></a> <span class='hs-comment'>-- Add the enumerated types associated with the function to the global results</span>
<a name="line-497"></a> <span class='hs-varid'>addEnumTypes</span> <span class='hs-varid'>fEnums</span>
<a name="line-498"></a> <span class='hs-comment'>-- Check if the procFunAST fullfils the restrictions of the VHDL Backend</span>
<a name="line-499"></a> <span class='hs-comment'>-- FIXME: translate the default arguments</span>
<a name="line-500"></a> <span class='hs-layout'>(</span><span class='hs-varid'>fName</span><span class='hs-layout'>,</span> <span class='hs-varid'>fInputPats</span><span class='hs-layout'>,</span> <span class='hs-varid'>fBodyExp</span><span class='hs-layout'>,</span> <span class='hs-varid'>whereDecs</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>checkProcFunAST</span> <span class='hs-varid'>fAST</span>
<a name="line-501"></a> <span class='hs-comment'>-- Get the function spec and initialize the translation namespace</span>
<a name="line-502"></a> <span class='hs-layout'>(</span><span class='hs-varid'>fSpec</span><span class='hs-layout'>,</span> <span class='hs-varid'>fVHDLName</span><span class='hs-layout'>,</span> <span class='hs-varid'>fVHDLPars</span><span class='hs-layout'>,</span> <span class='hs-varid'>argsTM</span><span class='hs-layout'>,</span> <span class='hs-varid'>retTM</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'><-</span>
<a name="line-503"></a> <span class='hs-varid'>transProcFunSpec</span> <span class='hs-varid'>fName</span> <span class='hs-varid'>fType</span> <span class='hs-varid'>fInputPats</span>
<a name="line-504"></a> <span class='hs-comment'>-- Translate the where declarations and them to the</span>
<a name="line-505"></a> <span class='hs-comment'>-- auxiliary declarations of the function</span>
<a name="line-506"></a> <span class='hs-varid'>transDecs</span> <span class='hs-varid'>whereDecs</span>
<a name="line-507"></a> <span class='hs-comment'>-- Translate the function's body</span>
<a name="line-508"></a> <span class='hs-varid'>bodySm</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transFunBodyExp2VHDL</span> <span class='hs-varid'>fBodyExp</span>
<a name="line-509"></a> <span class='hs-varid'>decs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>gets</span> <span class='hs-layout'>(</span><span class='hs-varid'>auxDecs</span><span class='hs-varop'>.</span><span class='hs-varid'>funTransST</span><span class='hs-varop'>.</span><span class='hs-varid'>local</span><span class='hs-layout'>)</span>
<a name="line-510"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>fBody</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>SubProgBody</span> <span class='hs-varid'>fSpec</span> <span class='hs-varid'>decs</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>bodySm</span><span class='hs-keyglyph'>]</span>
<a name="line-511"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-varid'>fBody</span><span class='hs-layout'>,</span> <span class='hs-varid'>fVHDLName</span><span class='hs-layout'>,</span> <span class='hs-varid'>fVHDLPars</span><span class='hs-layout'>,</span> <span class='hs-varid'>argsTM</span><span class='hs-layout'>,</span> <span class='hs-varid'>retTM</span><span class='hs-layout'>)</span>
<a name="line-512"></a>
<a name="line-513"></a><a name="transProcFun2VHDLBody"></a><span class='hs-comment'>-- | Translate a typed function AST to VHDL (only returning the functions body</span>
<a name="line-514"></a><span class='hs-definition'>transProcFun2VHDLBody</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TypedProcFunAST</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>SubProgBody</span>
<a name="line-515"></a><span class='hs-definition'>transProcFun2VHDLBody</span> <span class='hs-varid'>tpf</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-516"></a> <span class='hs-layout'>(</span><span class='hs-varid'>body</span><span class='hs-layout'>,</span> <span class='hs-keyword'>_</span><span class='hs-layout'>,</span> <span class='hs-keyword'>_</span><span class='hs-layout'>,</span> <span class='hs-keyword'>_</span><span class='hs-layout'>,</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transProcFun2VHDL</span> <span class='hs-varid'>tpf</span>
<a name="line-517"></a> <span class='hs-varid'>return</span> <span class='hs-varid'>body</span>
<a name="line-518"></a>
<a name="line-519"></a><a name="decs2ProcFuns"></a><span class='hs-comment'>-- | Translate a list of declarations to a list of process function </span>
<a name="line-520"></a><span class='hs-comment'>-- ASTs</span>
<a name="line-521"></a><span class='hs-definition'>decs2ProcFuns</span> <span class='hs-keyglyph'>::</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Dec</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>TypedProcFunAST</span><span class='hs-keyglyph'>]</span>
<a name="line-522"></a><span class='hs-definition'>decs2ProcFuns</span> <span class='hs-conid'>[]</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>return</span> <span class='hs-conid'>[]</span>
<a name="line-523"></a><span class='hs-definition'>decs2ProcFuns</span> <span class='hs-varid'>decs</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-524"></a> <span class='hs-layout'>(</span><span class='hs-varid'>dec</span><span class='hs-layout'>,</span> <span class='hs-varid'>t</span><span class='hs-layout'>,</span> <span class='hs-varid'>name</span><span class='hs-layout'>,</span> <span class='hs-varid'>clauses</span><span class='hs-layout'>,</span> <span class='hs-varid'>restDecs</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'><-</span> <span class='hs-keyword'>case</span> <span class='hs-varid'>decs</span> <span class='hs-keyword'>of</span>
<a name="line-525"></a> <span class='hs-comment'>-- A type signature followed by its function declaration</span>
<a name="line-526"></a> <span class='hs-conid'>SigD</span> <span class='hs-varid'>n1</span> <span class='hs-varid'>t</span> <span class='hs-conop'>:</span> <span class='hs-varid'>f</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>FunD</span> <span class='hs-varid'>n2</span> <span class='hs-varid'>cls</span><span class='hs-layout'>)</span> <span class='hs-conop'>:</span> <span class='hs-varid'>xs</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>n1</span> <span class='hs-varop'>==</span> <span class='hs-varid'>n2</span> <span class='hs-keyglyph'>-></span>
<a name="line-527"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-varid'>f</span><span class='hs-layout'>,</span> <span class='hs-varid'>t</span><span class='hs-layout'>,</span> <span class='hs-varid'>n1</span><span class='hs-layout'>,</span> <span class='hs-varid'>cls</span><span class='hs-layout'>,</span> <span class='hs-varid'>xs</span><span class='hs-layout'>)</span>
<a name="line-528"></a> <span class='hs-comment'>-- A type signature followed by its value declaration</span>
<a name="line-529"></a> <span class='hs-comment'>-- which will be translated to a function</span>
<a name="line-530"></a> <span class='hs-conid'>SigD</span> <span class='hs-varid'>n1</span> <span class='hs-varid'>t</span> <span class='hs-conop'>:</span> <span class='hs-varid'>v</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>ValD</span> <span class='hs-layout'>(</span><span class='hs-conid'>VarP</span> <span class='hs-varid'>n2</span><span class='hs-layout'>)</span> <span class='hs-varid'>bdy</span> <span class='hs-varid'>ds</span><span class='hs-layout'>)</span> <span class='hs-conop'>:</span> <span class='hs-varid'>xs</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>n1</span> <span class='hs-varop'>==</span> <span class='hs-varid'>n2</span> <span class='hs-keyglyph'>-></span> <span class='hs-keyword'>do</span>
<a name="line-531"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-varid'>v</span><span class='hs-layout'>,</span> <span class='hs-varid'>t</span><span class='hs-layout'>,</span> <span class='hs-varid'>n1</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Clause</span> <span class='hs-conid'>[]</span> <span class='hs-varid'>bdy</span> <span class='hs-varid'>ds</span><span class='hs-keyglyph'>]</span> <span class='hs-layout'>,</span> <span class='hs-varid'>xs</span><span class='hs-layout'>)</span>
<a name="line-532"></a> <span class='hs-comment'>-- Otherwise the provided declaration block is not supported</span>
<a name="line-533"></a> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>funErr</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UnsupportedDecBlock</span> <span class='hs-varid'>decs</span>
<a name="line-534"></a> <span class='hs-varid'>t'</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>maybe</span> <span class='hs-layout'>(</span><span class='hs-varid'>funErr</span> <span class='hs-varop'>$</span> <span class='hs-conid'>PolyDec</span> <span class='hs-varid'>dec</span><span class='hs-layout'>)</span> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-varid'>type2TypeRep</span> <span class='hs-varid'>t</span><span class='hs-layout'>)</span>
<a name="line-535"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>tpf</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>TypedProcFunAST</span> <span class='hs-varid'>t'</span> <span class='hs-conid'>S</span><span class='hs-varop'>.</span><span class='hs-varid'>empty</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcFunAST</span> <span class='hs-varid'>name</span> <span class='hs-varid'>clauses</span> <span class='hs-conid'>[]</span><span class='hs-layout'>)</span>
<a name="line-536"></a> <span class='hs-varid'>restTPFs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>decs2ProcFuns</span> <span class='hs-varid'>restDecs</span>
<a name="line-537"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-varid'>tpf</span><span class='hs-conop'>:</span><span class='hs-varid'>restTPFs</span>
<a name="line-538"></a>
<a name="line-539"></a><a name="transDecs"></a><span class='hs-comment'>-- | Tranlate a list of declarations and add them to the auxiliary</span>
<a name="line-540"></a><span class='hs-comment'>-- declarations in the function translation state</span>
<a name="line-541"></a><span class='hs-definition'>transDecs</span> <span class='hs-keyglyph'>::</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Dec</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>()</span>
<a name="line-542"></a><span class='hs-definition'>transDecs</span> <span class='hs-varid'>decs</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-543"></a> <span class='hs-comment'>-- first we tranlsate the declarations to process functions</span>
<a name="line-544"></a> <span class='hs-varid'>tpfs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>decs2ProcFuns</span> <span class='hs-varid'>decs</span>
<a name="line-545"></a> <span class='hs-comment'>-- Before translating the process functions we add their names to the</span>
<a name="line-546"></a> <span class='hs-comment'>-- name translation table. It is important to note that, since</span>
<a name="line-547"></a> <span class='hs-comment'>-- Template Haskell makes local names unique (e.g. [| let x = 1 in</span>
<a name="line-548"></a> <span class='hs-comment'>-- let x = 2 in x |] is tranlsated to let x_0 = 1 in let x_1 = 2 in x_2),</span>
<a name="line-549"></a> <span class='hs-comment'>-- we don't have to take care of name scopes i.e. we can have a global name</span>
<a name="line-550"></a> <span class='hs-comment'>-- scope.</span>
<a name="line-551"></a> <span class='hs-varid'>mapM_</span> <span class='hs-varid'>addDecName</span> <span class='hs-varid'>tpfs</span>
<a name="line-552"></a> <span class='hs-comment'>-- Translate the declarations to VHDL and add them</span>
<a name="line-553"></a> <span class='hs-comment'>-- to the auxiliary declarations of the function translation</span>
<a name="line-554"></a> <span class='hs-varid'>bodyDecs</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-layout'>(</span><span class='hs-varid'>liftM</span> <span class='hs-conid'>SPSB</span> <span class='hs-varop'>.</span> <span class='hs-varid'>transProcFun2VHDLBody</span><span class='hs-layout'>)</span> <span class='hs-varid'>tpfs</span>
<a name="line-555"></a> <span class='hs-varid'>addDecsToFunTransST</span> <span class='hs-varid'>bodyDecs</span>
<a name="line-556"></a> <span class='hs-keyword'>where</span> <span class='hs-varid'>addDecName</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TypedProcFunAST</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>()</span>
<a name="line-557"></a> <span class='hs-varid'>addDecName</span> <span class='hs-layout'>(</span><span class='hs-conid'>TypedProcFunAST</span> <span class='hs-varid'>t</span> <span class='hs-keyword'>_</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcFunAST</span> <span class='hs-varid'>n</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-558"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>arity</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>length</span><span class='hs-varop'>.</span><span class='hs-varid'>fst</span><span class='hs-varop'>.</span><span class='hs-varid'>unArrowT</span><span class='hs-layout'>)</span> <span class='hs-varid'>t</span>
<a name="line-559"></a> <span class='hs-varid'>vhdlId</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTHName2VHDL</span> <span class='hs-varid'>n</span>
<a name="line-560"></a> <span class='hs-varid'>addTransNamePair</span> <span class='hs-varid'>n</span> <span class='hs-varid'>arity</span> <span class='hs-layout'>(</span><span class='hs-varid'>genExprFCallN</span> <span class='hs-varid'>vhdlId</span> <span class='hs-varid'>arity</span><span class='hs-layout'>)</span>
<a name="line-561"></a>
<a name="line-562"></a><a name="checkProcFunAST"></a><span class='hs-comment'>-- | Check if a process function AST fulfils the VHDL backend restrictions.</span>
<a name="line-563"></a><span class='hs-comment'>-- It returs the function TH-name its input paterns, its body expression,</span>
<a name="line-564"></a><span class='hs-comment'>-- and the list of theclarations in the where construct. </span>
<a name="line-565"></a><span class='hs-definition'>checkProcFunAST</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>ProcFunAST</span>
<a name="line-566"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>Name</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Pat</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-conid'>Exp</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Dec</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span>
<a name="line-567"></a><span class='hs-comment'>-- FIXME: translate the default arguments!</span>
<a name="line-568"></a><span class='hs-definition'>checkProcFunAST</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcFunAST</span> <span class='hs-varid'>thName</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Clause</span> <span class='hs-varid'>pats</span> <span class='hs-layout'>(</span><span class='hs-conid'>NormalB</span> <span class='hs-varid'>exp</span><span class='hs-layout'>)</span> <span class='hs-varid'>decs</span><span class='hs-keyglyph'>]</span> <span class='hs-conid'>[]</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-569"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-varid'>thName</span><span class='hs-layout'>,</span> <span class='hs-varid'>pats</span><span class='hs-layout'>,</span> <span class='hs-varid'>exp</span><span class='hs-layout'>,</span> <span class='hs-varid'>decs</span><span class='hs-layout'>)</span>
<a name="line-570"></a><span class='hs-definition'>checkProcFunAST</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcFunAST</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span> <span class='hs-layout'>(</span><span class='hs-keyword'>_</span><span class='hs-conop'>:</span><span class='hs-keyword'>_</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-571"></a> <span class='hs-varid'>intError</span> <span class='hs-str'>"ForSyDe.Backend.VHDL.Translate.checkProcFunSpec"</span>
<a name="line-572"></a> <span class='hs-layout'>(</span><span class='hs-conid'>UntranslatableVHDLFun</span> <span class='hs-varop'>$</span> <span class='hs-conid'>GeneralErr</span> <span class='hs-layout'>(</span><span class='hs-conid'>Other</span> <span class='hs-str'>"default parameters are not yet supported"</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-573"></a><span class='hs-definition'>checkProcFunAST</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcFunAST</span> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Clause</span> <span class='hs-keyword'>_</span> <span class='hs-varid'>bdy</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>GuardedB</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyword'>_</span><span class='hs-keyglyph'>]</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-574"></a> <span class='hs-varid'>funErr</span> <span class='hs-layout'>(</span><span class='hs-conid'>FunGuardedBody</span> <span class='hs-varid'>bdy</span><span class='hs-layout'>)</span>
<a name="line-575"></a><span class='hs-definition'>checkProcFunAST</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcFunAST</span> <span class='hs-keyword'>_</span> <span class='hs-varid'>clauses</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-keyword'>_</span><span class='hs-conop'>:</span><span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-576"></a> <span class='hs-varid'>funErr</span> <span class='hs-layout'>(</span><span class='hs-conid'>MultipleClauses</span> <span class='hs-varid'>clauses</span><span class='hs-layout'>)</span>
<a name="line-577"></a><span class='hs-comment'>-- cannot happen</span>
<a name="line-578"></a><span class='hs-definition'>checkProcFunAST</span> <span class='hs-layout'>(</span><span class='hs-conid'>ProcFunAST</span> <span class='hs-keyword'>_</span> <span class='hs-conid'>[]</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-579"></a> <span class='hs-comment'>-- FIXME, use a custom error</span>
<a name="line-580"></a> <span class='hs-varid'>intError</span> <span class='hs-str'>"ForSyDe.Backend.VHDL.Translate.checkProcFunSpec"</span>
<a name="line-581"></a> <span class='hs-layout'>(</span><span class='hs-conid'>UntranslatableVHDLFun</span> <span class='hs-varop'>$</span> <span class='hs-conid'>GeneralErr</span> <span class='hs-layout'>(</span><span class='hs-conid'>Other</span> <span class='hs-str'>"inconsistentency"</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-582"></a>
<a name="line-583"></a>
<a name="line-584"></a>
<a name="line-585"></a><a name="transProcFunSpec"></a><span class='hs-comment'>-- | Get the spec of a VHDL function from the Haskell function name, its type </span>
<a name="line-586"></a><span class='hs-comment'>-- and its input patterns. This function also takes care of initalizing the </span>
<a name="line-587"></a><span class='hs-comment'>-- translation namespace.</span>
<a name="line-588"></a><span class='hs-definition'>transProcFunSpec</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Name</span> <span class='hs-comment'>-- ^ Function name</span>
<a name="line-589"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypeRep</span> <span class='hs-comment'>-- ^ Function type</span>
<a name="line-590"></a> <span class='hs-keyglyph'>-></span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Pat</span><span class='hs-keyglyph'>]</span> <span class='hs-comment'>-- ^ input patterns </span>
<a name="line-591"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-layout'>(</span><span class='hs-conid'>SubProgSpec</span><span class='hs-layout'>,</span> <span class='hs-conid'>VHDLId</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>VHDLId</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>TypeMark</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-conid'>TypeMark</span><span class='hs-layout'>)</span>
<a name="line-592"></a><span class='hs-comment'>-- ^ translated function spec, function name, inpt parameters, input types</span>
<a name="line-593"></a><span class='hs-comment'>-- and return types</span>
<a name="line-594"></a><span class='hs-definition'>transProcFunSpec</span> <span class='hs-varid'>fName</span> <span class='hs-varid'>fType</span> <span class='hs-varid'>fPats</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-595"></a> <span class='hs-comment'>-- FIXME: translate the default arguments!</span>
<a name="line-596"></a> <span class='hs-comment'>-- Get the input and output types</span>
<a name="line-597"></a> <span class='hs-keyword'>let</span> <span class='hs-layout'>(</span><span class='hs-varid'>argsTR</span><span class='hs-layout'>,</span> <span class='hs-varid'>retTR</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unArrowT</span> <span class='hs-varid'>fType</span>
<a name="line-598"></a> <span class='hs-comment'>-- Check that the number of patterns equal the function parameter number</span>
<a name="line-599"></a> <span class='hs-varid'>expectedN</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>length</span> <span class='hs-varid'>argsTR</span>
<a name="line-600"></a> <span class='hs-varid'>actualN</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>length</span> <span class='hs-varid'>fPats</span>
<a name="line-601"></a> <span class='hs-varid'>when</span> <span class='hs-layout'>(</span><span class='hs-varid'>expectedN</span> <span class='hs-varop'>/=</span> <span class='hs-varid'>actualN</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>funErr</span> <span class='hs-varop'>$</span> <span class='hs-conid'>InsParamNum</span> <span class='hs-varid'>fName</span> <span class='hs-varid'>actualN</span><span class='hs-layout'>)</span>
<a name="line-602"></a> <span class='hs-comment'>-- Get a VHDL identifier for each input pattern and</span>
<a name="line-603"></a> <span class='hs-comment'>-- initialize the translation namespace</span>
<a name="line-604"></a> <span class='hs-varid'>fVHDLParIds</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>transInputPat2VHDLId</span> <span class='hs-varid'>fPats</span>
<a name="line-605"></a> <span class='hs-comment'>-- Translate the function name</span>
<a name="line-606"></a> <span class='hs-varid'>fVHDLName</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTHName2VHDL</span> <span class='hs-varid'>fName</span>
<a name="line-607"></a> <span class='hs-comment'>-- Translate the types</span>
<a name="line-608"></a> <span class='hs-varid'>argsTM</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>argsTR</span>
<a name="line-609"></a> <span class='hs-varid'>retTM</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transTR2TM</span> <span class='hs-varid'>retTR</span>
<a name="line-610"></a> <span class='hs-comment'>-- Create the spec</span>
<a name="line-611"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>iface</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>zipWith</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>name</span> <span class='hs-varid'>typ</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>IfaceVarDec</span> <span class='hs-varid'>name</span> <span class='hs-varid'>typ</span><span class='hs-layout'>)</span> <span class='hs-varid'>fVHDLParIds</span> <span class='hs-varid'>argsTM</span>
<a name="line-612"></a> <span class='hs-varid'>fSpec</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>Function</span> <span class='hs-varid'>fVHDLName</span> <span class='hs-varid'>iface</span> <span class='hs-varid'>retTM</span>
<a name="line-613"></a> <span class='hs-comment'>-- Finally, return the results</span>
<a name="line-614"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-varid'>fSpec</span><span class='hs-layout'>,</span> <span class='hs-varid'>fVHDLName</span><span class='hs-layout'>,</span> <span class='hs-varid'>fVHDLParIds</span><span class='hs-layout'>,</span> <span class='hs-varid'>argsTM</span><span class='hs-layout'>,</span> <span class='hs-varid'>retTM</span><span class='hs-layout'>)</span>
<a name="line-615"></a>
<a name="line-616"></a><a name="transInputPat2VHDLId"></a><span class='hs-comment'>-- | Translate an input pattern to a VHDLID, </span>
<a name="line-617"></a><span class='hs-comment'>-- making the necessary changes in the translation namespace</span>
<a name="line-618"></a><span class='hs-definition'>transInputPat2VHDLId</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Pat</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>VHDLId</span>
<a name="line-619"></a><span class='hs-definition'>transInputPat2VHDLId</span> <span class='hs-varid'>pat</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-620"></a> <span class='hs-comment'>-- Get the parameter identifier</span>
<a name="line-621"></a> <span class='hs-varid'>id</span> <span class='hs-keyglyph'><-</span> <span class='hs-keyword'>case</span> <span class='hs-varid'>pat</span> <span class='hs-keyword'>of</span>
<a name="line-622"></a> <span class='hs-comment'>-- if we get a variable or and @ patterm, we just translate it to VHDL</span>
<a name="line-623"></a> <span class='hs-conid'>VarP</span> <span class='hs-varid'>name</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>transTHName2VHDL</span> <span class='hs-varid'>name</span>
<a name="line-624"></a> <span class='hs-conid'>AsP</span> <span class='hs-varid'>name</span> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>transTHName2VHDL</span> <span class='hs-varid'>name</span>
<a name="line-625"></a> <span class='hs-comment'>-- otherwise, generate a fresh identifier</span>
<a name="line-626"></a> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>genFreshVHDLId</span>
<a name="line-627"></a>
<a name="line-628"></a> <span class='hs-comment'>-- Prepare the namespace for the pattern</span>
<a name="line-629"></a> <span class='hs-varid'>preparePatNameSpace</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>id</span><span class='hs-layout'>)</span> <span class='hs-varid'>pat</span>
<a name="line-630"></a> <span class='hs-comment'>-- Finally return the generated id</span>
<a name="line-631"></a> <span class='hs-varid'>return</span> <span class='hs-varid'>id</span>
<a name="line-632"></a>
<a name="line-633"></a>
<a name="line-634"></a><a name="preparePatNameSpace"></a><span class='hs-comment'>-- | prepare the translation namespace for an input pattern</span>
<a name="line-635"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Prefix</span> <span class='hs-comment'>-- ^ name prefix obtained so far </span>
<a name="line-636"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Pat</span> <span class='hs-comment'>-- ^ pattern </span>
<a name="line-637"></a> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>()</span>
<a name="line-638"></a><span class='hs-comment'>-- NOTE: a good alternative to adding selected names to the</span>
<a name="line-639"></a><span class='hs-comment'>-- translation table would be declaring a variable</span>
<a name="line-640"></a><span class='hs-comment'>-- assignment. It would probably make the generated code more</span>
<a name="line-641"></a><span class='hs-comment'>-- readable but at the same time, it requires knowing the</span>
<a name="line-642"></a><span class='hs-comment'>-- pattern type, and TH's AST is unfortunately not</span>
<a name="line-643"></a><span class='hs-comment'>-- type-annotated which would make things more difficult.</span>
<a name="line-644"></a>
<a name="line-645"></a><span class='hs-comment'>-- variable pattern</span>
<a name="line-646"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-varid'>prefix</span> <span class='hs-layout'>(</span><span class='hs-conid'>VarP</span> <span class='hs-varid'>name</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-647"></a> <span class='hs-varid'>addTransNamePair</span> <span class='hs-varid'>name</span> <span class='hs-num'>0</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-conid'>[]</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>PrimName</span> <span class='hs-varid'>prefix</span><span class='hs-layout'>)</span>
<a name="line-648"></a>
<a name="line-649"></a><span class='hs-comment'>-- '@' pattern </span>
<a name="line-650"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-varid'>prefix</span> <span class='hs-layout'>(</span><span class='hs-conid'>AsP</span> <span class='hs-varid'>name</span> <span class='hs-varid'>pat</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-651"></a> <span class='hs-varid'>addTransNamePair</span> <span class='hs-varid'>name</span> <span class='hs-num'>0</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-conid'>[]</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>PrimName</span> <span class='hs-varid'>prefix</span><span class='hs-layout'>)</span>
<a name="line-652"></a> <span class='hs-varid'>preparePatNameSpace</span> <span class='hs-varid'>prefix</span> <span class='hs-varid'>pat</span>
<a name="line-653"></a>
<a name="line-654"></a><span class='hs-comment'>-- wildcard pattern</span>
<a name="line-655"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-keyword'>_</span> <span class='hs-conid'>WildP</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>return</span> <span class='hs-conid'>()</span>
<a name="line-656"></a>
<a name="line-657"></a><span class='hs-comment'>-- tuple pattern </span>
<a name="line-658"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-varid'>prefix</span> <span class='hs-layout'>(</span><span class='hs-conid'>TupP</span> <span class='hs-varid'>pats</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-659"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>prepTup</span> <span class='hs-varid'>n</span> <span class='hs-varid'>pat</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>preparePatNameSpace</span>
<a name="line-660"></a> <span class='hs-layout'>(</span><span class='hs-conid'>NSelected</span> <span class='hs-layout'>(</span><span class='hs-varid'>prefix</span> <span class='hs-conop'>:.:</span> <span class='hs-varid'>tupVHDLSuffix</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-varid'>pat</span>
<a name="line-661"></a> <span class='hs-varid'>zipWithM_</span> <span class='hs-varid'>prepTup</span> <span class='hs-keyglyph'>[</span><span class='hs-num'>1</span><span class='hs-keyglyph'>..</span><span class='hs-keyglyph'>]</span> <span class='hs-varid'>pats</span>
<a name="line-662"></a>
<a name="line-663"></a><span class='hs-comment'>-- AbstExt patterns</span>
<a name="line-664"></a>
<a name="line-665"></a><span class='hs-comment'>-- Since we only support one clause per function</span>
<a name="line-666"></a><span class='hs-comment'>-- they are not really useful, but we accept them anyways </span>
<a name="line-667"></a><span class='hs-comment'>-- FIXME: true, they are not useful, but again, since we only support one</span>
<a name="line-668"></a><span class='hs-comment'>-- clause per function they denote a programming error. Should they</span>
<a name="line-669"></a><span class='hs-comment'>-- really be supported?</span>
<a name="line-670"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-varid'>prefix</span> <span class='hs-layout'>(</span><span class='hs-conid'>ConP</span> <span class='hs-varid'>name</span> <span class='hs-keyglyph'>~</span><span class='hs-keyglyph'>[</span><span class='hs-varid'>pat</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isAbstExt</span> <span class='hs-varid'>name</span> <span class='hs-keyglyph'>=</span>
<a name="line-671"></a> <span class='hs-varid'>when</span> <span class='hs-varid'>isPrst</span> <span class='hs-layout'>(</span><span class='hs-varid'>preparePatNameSpace</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSelected</span> <span class='hs-layout'>(</span><span class='hs-varid'>prefix</span> <span class='hs-conop'>:.:</span> <span class='hs-varid'>valueSuffix</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-varid'>pat</span><span class='hs-layout'>)</span>
<a name="line-672"></a> <span class='hs-keyword'>where</span> <span class='hs-varid'>isAbstExt</span> <span class='hs-varid'>name</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>isPrst</span> <span class='hs-varop'>||</span> <span class='hs-varid'>name</span> <span class='hs-varop'>==</span> <span class='hs-chr'>'</span><span class='hs-conid'>Abst</span>
<a name="line-673"></a> <span class='hs-varid'>isPrst</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>name</span> <span class='hs-varop'>==</span> <span class='hs-chr'>'</span><span class='hs-conid'>Prst</span>
<a name="line-674"></a>
<a name="line-675"></a><span class='hs-comment'>-- Unary Constructor patterns</span>
<a name="line-676"></a><span class='hs-comment'>-- We try an enumerated type patterns </span>
<a name="line-677"></a><span class='hs-comment'>-- otherwise we throw an unknown constructor pattern error</span>
<a name="line-678"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-keyword'>_</span> <span class='hs-varid'>pat</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>ConP</span> <span class='hs-varid'>name</span> <span class='hs-conid'>[]</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-679"></a> <span class='hs-varid'>mId</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>getEnumConsId</span> <span class='hs-varid'>name</span>
<a name="line-680"></a> <span class='hs-keyword'>case</span> <span class='hs-varid'>mId</span> <span class='hs-keyword'>of</span>
<a name="line-681"></a> <span class='hs-comment'>-- it is an enumerated data constructor, however, since we only admit</span>
<a name="line-682"></a> <span class='hs-comment'>-- one clause per function there is nothing to do about it</span>
<a name="line-683"></a> <span class='hs-conid'>Just</span> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>return</span> <span class='hs-conid'>()</span>
<a name="line-684"></a> <span class='hs-comment'>-- it is an unknown data constructor</span>
<a name="line-685"></a> <span class='hs-conid'>Nothing</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>funErr</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UnsupportedFunPat</span> <span class='hs-varid'>pat</span>
<a name="line-686"></a>
<a name="line-687"></a><span class='hs-comment'>-- otherwise the pattern is not supported</span>
<a name="line-688"></a><span class='hs-definition'>preparePatNameSpace</span> <span class='hs-keyword'>_</span> <span class='hs-varid'>pat</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>funErr</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UnsupportedFunPat</span> <span class='hs-varid'>pat</span>
<a name="line-689"></a>
<a name="line-690"></a>
<a name="line-691"></a>
<a name="line-692"></a><span class='hs-comment'>--------------------------</span>
<a name="line-693"></a><span class='hs-comment'>-- Translating expressions</span>
<a name="line-694"></a><span class='hs-comment'>--------------------------</span>
<a name="line-695"></a>
<a name="line-696"></a><a name="expErr"></a><span class='hs-comment'>-- | Throw an expression error</span>
<a name="line-697"></a><span class='hs-definition'>expErr</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Exp</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLExpErr</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-varid'>a</span>
<a name="line-698"></a><span class='hs-definition'>expErr</span> <span class='hs-varid'>exp</span> <span class='hs-varid'>err</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>throwFError</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UntranslatableVHDLExp</span> <span class='hs-varid'>exp</span> <span class='hs-varid'>err</span>
<a name="line-699"></a>
<a name="line-700"></a>
<a name="line-701"></a><a name="transFunBodyExp2VHDL"></a><span class='hs-comment'>-- | Create the unique statement of a VHDL from a TH expression.</span>
<a name="line-702"></a><span class='hs-definition'>transFunBodyExp2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Exp</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>SeqSm</span>
<a name="line-703"></a><span class='hs-definition'>transFunBodyExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>CondE</span> <span class='hs-varid'>condE</span> <span class='hs-varid'>thenE</span> <span class='hs-varid'>elseE</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-704"></a> <span class='hs-keyword'>do</span> <span class='hs-varid'>condVHDLE</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>condE</span>
<a name="line-705"></a> <span class='hs-varid'>thenVHDLSm</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transFunBodyExp2VHDL</span> <span class='hs-varid'>thenE</span>
<a name="line-706"></a> <span class='hs-varid'>elseVHDLSm</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transFunBodyExp2VHDL</span> <span class='hs-varid'>elseE</span>
<a name="line-707"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>IfSm</span> <span class='hs-varid'>condVHDLE</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>thenVHDLSm</span><span class='hs-keyglyph'>]</span> <span class='hs-conid'>[]</span> <span class='hs-layout'>(</span><span class='hs-conid'>Just</span> <span class='hs-varop'>$</span> <span class='hs-conid'>Else</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>elseVHDLSm</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-708"></a><span class='hs-definition'>transFunBodyExp2VHDL</span> <span class='hs-varid'>caseE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>CaseE</span> <span class='hs-varid'>exp</span> <span class='hs-varid'>matches</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-709"></a> <span class='hs-keyword'>do</span> <span class='hs-varid'>caseVHDLE</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>exp</span>
<a name="line-710"></a> <span class='hs-varid'>caseSmAlts</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-layout'>(</span><span class='hs-varid'>transMatch2VHDLCaseSmAlt</span> <span class='hs-varid'>caseE</span><span class='hs-layout'>)</span> <span class='hs-varid'>matches</span>
<a name="line-711"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>CaseSm</span> <span class='hs-varid'>caseVHDLE</span> <span class='hs-varid'>caseSmAlts</span><span class='hs-layout'>)</span>
<a name="line-712"></a><span class='hs-comment'>-- In other case it is an expression returned directly</span>
<a name="line-713"></a><span class='hs-definition'>transFunBodyExp2VHDL</span> <span class='hs-varid'>e</span> <span class='hs-keyglyph'>=</span>
<a name="line-714"></a> <span class='hs-keyword'>do</span> <span class='hs-varid'>vHDLe</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>e</span>
<a name="line-715"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>ReturnSm</span> <span class='hs-varop'>$</span> <span class='hs-conid'>Just</span> <span class='hs-varid'>vHDLe</span><span class='hs-layout'>)</span>
<a name="line-716"></a>
<a name="line-717"></a><a name="transMatch2VHDLCaseSmAlt"></a><span class='hs-comment'>-- | Translate a case alternative from Haskell to VHDL</span>
<a name="line-718"></a><span class='hs-definition'>transMatch2VHDLCaseSmAlt</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Exp</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Match</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>CaseSmAlt</span>
<a name="line-719"></a><span class='hs-comment'>-- FIXME: the exp passed (which contains the full case expression for</span>
<a name="line-720"></a><span class='hs-comment'>-- error reporting purposes) should be part of the context once VHDLM</span>
<a name="line-721"></a><span class='hs-comment'>-- is reworked</span>
<a name="line-722"></a><span class='hs-definition'>transMatch2VHDLCaseSmAlt</span> <span class='hs-varid'>contextExp</span> <span class='hs-layout'>(</span><span class='hs-conid'>Match</span> <span class='hs-varid'>pat</span> <span class='hs-layout'>(</span><span class='hs-conid'>NormalB</span> <span class='hs-varid'>matchExp</span><span class='hs-layout'>)</span> <span class='hs-varid'>decs</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-723"></a> <span class='hs-keyword'>do</span> <span class='hs-varid'>transDecs</span> <span class='hs-varid'>decs</span>
<a name="line-724"></a> <span class='hs-varid'>sm</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transFunBodyExp2VHDL</span> <span class='hs-varid'>matchExp</span>
<a name="line-725"></a> <span class='hs-keyword'>case</span> <span class='hs-varid'>pat</span> <span class='hs-keyword'>of</span>
<a name="line-726"></a> <span class='hs-comment'>-- FIXME: support pattern matching with tuples, AbsExt, </span>
<a name="line-727"></a> <span class='hs-comment'>-- and enumerated types</span>
<a name="line-728"></a> <span class='hs-conid'>WildP</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>CaseSmAlt</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Others</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>sm</span><span class='hs-keyglyph'>]</span>
<a name="line-729"></a> <span class='hs-conid'>LitP</span> <span class='hs-varid'>lit</span> <span class='hs-keyglyph'>-></span> <span class='hs-keyword'>do</span> <span class='hs-varid'>vHDLExp</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>LitE</span> <span class='hs-varid'>lit</span><span class='hs-layout'>)</span>
<a name="line-730"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>CaseSmAlt</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>ChoiceE</span> <span class='hs-varid'>vHDLExp</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>sm</span><span class='hs-keyglyph'>]</span>
<a name="line-731"></a> <span class='hs-comment'>-- FIXME: check! this case introduces new names into scope</span>
<a name="line-732"></a> <span class='hs-conid'>VarP</span> <span class='hs-varid'>name</span> <span class='hs-keyglyph'>-></span> <span class='hs-keyword'>do</span> <span class='hs-varid'>vHDLExp</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>VarE</span> <span class='hs-varid'>name</span><span class='hs-layout'>)</span>
<a name="line-733"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>CaseSmAlt</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>ChoiceE</span> <span class='hs-varid'>vHDLExp</span><span class='hs-keyglyph'>]</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>sm</span><span class='hs-keyglyph'>]</span>
<a name="line-734"></a> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>contextExp</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UnsupportedCasePat</span> <span class='hs-varid'>pat</span>
<a name="line-735"></a><span class='hs-definition'>transMatch2VHDLCaseSmAlt</span> <span class='hs-varid'>contextExp</span> <span class='hs-layout'>(</span><span class='hs-conid'>Match</span> <span class='hs-keyword'>_</span> <span class='hs-varid'>bdy</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>GuardedB</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-736"></a> <span class='hs-varid'>expErr</span> <span class='hs-varid'>contextExp</span> <span class='hs-varop'>$</span> <span class='hs-conid'>CaseGuardedBody</span> <span class='hs-varid'>bdy</span>
<a name="line-737"></a>
<a name="line-738"></a>
<a name="line-739"></a><a name="transExp2VHDL"></a><span class='hs-comment'>-- | Translate a Haskell expression to a VHDL expression</span>
<a name="line-740"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TH</span><span class='hs-varop'>.</span><span class='hs-conid'>Exp</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>VHDLM</span> <span class='hs-conid'>VHDL</span><span class='hs-varop'>.</span><span class='hs-conid'>Expr</span>
<a name="line-741"></a>
<a name="line-742"></a>
<a name="line-743"></a><span class='hs-comment'>-- TypeLevel-package numerical constant aliases</span>
<a name="line-744"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>VarE</span> <span class='hs-varid'>name</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isTypeLevelAlias</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-745"></a> <span class='hs-keyword'>let</span> <span class='hs-varid'>constant</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>nameBase</span> <span class='hs-varid'>name</span>
<a name="line-746"></a> <span class='hs-layout'>(</span><span class='hs-keyglyph'>[</span><span class='hs-varid'>baseSym</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-varid'>val</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>splitAt</span> <span class='hs-num'>1</span> <span class='hs-varid'>constant</span>
<a name="line-747"></a> <span class='hs-varid'>basePrefix</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>case</span> <span class='hs-varid'>baseSym</span> <span class='hs-keyword'>of</span>
<a name="line-748"></a> <span class='hs-chr'>'b'</span> <span class='hs-keyglyph'>-></span> <span class='hs-str'>"2#"</span>
<a name="line-749"></a> <span class='hs-chr'>'o'</span> <span class='hs-keyglyph'>-></span> <span class='hs-str'>"8#"</span>
<a name="line-750"></a> <span class='hs-chr'>'h'</span> <span class='hs-keyglyph'>-></span> <span class='hs-str'>"16#"</span>
<a name="line-751"></a> <span class='hs-chr'>'d'</span> <span class='hs-keyglyph'>-></span> <span class='hs-str'>""</span>
<a name="line-752"></a> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>error</span> <span class='hs-str'>"unexpected base symbol"</span>
<a name="line-753"></a> <span class='hs-varid'>return</span> <span class='hs-layout'>(</span><span class='hs-conid'>PrimLit</span> <span class='hs-varop'>$</span> <span class='hs-varid'>basePrefix</span> <span class='hs-varop'>++</span> <span class='hs-varid'>val</span><span class='hs-layout'>)</span>
<a name="line-754"></a> <span class='hs-keyword'>where</span> <span class='hs-varid'>isTypeLevelAlias</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>show</span> <span class='hs-varid'>name</span> <span class='hs-varop'>=~</span> <span class='hs-varid'>aliasPat</span><span class='hs-layout'>)</span>
<a name="line-755"></a> <span class='hs-varid'>aliasPat</span> <span class='hs-keyglyph'>=</span> <span class='hs-str'>"^Data\\.TypeLevel\\.Num\\.Aliases\\.(b[0-1]+|o[0-7]+|d[0-9]+|h[0-9A-F]+)$"</span>
<a name="line-756"></a>
<a name="line-757"></a>
<a name="line-758"></a>
<a name="line-759"></a><span class='hs-comment'>-- A FSVec generated with Template Haskell </span>
<a name="line-760"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>VarE</span> <span class='hs-varid'>unsafeFSVecCoerce</span> <span class='hs-varop'>`AppE`</span> <span class='hs-keyword'>_</span> <span class='hs-varop'>`AppE`</span> <span class='hs-layout'>(</span><span class='hs-conid'>ConE</span> <span class='hs-varid'>con</span> <span class='hs-varop'>`AppE`</span> <span class='hs-conid'>ListE</span> <span class='hs-varid'>exps</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span>
<a name="line-761"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>show</span> <span class='hs-varid'>unsafeFSVecCoerce</span> <span class='hs-varop'>==</span> <span class='hs-str'>"Data.Param.FSVec.unsafeFSVecCoerce"</span> <span class='hs-varop'>&&</span>
<a name="line-762"></a> <span class='hs-varid'>show</span> <span class='hs-varid'>con</span> <span class='hs-varop'>==</span> <span class='hs-str'>"Data.Param.FSVec.FSVec"</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-763"></a> <span class='hs-varid'>vhdlExps</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>exps</span>
<a name="line-764"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>Aggregate</span> <span class='hs-layout'>(</span><span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>e</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>ElemAssoc</span> <span class='hs-conid'>Nothing</span> <span class='hs-varid'>e</span><span class='hs-layout'>)</span> <span class='hs-varid'>vhdlExps</span><span class='hs-layout'>)</span>
<a name="line-765"></a>
<a name="line-766"></a>
<a name="line-767"></a><span class='hs-comment'>-- Is it function/constructor application, a constant</span>
<a name="line-768"></a><span class='hs-comment'>-- or an unkown name.</span>
<a name="line-769"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>e</span> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isConsOrFun</span> <span class='hs-keyglyph'>=</span>
<a name="line-770"></a> <span class='hs-keyword'>do</span> <span class='hs-comment'>-- get the symbol table (name translation table)</span>
<a name="line-771"></a> <span class='hs-varid'>nameTable</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>gets</span> <span class='hs-layout'>(</span><span class='hs-varid'>nameTable</span><span class='hs-varop'>.</span><span class='hs-varid'>funTransST</span><span class='hs-varop'>.</span><span class='hs-varid'>local</span><span class='hs-layout'>)</span>
<a name="line-772"></a> <span class='hs-keyword'>case</span> <span class='hs-varid'>lookup</span> <span class='hs-varid'>name</span> <span class='hs-varid'>nameTable</span> <span class='hs-keyword'>of</span>
<a name="line-773"></a> <span class='hs-comment'>-- found name</span>
<a name="line-774"></a> <span class='hs-conid'>Just</span> <span class='hs-layout'>(</span><span class='hs-varid'>arity</span><span class='hs-layout'>,</span> <span class='hs-varid'>transF</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>-></span>
<a name="line-775"></a> <span class='hs-keyword'>if</span> <span class='hs-varid'>arity</span> <span class='hs-varop'>/=</span> <span class='hs-varid'>numArgs</span>
<a name="line-776"></a> <span class='hs-keyword'>then</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>e</span> <span class='hs-varop'>$</span> <span class='hs-conid'>CurryUnsupported</span> <span class='hs-varid'>arity</span> <span class='hs-varid'>numArgs</span>
<a name="line-777"></a> <span class='hs-keyword'>else</span> <span class='hs-keyword'>do</span> <span class='hs-varid'>exps</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>args</span>
<a name="line-778"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-varid'>transF</span> <span class='hs-varid'>exps</span>
<a name="line-779"></a> <span class='hs-comment'>-- Didn't find the name in the global table</span>
<a name="line-780"></a> <span class='hs-conid'>Nothing</span> <span class='hs-keyglyph'>-></span> <span class='hs-keyword'>do</span>
<a name="line-781"></a> <span class='hs-comment'>-- Check if it is a user-defined enumerated data constructor </span>
<a name="line-782"></a> <span class='hs-varid'>mId</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>getEnumConsId</span> <span class='hs-varid'>name</span>
<a name="line-783"></a> <span class='hs-keyword'>case</span> <span class='hs-varid'>mId</span> <span class='hs-keyword'>of</span>
<a name="line-784"></a> <span class='hs-conid'>Just</span> <span class='hs-varid'>id</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>PrimName</span> <span class='hs-layout'>(</span><span class='hs-conid'>NSimple</span> <span class='hs-varid'>id</span><span class='hs-layout'>)</span>
<a name="line-785"></a> <span class='hs-conid'>Nothing</span> <span class='hs-keyglyph'>-></span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>e</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UnkownIdentifier</span> <span class='hs-varid'>name</span>
<a name="line-786"></a> <span class='hs-keyword'>where</span> <span class='hs-layout'>(</span><span class='hs-varid'>f</span><span class='hs-layout'>,</span><span class='hs-varid'>args</span><span class='hs-layout'>,</span><span class='hs-varid'>numArgs</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unApp</span> <span class='hs-varid'>e</span>
<a name="line-787"></a> <span class='hs-varid'>mName</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>getName</span> <span class='hs-varid'>f</span>
<a name="line-788"></a> <span class='hs-varid'>name</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>fromJust</span> <span class='hs-varid'>mName</span>
<a name="line-789"></a> <span class='hs-varid'>isConsOrFun</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>isJust</span> <span class='hs-varid'>mName</span>
<a name="line-790"></a> <span class='hs-varid'>getName</span> <span class='hs-layout'>(</span><span class='hs-conid'>VarE</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>Just</span> <span class='hs-varid'>n</span>
<a name="line-791"></a> <span class='hs-varid'>getName</span> <span class='hs-layout'>(</span><span class='hs-conid'>ConE</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>Just</span> <span class='hs-varid'>n</span>
<a name="line-792"></a> <span class='hs-varid'>getName</span> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>Nothing</span>
<a name="line-793"></a>
<a name="line-794"></a>
<a name="line-795"></a>
<a name="line-796"></a><span class='hs-comment'>-- Literals</span>
<a name="line-797"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>LitE</span> <span class='hs-layout'>(</span><span class='hs-conid'>IntegerL</span> <span class='hs-varid'>integer</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>return</span><span class='hs-varop'>.</span><span class='hs-varid'>transInteger2VHDL</span><span class='hs-layout'>)</span> <span class='hs-varid'>integer</span>
<a name="line-798"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>LitE</span> <span class='hs-layout'>(</span><span class='hs-conid'>IntPrimL</span> <span class='hs-varid'>integer</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>return</span><span class='hs-varop'>.</span><span class='hs-varid'>transInteger2VHDL</span><span class='hs-layout'>)</span> <span class='hs-varid'>integer</span>
<a name="line-799"></a>
<a name="line-800"></a><span class='hs-comment'>-- Unsupported literal </span>
<a name="line-801"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>lit</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>LitE</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>lit</span> <span class='hs-varop'>$</span> <span class='hs-conid'>UnsupportedLiteral</span>
<a name="line-802"></a>
<a name="line-803"></a><span class='hs-comment'>-- Infix expressions</span>
<a name="line-804"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>InfixE</span> <span class='hs-layout'>(</span><span class='hs-conid'>Just</span> <span class='hs-varid'>argl</span><span class='hs-layout'>)</span> <span class='hs-varid'>f</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>VarE</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-conid'>Just</span> <span class='hs-varid'>argr</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span>
<a name="line-805"></a> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varop'>$</span> <span class='hs-varid'>f</span> <span class='hs-varop'>`AppE`</span> <span class='hs-varid'>argl</span> <span class='hs-varop'>`AppE`</span> <span class='hs-varid'>argr</span>
<a name="line-806"></a>
<a name="line-807"></a><span class='hs-comment'>-- Sections (unsupported)</span>
<a name="line-808"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>infixExp</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>InfixE</span> <span class='hs-keyword'>_</span> <span class='hs-layout'>(</span><span class='hs-conid'>VarE</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>infixExp</span> <span class='hs-conid'>Section</span>
<a name="line-809"></a>
<a name="line-810"></a><span class='hs-comment'>-- Tuples: e.g. (1,2)</span>
<a name="line-811"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>TupE</span> <span class='hs-varid'>exps</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-812"></a> <span class='hs-varid'>vExps</span> <span class='hs-keyglyph'><-</span> <span class='hs-varid'>mapM</span> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>exps</span>
<a name="line-813"></a> <span class='hs-varid'>return</span> <span class='hs-varop'>$</span> <span class='hs-conid'>Aggregate</span> <span class='hs-varop'>$</span> <span class='hs-varid'>map</span> <span class='hs-layout'>(</span><span class='hs-keyglyph'>\</span><span class='hs-varid'>expr</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>ElemAssoc</span> <span class='hs-conid'>Nothing</span> <span class='hs-varid'>expr</span><span class='hs-layout'>)</span> <span class='hs-varid'>vExps</span>
<a name="line-814"></a>
<a name="line-815"></a><span class='hs-comment'>-- Let expressions</span>
<a name="line-816"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-layout'>(</span><span class='hs-conid'>LetE</span> <span class='hs-varid'>decs</span> <span class='hs-varid'>e</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-keyword'>do</span>
<a name="line-817"></a> <span class='hs-varid'>transDecs</span> <span class='hs-varid'>decs</span>
<a name="line-818"></a> <span class='hs-varid'>transExp2VHDL</span> <span class='hs-varid'>e</span>
<a name="line-819"></a>
<a name="line-820"></a><span class='hs-comment'>-- Unsupported expressions</span>
<a name="line-821"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>lamE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>LamE</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>lamE</span> <span class='hs-conid'>LambdaAbstraction</span>
<a name="line-822"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>condE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>CondE</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>condE</span> <span class='hs-conid'>Conditional</span>
<a name="line-823"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>caseE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>CaseE</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>caseE</span> <span class='hs-conid'>Case</span>
<a name="line-824"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>doE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>DoE</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>doE</span> <span class='hs-conid'>Do</span>
<a name="line-825"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>compE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>CompE</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>compE</span> <span class='hs-conid'>ListComprehension</span>
<a name="line-826"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>arithSeqE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>ArithSeqE</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>arithSeqE</span> <span class='hs-conid'>ArithSeq</span>
<a name="line-827"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>listE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>ListE</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>listE</span> <span class='hs-conid'>List</span>
<a name="line-828"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>sigE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>SigE</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>sigE</span> <span class='hs-conid'>Signature</span>
<a name="line-829"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>reConE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>RecConE</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>reConE</span> <span class='hs-conid'>Record</span>
<a name="line-830"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>recUpE</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-conid'>RecUpdE</span> <span class='hs-keyword'>_</span> <span class='hs-keyword'>_</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>recUpE</span> <span class='hs-conid'>Record</span>
<a name="line-831"></a>
<a name="line-832"></a><span class='hs-comment'>-- The rest of expressions are not valid in practice and thus, not supported </span>
<a name="line-833"></a><span class='hs-comment'>-- (e.g. InfixE Nothing (RecConE _ _) _</span>
<a name="line-834"></a><span class='hs-definition'>transExp2VHDL</span> <span class='hs-varid'>exp</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>expErr</span> <span class='hs-varid'>exp</span> <span class='hs-conid'>Unsupported</span>
<a name="line-835"></a>
<a name="line-836"></a>
<a name="line-837"></a><a name="transInteger2VHDL"></a><span class='hs-comment'>-- | Translate an integer to VHDL</span>
<a name="line-838"></a><span class='hs-definition'>transInteger2VHDL</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Integer</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Expr</span>
<a name="line-839"></a><span class='hs-definition'>transInteger2VHDL</span> <span class='hs-keyglyph'>=</span> <span class='hs-conid'>PrimLit</span> <span class='hs-varop'>.</span> <span class='hs-varid'>show</span>
<a name="line-840"></a>
<a name="line-841"></a>
<a name="line-842"></a><span class='hs-comment'>--------------------</span>
<a name="line-843"></a><span class='hs-comment'>-- Helper Functions</span>
<a name="line-844"></a><span class='hs-comment'>--------------------</span>
<a name="line-845"></a>
<a name="line-846"></a><a name="transTLNat2Int"></a><span class='hs-comment'>-- Translate the TypeRep of a type-level natural (e.g: D1 :* D2) to a number</span>
<a name="line-847"></a><span class='hs-comment'>-- Make sure you don't supply an incorrect TypeRep or the function will break</span>
<a name="line-848"></a><span class='hs-definition'>transTLNat2Int</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TypeRep</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>Int</span>
<a name="line-849"></a><span class='hs-definition'>transTLNat2Int</span> <span class='hs-varid'>tr</span>
<a name="line-850"></a> <span class='hs-comment'>-- Digit</span>
<a name="line-851"></a> <span class='hs-comment'>-- FIXME: Could be made cleaner. It was like this before:</span>
<a name="line-852"></a> <span class='hs-comment'>-- isDigit = (digitToInt.last.tyConString) cons</span>
<a name="line-853"></a> <span class='hs-comment'>-- which was not able to take care of e.g. Data.TypeLevel.Num.Aliases.D10</span>
<a name="line-854"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>isDigit</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>read</span><span class='hs-varop'>.</span><span class='hs-varid'>reverse</span><span class='hs-varop'>.</span><span class='hs-varid'>takeWhile</span> <span class='hs-layout'>(</span><span class='hs-varop'>/=</span><span class='hs-chr'>'D'</span><span class='hs-layout'>)</span><span class='hs-varop'>.</span><span class='hs-varid'>reverse</span><span class='hs-varop'>.</span><span class='hs-varid'>tyConString</span><span class='hs-layout'>)</span> <span class='hs-varid'>cons</span>
<a name="line-855"></a> <span class='hs-comment'>-- Connective</span>
<a name="line-856"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>otherwise</span> <span class='hs-keyglyph'>=</span> <span class='hs-num'>10</span> <span class='hs-varop'>*</span> <span class='hs-layout'>(</span><span class='hs-varid'>transTLNat2Int</span> <span class='hs-varid'>prefix</span><span class='hs-layout'>)</span> <span class='hs-varop'>+</span> <span class='hs-layout'>(</span><span class='hs-varid'>transTLNat2Int</span> <span class='hs-varid'>lastDigit</span><span class='hs-layout'>)</span>
<a name="line-857"></a> <span class='hs-keyword'>where</span> <span class='hs-layout'>(</span><span class='hs-varid'>cons</span><span class='hs-layout'>,</span> <span class='hs-varid'>args</span><span class='hs-keyglyph'>@</span><span class='hs-layout'>(</span><span class='hs-keyglyph'>~</span><span class='hs-keyglyph'>[</span><span class='hs-varid'>prefix</span><span class='hs-layout'>,</span> <span class='hs-varid'>lastDigit</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>)</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>splitTyConApp</span> <span class='hs-varid'>tr</span>
<a name="line-858"></a> <span class='hs-varid'>isDigit</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>null</span> <span class='hs-varid'>args</span>
<a name="line-859"></a>
<a name="line-860"></a>
<a name="line-861"></a><a name="transInt2TLNat"></a><span class='hs-comment'>-- Tranlate an Into to the TypeRep of a type-level natural (e.g: D1 :* D2)</span>
<a name="line-862"></a><span class='hs-definition'>transInt2TLNat</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Int</span> <span class='hs-keyglyph'>-></span> <span class='hs-conid'>TypeRep</span>
<a name="line-863"></a><span class='hs-definition'>transInt2TLNat</span> <span class='hs-varid'>n</span>
<a name="line-864"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>n</span> <span class='hs-varop'><</span> <span class='hs-num'>0</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>intError</span> <span class='hs-varid'>fName</span> <span class='hs-layout'>(</span><span class='hs-conid'>Other</span> <span class='hs-str'>"negative index"</span><span class='hs-layout'>)</span>
<a name="line-865"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>n</span> <span class='hs-varop'><</span> <span class='hs-num'>10</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>digit</span> <span class='hs-varid'>n</span>
<a name="line-866"></a> <span class='hs-keyglyph'>|</span> <span class='hs-varid'>otherwise</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>mkTyConApp</span> <span class='hs-varid'>conTyCon</span> <span class='hs-keyglyph'>[</span><span class='hs-varid'>transInt2TLNat</span> <span class='hs-varid'>suffix</span><span class='hs-layout'>,</span> <span class='hs-varid'>digit</span> <span class='hs-varid'>last</span><span class='hs-keyglyph'>]</span>
<a name="line-867"></a> <span class='hs-keyword'>where</span> <span class='hs-varid'>fName</span> <span class='hs-keyglyph'>=</span> <span class='hs-str'>"ForSyDe.Backend.VHDL.Translate.transInt2TLNat"</span>
<a name="line-868"></a> <span class='hs-layout'>(</span><span class='hs-varid'>suffix</span><span class='hs-layout'>,</span> <span class='hs-varid'>last</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>n</span> <span class='hs-varop'>`divMod`</span> <span class='hs-num'>10</span>
<a name="line-869"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>0</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D0</span><span class='hs-layout'>)</span>
<a name="line-870"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>1</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D1</span><span class='hs-layout'>)</span>
<a name="line-871"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>2</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D2</span><span class='hs-layout'>)</span>
<a name="line-872"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>3</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D3</span><span class='hs-layout'>)</span>
<a name="line-873"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>4</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D4</span><span class='hs-layout'>)</span>
<a name="line-874"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>5</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D5</span><span class='hs-layout'>)</span>
<a name="line-875"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>6</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D6</span><span class='hs-layout'>)</span>
<a name="line-876"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>7</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D7</span><span class='hs-layout'>)</span>
<a name="line-877"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>8</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D8</span><span class='hs-layout'>)</span>
<a name="line-878"></a> <span class='hs-varid'>digit</span> <span class='hs-num'>9</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>typeOf</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>D9</span><span class='hs-layout'>)</span>
<a name="line-879"></a> <span class='hs-comment'>-- Just to hush the compiler warnings</span>
<a name="line-880"></a> <span class='hs-varid'>digit</span> <span class='hs-keyword'>_</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>undefined</span>
<a name="line-881"></a> <span class='hs-varid'>conTyCon</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>typeRepTyCon</span><span class='hs-varop'>.</span><span class='hs-varid'>typeOf</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>()</span> <span class='hs-conop'>:*</span> <span class='hs-conid'>()</span><span class='hs-layout'>)</span>
<a name="line-882"></a>
<a name="line-883"></a><a name="fSVecTyCon"></a><span class='hs-comment'>-- Type constructor of FSVec</span>
<a name="line-884"></a><span class='hs-definition'>fSVecTyCon</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>TyCon</span>
<a name="line-885"></a><span class='hs-definition'>fSVecTyCon</span> <span class='hs-keyglyph'>=</span><span class='hs-layout'>(</span><span class='hs-varid'>typeRepTyCon</span><span class='hs-varop'>.</span><span class='hs-varid'>typeOf</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>undefined</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>V</span><span class='hs-varop'>.</span><span class='hs-conid'>FSVec</span> <span class='hs-conid'>()</span> <span class='hs-conid'>()</span><span class='hs-layout'>)</span>
<a name="line-886"></a>
<a name="line-887"></a><a name="unApp"></a><span class='hs-comment'>-- unApply an expression and obtain the number of arguments found</span>
<a name="line-888"></a><span class='hs-definition'>unApp</span> <span class='hs-keyglyph'>::</span> <span class='hs-conid'>Exp</span> <span class='hs-keyglyph'>-></span> <span class='hs-layout'>(</span><span class='hs-conid'>Exp</span><span class='hs-layout'>,</span> <span class='hs-keyglyph'>[</span><span class='hs-conid'>Exp</span><span class='hs-keyglyph'>]</span><span class='hs-layout'>,</span> <span class='hs-conid'>Int</span><span class='hs-layout'>)</span>
<a name="line-889"></a><span class='hs-definition'>unApp</span> <span class='hs-varid'>e</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>first</span><span class='hs-layout'>,</span> <span class='hs-varid'>rest</span><span class='hs-layout'>,</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span>
<a name="line-890"></a> <span class='hs-keyword'>where</span> <span class='hs-layout'>(</span><span class='hs-varid'>first</span><span class='hs-conop'>:</span><span class='hs-varid'>rest</span><span class='hs-layout'>,</span> <span class='hs-varid'>n</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unAppAc</span> <span class='hs-layout'>(</span><span class='hs-conid'>[]</span><span class='hs-layout'>,</span><span class='hs-num'>0</span><span class='hs-layout'>)</span> <span class='hs-varid'>e</span>
<a name="line-891"></a> <span class='hs-varid'>unAppAc</span> <span class='hs-layout'>(</span><span class='hs-varid'>xs</span><span class='hs-layout'>,</span><span class='hs-varid'>n</span><span class='hs-layout'>)</span> <span class='hs-layout'>(</span><span class='hs-varid'>f</span> <span class='hs-varop'>`AppE`</span> <span class='hs-varid'>arg</span><span class='hs-layout'>)</span> <span class='hs-keyglyph'>=</span> <span class='hs-varid'>unAppAc</span> <span class='hs-layout'>(</span><span class='hs-varid'>arg</span><span class='hs-conop'>:</span><span class='hs-varid'>xs</span><span class='hs-layout'>,</span> <span class='hs-varid'>n</span><span class='hs-varop'>+</span><span class='hs-num'>1</span><span class='hs-layout'>)</span> <span class='hs-varid'>f</span>
<a name="line-892"></a> <span class='hs-varid'>unAppAc</span> <span class='hs-layout'>(</span><span class='hs-varid'>xs</span><span class='hs-layout'>,</span><span class='hs-varid'>n</span><span class='hs-layout'>)</span> <span class='hs-varid'>f</span> <span class='hs-keyglyph'>=</span> <span class='hs-layout'>(</span><span class='hs-varid'>f</span><span class='hs-conop'>:</span><span class='hs-varid'>xs</span><span class='hs-layout'>,</span><span class='hs-varid'>n</span><span class='hs-layout'>)</span>
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