\section{Machine Code Emitters}

\subsubsection{Overview}
MLRISC lets the client to directly emit machine code and bypass the traditional
assembly mechanism. 

Machine code emitters in MLRISC satisfy the signature 
\mlrischref{emit/instruction-emitter.sig}{INSTRUCTION\_EMITTER},
which is defined as:
\begin{SML}
signature INSTRUCTION_EMITTER =
sig

   structure I : \href{instructions.html}{INSTRUCTIONS}
   structure C : \href{cells.html}{CELLS}
   structure S : \href{streams.html}{INSTRUCTION_STREAM}
   structure P : \href{pseudo-ops.html}{PSEUDO_OPS}
      sharing I.C = C  
      sharing S.P = P

   val makeStream : Annotations.annotations ->
                     ((int -> int) -> I.instruction -> unit,
                      unit,'b,'c,'d,'e) S.stream

end
\end{SML}

The function \sml{makeStream} returns an instruction stream.
The output, a stream of bytes, is direct to the client supplied
structure which satisfy the 
\mlrischref{emit/code-string.sig}{CODE\_STRING} interface.
This signature is defined as follows:
\begin{SML}
signature CODE_STRING = sig
  type code_string
  val init          : int -> unit
  val update        : int * Word8.word -> unit
  val getCodeString : unit -> code_string
end
\end{SML}

\subsubsection{More Details}

Machine code emitters are automatically generated by the 
\href{mlrisc-md.html}{MDGen} tool.  Some specific generated
emitters are listed below:
\begin{enumerate}
 \item \mlrischref{sparc/emit/sparcMC.sml}{Sparc}
 \item \mlrischref{hppa/emit/hppaMC.sml}{Hppa}
 \item \mlrischref{alpha/emit/alphaMC.sml}{Alpha}
 \item \mlrischref{ppc/emit/ppcMC.sml}{Power PC}
 \item \mlrischref{x86/emit/x86MC.sml}{X86}
\end{enumerate}