v 20061020 1
C 40000 40000 0 0 0 title-B.sym
C 45800 45800 1 0 0 7400-1.sym
{
T 46300 46700 5 10 0 0 0 0 1
device=7400
T 46100 46700 5 10 1 1 0 0 1
refdes=U1
T 46300 48050 5 10 0 0 0 0 1
footprint=DIP14
T 45800 45800 5 10 0 0 0 0 1
slot=1
}
N 45400 46500 45800 46500 4
N 45400 46100 45800 46100 4
N 47100 46300 47400 46300 4
C 47400 45600 1 0 0 7400-1.sym
{
T 47900 46500 5 10 0 0 0 0 1
device=7400
T 47700 46500 5 10 1 1 0 0 1
refdes=U1
T 47900 47850 5 10 0 0 0 0 1
footprint=DIP14
T 47400 45600 5 10 0 0 0 0 1
slot=2
}
C 48900 45400 1 0 0 7400-1.sym
{
T 49400 46300 5 10 0 0 0 0 1
device=7400
T 49200 46300 5 10 1 1 0 0 1
refdes=U1
T 49400 47650 5 10 0 0 0 0 1
footprint=DIP14
T 48900 45400 5 10 0 0 0 0 1
slot=3
}
N 48700 46100 48900 46100 4
N 48900 45700 48800 45700 4
N 50200 45900 50500 45900 4
N 47200 45900 47400 45900 4
N 50500 45900 50500 44800 4
N 50500 44800 45400 44800 4
N 45400 44800 45400 46500 4
N 47200 45900 47200 46300 4
C 45000 46800 1 90 0 resistor-2.sym
{
T 44650 47200 5 10 0 0 90 0 1
device=RESISTOR
T 44700 47000 5 10 1 1 90 0 1
refdes=R1
}
C 45000 45700 1 90 0 resistor-2.sym
{
T 44650 46100 5 10 0 0 90 0 1
device=RESISTOR
T 44700 45900 5 10 1 1 90 0 1
refdes=R2
}
C 44800 45400 1 0 0 gnd-1.sym
C 44700 47700 1 0 0 vcc-1.sym
N 44900 46600 44900 46800 4
N 48800 45700 48800 46100 4