v["C2","1"]=v["unnamed_net2"];
v["R8","2"]=v["unnamed_net2"];
v["R3","1"]=v["Vbase2"];
v["C2","2"]=v["Vbase2"];
v["R4","2"]=v["Vbase2"];
v["Q2","2"]=v["Vbase2"];
v["CE2","2"]=v["Vem2"];
v["RE2","2"]=v["Vem2"];
v["Q2","1"]=v["Vem2"];
v["Cout","2"]=v["Vout"];
v["RL","2"]=v["Vout"];
v["Q2","3"]=v["VColl2"];
v["Cout","1"]=v["VColl2"];
v["RC2","1"]=v["VColl2"];
v["R4","1"]=v["GND"];
v["CE2","1"]=v["GND"];
v["RE2","1"]=v["GND"];
v["VCC","2"]=v["GND"];
v["Vinput","2"]=v["GND"];
v["CE1","1"]=v["GND"];
v["RL","1"]=v["GND"];
v["RE1","1"]=v["GND"];
v["R2","1"]=v["GND"];
v["R3","2"]=v["Vcc"];
v["RC1","2"]=v["Vcc"];
v["VCC","1"]=v["Vcc"];
v["RC2","2"]=v["Vcc"];
v["R1","2"]=v["Vcc"];
v["Vinput","1"]=v["Vin"];
v["R5","1"]=v["Vin"];
v["C1","1"]=v["unnamed_net1"];
v["R5","2"]=v["unnamed_net1"];
v["C1","2"]=v["Vbase1"];
v["R2","2"]=v["Vbase1"];
v["R1","1"]=v["Vbase1"];
v["Q1","2"]=v["Vbase1"];
v["CE1","2"]=v["Vem1"];
v["RE1","2"]=v["Vem1"];
v["Q1","1"]=v["Vem1"];
v["R8","1"]=v["Vcoll1"];
v["RC1","1"]=v["Vcoll1"];
v["Q1","3"]=v["Vcoll1"];
nodeEquations={
i["C2","1"]+i["R8","2"]==0,
i["R3","1"]+i["C2","2"]+i["R4","2"]+i["Q2","2"]==0,
i["CE2","2"]+i["RE2","2"]+i["Q2","1"]==0,
i["Cout","2"]+i["RL","2"]==0,
i["Q2","3"]+i["Cout","1"]+i["RC2","1"]==0,
i["R3","2"]+i["RC1","2"]+i["VCC","1"]+i["RC2","2"]+i["R1","2"]==0,
i["Vinput","1"]+i["R5","1"]==0,
i["C1","1"]+i["R5","2"]==0,
i["C1","2"]+i["R2","2"]+i["R1","1"]+i["Q1","2"]==0,
i["CE1","2"]+i["RE1","2"]+i["Q1","1"]==0,
i["R8","1"]+i["RC1","1"]+i["Q1","3"]==0};
modelEquations={
capacitor[value->2.2uF]["C2"],
resistor[value->2.8K]["R4"],
resistor[value->28K]["R3"],
resistor[value->1]["R8"],
capacitor[value->1pF]["CE2"],
resistor[value->100]["RE2"],
resistor[value->3.3K]["RC1"],
npn_transistor[value->q2]["Q2"],
capacitor[value->2.2uF]["C1"],
directive[value->.options TEMP=25]["A3"],
include[value->a2]["A2"],
model[value->a1]["A1"],
voltage_source[value->DC 15V]["VCC"],
vsin[value->DC 1.6V AC 10MV SIN(0 1MV 1KHZ)]["Vinput"],
capacitor[value->1pF]["CE1"],
capacitor[value->2.2uF]["Cout"],
resistor[value->100K]["RL"],
resistor[value->1K]["RC2"],
resistor[value->100]["RE1"],
resistor[value->2K]["R2"],
resistor[value->28K]["R1"],
resistor[value->10]["R5"],
npn_transistor[value->q1]["Q1"]};
variables={
v["unnamed_net2"],
v["Vbase2"],
v["Vem2"],
v["Vout"],
v["VColl2"],
v["Vcc"],
v["Vin"],
v["unnamed_net1"],
v["Vbase1"],
v["Vem1"],
v["Vcoll1"],
i["C2","1"],
i["R8","2"],
i["R3","1"],
i["C2","2"],
i["R4","2"],
i["Q2","2"],
i["CE2","2"],
i["RE2","2"],
i["Q2","1"],
i["Cout","2"],
i["RL","2"],
i["Q2","3"],
i["Cout","1"],
i["RC2","1"],
i["R4","1"],
i["CE2","1"],
i["RE2","1"],
i["VCC","2"],
i["Vinput","2"],
i["CE1","1"],
i["RL","1"],
i["RE1","1"],
i["R2","1"],
i["R3","2"],
i["RC1","2"],
i["VCC","1"],
i["RC2","2"],
i["R1","2"],
i["Vinput","1"],
i["R5","1"],
i["C1","1"],
i["R5","2"],
i["C1","2"],
i["R2","2"],
i["R1","1"],
i["Q1","2"],
i["CE1","2"],
i["RE1","2"],
i["Q1","1"],
i["R8","1"],
i["RC1","1"],
i["Q1","3"]};