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uhd-doc-3.7.2-3.mga5.noarch.rpm

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  <ul>
<li class="navelem"><a class="el" href="namespaceuhd.html">uhd</a></li><li class="navelem"><a class="el" href="namespaceuhd_1_1usrp.html">usrp</a></li><li class="navelem"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">multi_usrp</a></li>  </ul>
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<div class="title">uhd::usrp::multi_usrp Member List</div>  </div>
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<p>This is the complete list of members for <a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a>, including all inherited members.</p>
<table class="directory">
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#afeaca319029cb49f7041461345ab641c">ALL_CHANS</a></td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a524b7e2177492e59382f1124ee32c12b">ALL_GAINS</a></td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a21f2ba01462e1f211a8823fda24a82d5">ALL_MBOARDS</a></td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a607aee766d21228a7aaabde2771eb46f">clear_command_time</a>(size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a1e7f679b2f273f7d38eeb1d92e801796">get_clock_source</a>(const size_t mboard)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a3e1022d151717e49ce69c987bd07b243">get_clock_sources</a>(const size_t mboard)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ac425be38f8e2a3463de440e1f2ae1b6d">get_device</a>(void)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ac63a5b45ca3cc3d74db51a384bba8c2e">get_fe_rx_freq_range</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ad5418609a1d90f8deb21419bf78fec0f">get_fe_tx_freq_range</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#aa4e489ed15e7e0f613242c0b942d6130">get_gpio_attr</a>(const std::string &amp;bank, const std::string &amp;attr, const size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a5e1c95bbcd0d62af48852a7048393491">get_gpio_banks</a>(const size_t mboard)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#aeefd7580630b2baa4e4c90df3a36d9f0">get_master_clock_rate</a>(size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#abf885b8812408f9ebd471f2902d1cb70">get_mboard_name</a>(size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a2d3c327bcb83fd274e05e3ca95d1ac95">get_mboard_sensor</a>(const std::string &amp;name, size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a3a72259c19b80512dba02e40ed5cf028">get_mboard_sensor_names</a>(size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ae4efbbc6480fba44939b34c78d44d7e9">get_num_mboards</a>(void)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#aa22581d58fdf451c3b118add31a6822c">get_pp_string</a>(void)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ad2d35d85aebebfdd2d14cee2850243af">get_rx_antenna</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7c1202c5cc978663182adec8c07d8521">get_rx_antennas</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a90d7826c7b96aed88c74ffc035b7f0dd">get_rx_bandwidth</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#af71672f89943c87a87f03821e5c185c5">get_rx_bandwidth_range</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a3299d8f77f1d823c762e36438bac509e">get_rx_dboard_iface</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#adb1c803658f18006efc1dcd67de6d493">get_rx_freq</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a9a5ed2146ac31e641839d00a53df784d">get_rx_freq_range</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a4c406b7964f4cc18dc5b57cafcb345c1">get_rx_gain</a>(const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a6483b85f90a3f46d8181a9b57be1db46">get_rx_gain</a>(size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a496745114d83049ed3d0f5fc96e87b2a">get_rx_gain_names</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7e077fc7331f7675aa796e030bd8a03e">get_rx_gain_range</a>(const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7eb3245ee320e9889a477ba753fd8b8c">get_rx_gain_range</a>(size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a54dc279c0f3a034ea1a5d80ebd8c4b35">get_rx_lo_locked</a>(size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#afac94be28eadeccb9c230ce839e072e3">get_rx_num_channels</a>(void)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a9bf580742d260257bd7e280666423dc9">get_rx_rate</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a6c4200ca796a8c70737b180087f8f93c">get_rx_rates</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#acd37d327931cec64e3701eb2a5aa7bfb">get_rx_sensor</a>(const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a87d3d097b6cb1cfa940896e71e5f44ad">get_rx_sensor_names</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a55757381c5114d25f003db7005469fae">get_rx_stream</a>(const stream_args_t &amp;args)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a35004bc7e6d418c2c46b2ca0f34db2e6">get_rx_subdev_name</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a8bacd1b1109656d21da6d5e5f8d417c9">get_rx_subdev_spec</a>(size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a55ce95415df2de14a048fca5a04ada03">get_time_last_pps</a>(size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#afb4bffe3f969c11ee7c0a2cba5178780">get_time_now</a>(size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a181262333352a82888af00933d07c3cf">get_time_source</a>(const size_t mboard)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#aee040da1b7ae375e0c08bb0b080d7ccc">get_time_sources</a>(const size_t mboard)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#acf70237b38918a4b93c37280f6c648b1">get_time_synchronized</a>(void)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7f3e6094ff76cc3d0630e46cb291bcfd">get_tx_antenna</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a38b10a6bd2128b3810da229c60b31aa1">get_tx_antennas</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a227fd46437f562b8f8f6d4a98cd1c5dc">get_tx_bandwidth</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#abebc07fa60f37453a8ac3d6ff2fc7aec">get_tx_bandwidth_range</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#abe3261f1f763a026707dea80ac466d1c">get_tx_dboard_iface</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a9ac9b0e10e67d967c06e8dd6511b5919">get_tx_freq</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a898502a489319cd64230bb0e50d9ab0a">get_tx_freq_range</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ae88320fb12dd6ebfc4b9f6bc4074f11b">get_tx_gain</a>(const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a612c00086f9968380bcf51f877b544b7">get_tx_gain</a>(size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a9f5589722a2a1491fc393a6b98f094b0">get_tx_gain_names</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ab99753a578657046f7a0ce72f666abdc">get_tx_gain_range</a>(const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a6ec9889b9b64d1d8e2a308c0b0c328ec">get_tx_gain_range</a>(size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#af8a7f16e35466a50e7a8a4e71b3598fb">get_tx_lo_locked</a>(size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a3be03eb72575c9d5526c93dd133e96d3">get_tx_num_channels</a>(void)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a2b75c9dd5ad3c9378f079f4950b043dd">get_tx_rate</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a36270e66858e63bd8c887fc127782fb5">get_tx_rates</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a482d52c0983c6db913209e57f9b79c3a">get_tx_sensor</a>(const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a33a556057ceabc00ab2af61525f206fd">get_tx_sensor_names</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a0cda6dd9bec82f11d7883d5f2dca4613">get_tx_stream</a>(const stream_args_t &amp;args)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a4b0632b6ddff26e9d0bd22990274f99d">get_tx_subdev_name</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a070b4bb3cf27436fb9104a414bc9f3f7">get_tx_subdev_spec</a>(size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a1dadf323c5f00ac4f93b231adc13e34c">get_usrp_rx_info</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#af1b87120ea1f5d9e9d894843a9416578">get_usrp_tx_info</a>(size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#afe50c2b24273d1b3b2a343b73609b310">issue_stream_cmd</a>(const stream_cmd_t &amp;stream_cmd, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#af0d3809a8f8dcd3c962ad5b9a0a6456c">make</a>(const device_addr_t &amp;dev_addr)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a1337a38862d6eb27db0aabe30977d8d1">read_rssi</a>(size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#aceddf575752fda1a8cc75513a1178fd9">set_clock_config</a>(const clock_config_t &amp;clock_config, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a73ed40009d0d3787c183d42423d25026">set_clock_source</a>(const std::string &amp;source, const size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a60445c1a52e4763b6ebbbfce2db96569">set_clock_source_out</a>(const bool enb, const size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a191b78b00d051d3d51c2f719361c1fb5">set_command_time</a>(const uhd::time_spec_t &amp;time_spec, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ab89ea68eed1d97c713a38dfa17bfb7c8">set_gpio_attr</a>(const std::string &amp;bank, const std::string &amp;attr, const boost::uint32_t value, const boost::uint32_t mask=0xffffffff, const size_t mboard=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a99254abfa5259b70a020e667eee619b9">set_master_clock_rate</a>(double rate, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a72b7947cb0c434b98e9915f91b8f8fe0">set_rx_antenna</a>(const std::string &amp;ant, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a4e026819f286e69c48c2e1956d95c6fb">set_rx_bandwidth</a>(double bandwidth, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7beb49c1a04a81b3e7569db482453746">set_rx_dc_offset</a>(const bool enb, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a8b8212c1131a34823430c9bdec9c183f">set_rx_dc_offset</a>(const std::complex&lt; double &gt; &amp;offset, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a9b61448f392466e20572fdcb042e8ec6">set_rx_freq</a>(const tune_request_t &amp;tune_request, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ad602e7681b796deddd9231f022ffef11">set_rx_gain</a>(double gain, const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a8234968ad1fefef299ef9541cc193915">set_rx_gain</a>(double gain, size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7ccd212322a5da010ba79f9f18561156">set_rx_iq_balance</a>(const std::complex&lt; double &gt; &amp;correction, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a587cfb5be38a16fec532793b34fbf947">set_rx_rate</a>(double rate, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7f94ed00059cc7dd30567d031b3f9679">set_rx_subdev_spec</a>(const uhd::usrp::subdev_spec_t &amp;spec, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a75b1c5375549e6a446d686ee7d9b4e14">set_time_next_pps</a>(const time_spec_t &amp;time_spec, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a351a2c3081944a0d2caab95e2a2f0926">set_time_now</a>(const time_spec_t &amp;time_spec, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a57a5580ba06d7d6a037c9ef64f1ea361">set_time_source</a>(const std::string &amp;source, const size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a3a1a4bf21fb32bf761204ce0561b5aa7">set_time_source_out</a>(const bool enb, const size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a413014bf3aea4a8ea2d268b4a3b390e9">set_time_unknown_pps</a>(const time_spec_t &amp;time_spec)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a4e8cd16aa93bf3375cdcd3daca3b6b24">set_tx_antenna</a>(const std::string &amp;ant, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ad04bfc300735435a7937d4eb37e5523d">set_tx_bandwidth</a>(double bandwidth, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a263ab7f0364c03e8a6e330c546769e4f">set_tx_dc_offset</a>(const std::complex&lt; double &gt; &amp;offset, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ae7a674a9d012a78dd4f2ded478839124">set_tx_freq</a>(const tune_request_t &amp;tune_request, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a41cc3c774451d0a2c5f69cd8df0f9f06">set_tx_gain</a>(double gain, const std::string &amp;name, size_t chan=0)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a1101dc00b016fe91a299cbcae8b12053">set_tx_gain</a>(double gain, size_t chan=0)</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">inline</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ad938e609a11773e21611ee86a0e1b1c5">set_tx_iq_balance</a>(const std::complex&lt; double &gt; &amp;correction, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#ab8bc17744d3ee94b7c5cdcb75457bd6b">set_tx_rate</a>(double rate, size_t chan=ALL_CHANS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a3b8d9d9fb9a1ec51e81a207cd299e517">set_tx_subdev_spec</a>(const uhd::usrp::subdev_spec_t &amp;spec, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a7c74905c18e464b8b3f59fb2dd70dbf3">set_user_register</a>(const boost::uint8_t addr, const boost::uint32_t data, size_t mboard=ALL_MBOARDS)=0</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"><span class="mlabel">pure virtual</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html#a9d9112f5eac0b53a721f2a6c97021fc1">sptr</a> typedef</td><td class="entry"><a class="el" href="classuhd_1_1usrp_1_1multi__usrp.html">uhd::usrp::multi_usrp</a></td><td class="entry"></td></tr>
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