<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Source to the Rust file `libcore/../stdsimd/coresimd/aarch64/neon.rs`."><meta name="keywords" content="rust, rustlang, rust-lang"><title>neon.rs.html -- source</title><link rel="stylesheet" type="text/css" href="../../../../../../normalize.css"><link rel="stylesheet" type="text/css" href="../../../../../../rustdoc.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../../../../../../dark.css"><link rel="stylesheet" type="text/css" href="../../../../../../light.css" id="themeStyle"><script src="../../../../../../storage.js"></script><link rel="shortcut icon" href="https://doc.rust-lang.org/favicon.ico"></head><body class="rustdoc source"><!--[if lte IE 8]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="sidebar"><div class="sidebar-menu">☰</div><a href='../../../../../../core/index.html'><img src='https://www.rust-lang.org/logos/rust-logo-128x128-blk-v2.png' alt='logo' width='100'></a></nav><div class="theme-picker"><button id="theme-picker" aria-label="Pick another theme!"><img src="../../../../../../brush.svg" width="18" alt="Pick another theme!"></button><div id="theme-choices"></div></div><script src="../../../../../../theme.js"></script><nav class="sub"><form class="search-form js-only"><div class="search-container"><input class="search-input" name="search" autocomplete="off" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"><a id="settings-menu" href="../../../../../../settings.html"><img src="../../../../../../wheel.svg" width="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><pre class="line-numbers"><span id="1"> 1</span>
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</pre><pre class="rust ">
<span class="doccomment">//! ARMv8 ASIMD intrinsics</span>
<span class="comment">// FIXME: replace neon with asimd</span>
<span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arm</span>::<span class="kw-2">*</span>;
<span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">simd</span>::<span class="kw-2">*</span>;
<span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">simd_llvm</span>::<span class="ident">simd_add</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">assert_instr</span>;
<span class="macro">types</span><span class="macro">!</span> {
<span class="doccomment">/// ARM-specific 64-bit wide vector of one packed `f64`.</span>
<span class="kw">pub</span> <span class="kw">struct</span> <span class="ident">float64x1_t</span>(<span class="ident">f64</span>); <span class="comment">// FIXME: check this!</span>
<span class="doccomment">/// ARM-specific 128-bit wide vector of two packed `f64`.</span>
<span class="kw">pub</span> <span class="kw">struct</span> <span class="ident">float64x2_t</span>(<span class="ident">f64</span>, <span class="ident">f64</span>);
}
<span class="macro">impl_from_bits_</span><span class="macro">!</span>(
<span class="ident">float64x1_t</span>: <span class="ident">u32x2</span>,
<span class="ident">i32x2</span>,
<span class="ident">f32x2</span>,
<span class="ident">m32x2</span>,
<span class="ident">u16x4</span>,
<span class="ident">i16x4</span>,
<span class="ident">m16x4</span>,
<span class="ident">u8x8</span>,
<span class="ident">i8x8</span>,
<span class="ident">m8x8</span>
);
<span class="macro">impl_from_bits_</span><span class="macro">!</span>(
<span class="ident">float64x2_t</span>: <span class="ident">u64x2</span>,
<span class="ident">i64x2</span>,
<span class="ident">f64x2</span>,
<span class="ident">m64x2</span>,
<span class="ident">u32x4</span>,
<span class="ident">i32x4</span>,
<span class="ident">f32x4</span>,
<span class="ident">m32x4</span>,
<span class="ident">u16x8</span>,
<span class="ident">i16x8</span>,
<span class="ident">m16x8</span>,
<span class="ident">u8x16</span>,
<span class="ident">i8x16</span>,
<span class="ident">m8x16</span>
);
<span class="attribute">#[<span class="ident">allow</span>(<span class="ident">improper_ctypes</span>)]</span>
<span class="kw">extern</span> <span class="string">"C"</span> {
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxv.i8.v8i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxv_s8_</span>(<span class="ident">a</span>: <span class="ident">int8x8_t</span>) <span class="op">-></span> <span class="ident">i8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxv.i8.6i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_s8_</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">i8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxv.i16.v4i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxv_s16_</span>(<span class="ident">a</span>: <span class="ident">int16x4_t</span>) <span class="op">-></span> <span class="ident">i16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxv.i16.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_s16_</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">i16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxv.i32.v2i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxv_s32_</span>(<span class="ident">a</span>: <span class="ident">int32x2_t</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxv.i32.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_s32_</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxv.i8.v8i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxv_u8_</span>(<span class="ident">a</span>: <span class="ident">uint8x8_t</span>) <span class="op">-></span> <span class="ident">u8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxv.i8.6i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_u8_</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">u8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxv.i16.v4i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxv_u16_</span>(<span class="ident">a</span>: <span class="ident">uint16x4_t</span>) <span class="op">-></span> <span class="ident">u16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxv.i16.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_u16_</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">u16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxv.i32.v2i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxv_u32_</span>(<span class="ident">a</span>: <span class="ident">uint32x2_t</span>) <span class="op">-></span> <span class="ident">u32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxv.i32.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_u32_</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">u32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fmaxv.f32.v2f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxv_f32_</span>(<span class="ident">a</span>: <span class="ident">float32x2_t</span>) <span class="op">-></span> <span class="ident">f32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fmaxv.f32.v4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_f32_</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">f32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fmaxv.f64.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">vmaxvq_f64_</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">f64</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminv.i8.v8i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminv_s8_</span>(<span class="ident">a</span>: <span class="ident">int8x8_t</span>) <span class="op">-></span> <span class="ident">i8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminv.i8.6i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_s8_</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">i8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminv.i16.v4i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminv_s16_</span>(<span class="ident">a</span>: <span class="ident">int16x4_t</span>) <span class="op">-></span> <span class="ident">i16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminv.i16.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_s16_</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">i16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminv.i32.v2i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminv_s32_</span>(<span class="ident">a</span>: <span class="ident">int32x2_t</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminv.i32.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_s32_</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminv.i8.v8i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminv_u8_</span>(<span class="ident">a</span>: <span class="ident">uint8x8_t</span>) <span class="op">-></span> <span class="ident">u8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminv.i8.6i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_u8_</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">u8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminv.i16.v4i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminv_u16_</span>(<span class="ident">a</span>: <span class="ident">uint16x4_t</span>) <span class="op">-></span> <span class="ident">u16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminv.i16.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_u16_</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">u16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminv.i32.v2i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminv_u32_</span>(<span class="ident">a</span>: <span class="ident">uint32x2_t</span>) <span class="op">-></span> <span class="ident">u32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminv.i32.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_u32_</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">u32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fminv.f32.v2f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminv_f32_</span>(<span class="ident">a</span>: <span class="ident">float32x2_t</span>) <span class="op">-></span> <span class="ident">f32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fminv.f32.v4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_f32_</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">f32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fminv.f64.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">vminvq_f64_</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">f64</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminp.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_s8_</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>, <span class="ident">b</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">int8x16_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminp.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_s16_</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>, <span class="ident">b</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">int16x8_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.sminp.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_s32_</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>, <span class="ident">b</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">int32x4_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminp.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_u8_</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>, <span class="ident">b</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">uint8x16_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminp.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_u16_</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>, <span class="ident">b</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">uint16x8_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.uminp.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_u32_</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>, <span class="ident">b</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">uint32x4_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fminp.4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_f32_</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>, <span class="ident">b</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">float32x4_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fminp.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpminq_f64_</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>, <span class="ident">b</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">float64x2_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxp.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_s8_</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>, <span class="ident">b</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">int8x16_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxp.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_s16_</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>, <span class="ident">b</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">int16x8_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.smaxp.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_s32_</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>, <span class="ident">b</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">int32x4_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxp.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_u8_</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>, <span class="ident">b</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">uint8x16_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxp.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_u16_</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>, <span class="ident">b</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">uint16x8_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.umaxp.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_u32_</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>, <span class="ident">b</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">uint32x4_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fmaxp.4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_f32_</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>, <span class="ident">b</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">float32x4_t</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.aarch64.neon.fmaxp.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">vpmaxq_f64_</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>, <span class="ident">b</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">float64x2_t</span>;
}
<span class="doccomment">/// Vector add.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fadd</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vadd_f64</span>(<span class="ident">a</span>: <span class="ident">float64x1_t</span>, <span class="ident">b</span>: <span class="ident">float64x1_t</span>) <span class="op">-></span> <span class="ident">float64x1_t</span> {
<span class="ident">simd_add</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Vector add.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fadd</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vaddq_f64</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>, <span class="ident">b</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">float64x2_t</span> {
<span class="ident">simd_add</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Vector add.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vaddd_s64</span>(<span class="ident">a</span>: <span class="ident">int64x1_t</span>, <span class="ident">b</span>: <span class="ident">int64x1_t</span>) <span class="op">-></span> <span class="ident">int64x1_t</span> {
<span class="ident">simd_add</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Vector add.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vaddd_u64</span>(<span class="ident">a</span>: <span class="ident">uint64x1_t</span>, <span class="ident">b</span>: <span class="ident">uint64x1_t</span>) <span class="op">-></span> <span class="ident">uint64x1_t</span> {
<span class="ident">simd_add</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxv_s8</span>(<span class="ident">a</span>: <span class="ident">int8x8_t</span>) <span class="op">-></span> <span class="ident">i8</span> {
<span class="ident">vmaxv_s8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_s8</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">i8</span> {
<span class="ident">vmaxvq_s8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxv_s16</span>(<span class="ident">a</span>: <span class="ident">int16x4_t</span>) <span class="op">-></span> <span class="ident">i16</span> {
<span class="ident">vmaxv_s16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_s16</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">i16</span> {
<span class="ident">vmaxvq_s16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxv_s32</span>(<span class="ident">a</span>: <span class="ident">int32x2_t</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="ident">vmaxv_s32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_s32</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="ident">vmaxvq_s32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxv_u8</span>(<span class="ident">a</span>: <span class="ident">uint8x8_t</span>) <span class="op">-></span> <span class="ident">u8</span> {
<span class="ident">vmaxv_u8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_u8</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">u8</span> {
<span class="ident">vmaxvq_u8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxv_u16</span>(<span class="ident">a</span>: <span class="ident">uint16x4_t</span>) <span class="op">-></span> <span class="ident">u16</span> {
<span class="ident">vmaxv_u16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_u16</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">u16</span> {
<span class="ident">vmaxvq_u16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxv_u32</span>(<span class="ident">a</span>: <span class="ident">uint32x2_t</span>) <span class="op">-></span> <span class="ident">u32</span> {
<span class="ident">vmaxv_u32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_u32</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">u32</span> {
<span class="ident">vmaxvq_u32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fmaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxv_f32</span>(<span class="ident">a</span>: <span class="ident">float32x2_t</span>) <span class="op">-></span> <span class="ident">f32</span> {
<span class="ident">vmaxv_f32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fmaxv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_f32</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">f32</span> {
<span class="ident">vmaxvq_f32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector max.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fmaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vmaxvq_f64</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">f64</span> {
<span class="ident">vmaxvq_f64_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminv_s8</span>(<span class="ident">a</span>: <span class="ident">int8x8_t</span>) <span class="op">-></span> <span class="ident">i8</span> {
<span class="ident">vminv_s8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_s8</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">i8</span> {
<span class="ident">vminvq_s8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminv_s16</span>(<span class="ident">a</span>: <span class="ident">int16x4_t</span>) <span class="op">-></span> <span class="ident">i16</span> {
<span class="ident">vminv_s16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_s16</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">i16</span> {
<span class="ident">vminvq_s16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminv_s32</span>(<span class="ident">a</span>: <span class="ident">int32x2_t</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="ident">vminv_s32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_s32</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="ident">vminvq_s32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminv_u8</span>(<span class="ident">a</span>: <span class="ident">uint8x8_t</span>) <span class="op">-></span> <span class="ident">u8</span> {
<span class="ident">vminv_u8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_u8</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">u8</span> {
<span class="ident">vminvq_u8_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminv_u16</span>(<span class="ident">a</span>: <span class="ident">uint16x4_t</span>) <span class="op">-></span> <span class="ident">u16</span> {
<span class="ident">vminv_u16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_u16</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">u16</span> {
<span class="ident">vminvq_u16_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminv_u32</span>(<span class="ident">a</span>: <span class="ident">uint32x2_t</span>) <span class="op">-></span> <span class="ident">u32</span> {
<span class="ident">vminv_u32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_u32</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">u32</span> {
<span class="ident">vminvq_u32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminv_f32</span>(<span class="ident">a</span>: <span class="ident">float32x2_t</span>) <span class="op">-></span> <span class="ident">f32</span> {
<span class="ident">vminv_f32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fminv</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_f32</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">f32</span> {
<span class="ident">vminvq_f32_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Horizontal vector min.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vminvq_f64</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">f64</span> {
<span class="ident">vminvq_f64_</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_s8</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>, <span class="ident">b</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">int8x16_t</span> {
<span class="ident">vpminq_s8_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_s16</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>, <span class="ident">b</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">int16x8_t</span> {
<span class="ident">vpminq_s16_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">sminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_s32</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>, <span class="ident">b</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">int32x4_t</span> {
<span class="ident">vpminq_s32_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_u8</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>, <span class="ident">b</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">uint8x16_t</span> {
<span class="ident">vpminq_u8_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_u16</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>, <span class="ident">b</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">uint16x8_t</span> {
<span class="ident">vpminq_u16_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">uminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_u32</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>, <span class="ident">b</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">uint32x4_t</span> {
<span class="ident">vpminq_u32_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_f32</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>, <span class="ident">b</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">float32x4_t</span> {
<span class="ident">vpminq_f32_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding minimum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fminp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpminq_f64</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>, <span class="ident">b</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">float64x2_t</span> {
<span class="ident">vpminq_f64_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_s8</span>(<span class="ident">a</span>: <span class="ident">int8x16_t</span>, <span class="ident">b</span>: <span class="ident">int8x16_t</span>) <span class="op">-></span> <span class="ident">int8x16_t</span> {
<span class="ident">vpmaxq_s8_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_s16</span>(<span class="ident">a</span>: <span class="ident">int16x8_t</span>, <span class="ident">b</span>: <span class="ident">int16x8_t</span>) <span class="op">-></span> <span class="ident">int16x8_t</span> {
<span class="ident">vpmaxq_s16_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">smaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_s32</span>(<span class="ident">a</span>: <span class="ident">int32x4_t</span>, <span class="ident">b</span>: <span class="ident">int32x4_t</span>) <span class="op">-></span> <span class="ident">int32x4_t</span> {
<span class="ident">vpmaxq_s32_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_u8</span>(<span class="ident">a</span>: <span class="ident">uint8x16_t</span>, <span class="ident">b</span>: <span class="ident">uint8x16_t</span>) <span class="op">-></span> <span class="ident">uint8x16_t</span> {
<span class="ident">vpmaxq_u8_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_u16</span>(<span class="ident">a</span>: <span class="ident">uint16x8_t</span>, <span class="ident">b</span>: <span class="ident">uint16x8_t</span>) <span class="op">-></span> <span class="ident">uint16x8_t</span> {
<span class="ident">vpmaxq_u16_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">umaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_u32</span>(<span class="ident">a</span>: <span class="ident">uint32x4_t</span>, <span class="ident">b</span>: <span class="ident">uint32x4_t</span>) <span class="op">-></span> <span class="ident">uint32x4_t</span> {
<span class="ident">vpmaxq_u32_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fmaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_f32</span>(<span class="ident">a</span>: <span class="ident">float32x4_t</span>, <span class="ident">b</span>: <span class="ident">float32x4_t</span>) <span class="op">-></span> <span class="ident">float32x4_t</span> {
<span class="ident">vpmaxq_f32_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="doccomment">/// Folding maximum of adjacent pairs</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">fmaxp</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">vpmaxq_f64</span>(<span class="ident">a</span>: <span class="ident">float64x2_t</span>, <span class="ident">b</span>: <span class="ident">float64x2_t</span>) <span class="op">-></span> <span class="ident">float64x2_t</span> {
<span class="ident">vpmaxq_f64_</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">mod</span> <span class="ident">tests</span> {
<span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">aarch64</span>::<span class="kw-2">*</span>;
<span class="kw">use</span> <span class="ident">simd</span>::<span class="kw-2">*</span>;
<span class="kw">use</span> <span class="ident">std</span>::<span class="ident">mem</span>;
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">simd_test</span>;
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vadd_f64</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="number">1.</span>;
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="number">8.</span>;
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="number">9.</span>;
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">f64</span> <span class="op">=</span>
<span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">vadd_f64</span>(<span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">a</span>), <span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">b</span>)));
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vaddq_f64</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">2.</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">8.</span>, <span class="number">7.</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">9.</span>, <span class="number">9.</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">f64x2</span> <span class="op">=</span> <span class="ident">vaddq_f64</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vaddd_s64</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="number">1_i64</span>;
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="number">8_i64</span>;
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="number">9_i64</span>;
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">i64</span> <span class="op">=</span>
<span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">vaddd_s64</span>(<span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">a</span>), <span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">b</span>)));
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vaddd_u64</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="number">1_u64</span>;
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="number">8_u64</span>;
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="number">9_u64</span>;
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">u64</span> <span class="op">=</span>
<span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">vaddd_u64</span>(<span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">a</span>), <span class="ident">mem</span>::<span class="ident">transmute</span>(<span class="ident">b</span>)));
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxv_s8</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxv_s8</span>(<span class="ident">i8x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="op">-</span><span class="number">8</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">7_i8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_s8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">rustfmt_skip</span>)]</span>
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_s8</span>(<span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>,
<span class="op">-</span><span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>,
<span class="number">8</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
<span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">8_i8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxv_s16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxv_s16</span>(<span class="ident">i16x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="op">-</span><span class="number">4</span>, <span class="number">3</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">3_i16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_s16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_s16</span>(<span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">7</span>, <span class="number">4</span>, <span class="op">-</span><span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">7_i16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxv_s32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxv_s32</span>(<span class="ident">i32x2</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="op">-</span><span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_i32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_s32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_s32</span>(<span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="op">-</span><span class="number">32</span>, <span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">4_i32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxv_u8</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxv_u8</span>(<span class="ident">u8x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">8</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">8_u8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_u8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">rustfmt_skip</span>)]</span>
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_u8</span>(<span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>,
<span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>,
<span class="number">8</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
<span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">16_u8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxv_u16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxv_u16</span>(<span class="ident">u16x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">3</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">4_u16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_u16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_u16</span>(<span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">7</span>, <span class="number">4</span>, <span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">16_u16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxv_u32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxv_u32</span>(<span class="ident">u32x2</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">4_u32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_u32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_u32</span>(<span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">32</span>, <span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">32_u32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxv_f32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxv_f32</span>(<span class="ident">f32x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">4.</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">4_f32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_f32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_f32</span>(<span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">2.</span>, <span class="number">32.</span>, <span class="number">4.</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">32_f32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vmaxvq_f64</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vmaxvq_f64</span>(<span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">4.</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">4_f64</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminv_s8</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminv_s8</span>(<span class="ident">i8x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="op">-</span><span class="number">8</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="op">-</span><span class="number">8_i8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_s8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">rustfmt_skip</span>)]</span>
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_s8</span>(<span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>,
<span class="op">-</span><span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>,
<span class="number">8</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
<span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="op">-</span><span class="number">16_i8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminv_s16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminv_s16</span>(<span class="ident">i16x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="op">-</span><span class="number">4</span>, <span class="number">3</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="op">-</span><span class="number">4_i16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_s16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_s16</span>(<span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">7</span>, <span class="number">4</span>, <span class="op">-</span><span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="op">-</span><span class="number">16_i16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminv_s32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminv_s32</span>(<span class="ident">i32x2</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="op">-</span><span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="op">-</span><span class="number">4_i32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_s32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_s32</span>(<span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="op">-</span><span class="number">32</span>, <span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="op">-</span><span class="number">32_i32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminv_u8</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminv_u8</span>(<span class="ident">u8x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">8</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_u8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_u8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">rustfmt_skip</span>)]</span>
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_u8</span>(<span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>,
<span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>,
<span class="number">8</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
<span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>, <span class="number">1</span>,
).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_u8</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminv_u16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminv_u16</span>(<span class="ident">u16x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">3</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_u16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_u16</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_u16</span>(<span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">7</span>, <span class="number">4</span>, <span class="number">16</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">5</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_u16</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminv_u32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminv_u32</span>(<span class="ident">u32x2</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_u32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_u32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_u32</span>(<span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">32</span>, <span class="number">4</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_u32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminv_f32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminv_f32</span>(<span class="ident">f32x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">4.</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_f32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_f32</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_f32</span>(<span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">2.</span>, <span class="number">32.</span>, <span class="number">4.</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_f32</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vminvq_f64</span>() {
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">vminvq_f64</span>(<span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">4.</span>).<span class="ident">into_bits</span>());
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">1_f64</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpminq_s8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="op">-</span><span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>,
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>,
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="op">-</span><span class="number">2</span>, <span class="op">-</span><span class="number">4</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">1</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>,
<span class="number">0</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>, <span class="number">0</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>,
);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">i8x16</span> <span class="op">=</span> <span class="ident">vpminq_s8</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpminq_s16</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">0</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">i16x8</span> <span class="op">=</span> <span class="ident">vpminq_s16</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpminq_s32</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="number">0</span>, <span class="number">2</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">i32x4</span> <span class="op">=</span> <span class="ident">vpminq_s32</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpminq_u8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>,
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>,
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">1</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>,
<span class="number">0</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>, <span class="number">0</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>,
);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">u8x16</span> <span class="op">=</span> <span class="ident">vpminq_u8</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpminq_u16</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">0</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">u16x8</span> <span class="op">=</span> <span class="ident">vpminq_u16</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpminq_u32</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">3</span>, <span class="number">0</span>, <span class="number">2</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">u32x4</span> <span class="op">=</span> <span class="ident">vpminq_u32</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmin_f32</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="op">-</span><span class="number">2.</span>, <span class="number">3.</span>, <span class="number">4.</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="number">0.</span>, <span class="number">3.</span>, <span class="number">2.</span>, <span class="number">5.</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="op">-</span><span class="number">2.</span>, <span class="number">3.</span>, <span class="number">0.</span>, <span class="number">2.</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">f32x4</span> <span class="op">=</span> <span class="ident">vpminq_f32</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmin_f64</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="op">-</span><span class="number">2.</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">0.</span>, <span class="number">3.</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="op">-</span><span class="number">2.</span>, <span class="number">0.</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">f64x2</span> <span class="op">=</span> <span class="ident">vpminq_f64</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmaxq_s8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="op">-</span><span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>,
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>,
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">i8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">3</span>, <span class="number">6</span>, <span class="number">8</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>, <span class="number">8</span>,
<span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">9</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">9</span>,
);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">i8x16</span> <span class="op">=</span> <span class="ident">vpmaxq_s8</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmaxq_s16</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">i16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">4</span>, <span class="number">6</span>, <span class="number">8</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">9</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">i16x8</span> <span class="op">=</span> <span class="ident">vpmaxq_s16</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmaxq_s32</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="op">-</span><span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">i32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">4</span>, <span class="number">3</span>, <span class="number">5</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">i32x4</span> <span class="op">=</span> <span class="ident">vpmaxq_s32</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmaxq_u8</span>() {
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>,
<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>,
<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>
);
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">rustfmt</span>, <span class="ident">skip</span>)]</span>
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">u8x16</span>::<span class="ident">new</span>(
<span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>, <span class="number">8</span>, <span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>, <span class="number">8</span>,
<span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">9</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">9</span>,
);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">u8x16</span> <span class="op">=</span> <span class="ident">vpmaxq_u8</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmaxq_u16</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>, <span class="number">4</span>, <span class="number">7</span>, <span class="number">6</span>, <span class="number">9</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">u16x8</span>::<span class="ident">new</span>(<span class="number">2</span>, <span class="number">4</span>, <span class="number">6</span>, <span class="number">8</span>, <span class="number">3</span>, <span class="number">5</span>, <span class="number">7</span>, <span class="number">9</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">u16x8</span> <span class="op">=</span> <span class="ident">vpmaxq_u16</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmaxq_u32</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">0</span>, <span class="number">3</span>, <span class="number">2</span>, <span class="number">5</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">u32x4</span>::<span class="ident">new</span>(<span class="number">2</span>, <span class="number">4</span>, <span class="number">3</span>, <span class="number">5</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">u32x4</span> <span class="op">=</span> <span class="ident">vpmaxq_u32</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmax_f32</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="op">-</span><span class="number">2.</span>, <span class="number">3.</span>, <span class="number">4.</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="number">0.</span>, <span class="number">3.</span>, <span class="number">2.</span>, <span class="number">5.</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">f32x4</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">4.</span>, <span class="number">3.</span>, <span class="number">5.</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">f32x4</span> <span class="op">=</span> <span class="ident">vpmaxq_f32</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"neon"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_vpmax_f64</span>() {
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="op">-</span><span class="number">2.</span>);
<span class="kw">let</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">0.</span>, <span class="number">3.</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">f64x2</span>::<span class="ident">new</span>(<span class="number">1.</span>, <span class="number">3.</span>);
<span class="kw">let</span> <span class="ident">r</span>: <span class="ident">f64x2</span> <span class="op">=</span> <span class="ident">vpmaxq_f64</span>(<span class="ident">a</span>.<span class="ident">into_bits</span>(), <span class="ident">b</span>.<span class="ident">into_bits</span>()).<span class="ident">into_bits</span>();
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="ident">e</span>);
}
}
</pre>
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