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</pre><pre class="rust ">
<span class="doccomment">//! 32-bit wide portable packed vector types.</span>
<span class="macro">simd_i_ty</span><span class="macro">!</span> {
<span class="ident">i16x2</span>: <span class="number">2</span>, <span class="ident">i16</span>, <span class="ident">m16x2</span>, <span class="ident">i16x2_tests</span>, <span class="ident">test_v32</span> <span class="op">|</span>
<span class="ident">i16</span>, <span class="ident">i16</span> <span class="op">|</span>
<span class="ident">x0</span>, <span class="ident">x1</span> <span class="op">|</span>
<span class="doccomment">/// A 32-bit wide vector with 2 `i16` lanes.</span>
}
<span class="macro">simd_u_ty</span><span class="macro">!</span> {
<span class="ident">u16x2</span>: <span class="number">2</span>, <span class="ident">u16</span>, <span class="ident">m16x2</span>, <span class="ident">u16x2_tests</span>, <span class="ident">test_v32</span> <span class="op">|</span>
<span class="ident">u16</span>, <span class="ident">u16</span> <span class="op">|</span>
<span class="ident">x0</span>, <span class="ident">x1</span> <span class="op">|</span>
<span class="doccomment">/// A 32-bit wide vector with 2 `u16` lanes.</span>
}
<span class="macro">simd_m_ty</span><span class="macro">!</span> {
<span class="ident">m16x2</span>: <span class="number">2</span>, <span class="ident">i16</span>, <span class="ident">m16x2_tests</span>, <span class="ident">test_v32</span> <span class="op">|</span>
<span class="ident">i16</span>, <span class="ident">i16</span> <span class="op">|</span>
<span class="ident">x0</span>, <span class="ident">x1</span> <span class="op">|</span>
<span class="doccomment">/// A 32-bit wide vector mask with 2 lanes.</span>
}
<span class="macro">simd_i_ty</span><span class="macro">!</span> {
<span class="ident">i8x4</span>: <span class="number">4</span>, <span class="ident">i8</span>, <span class="ident">m8x4</span>, <span class="ident">i8x4_tests</span>, <span class="ident">test_v32</span> <span class="op">|</span>
<span class="ident">i8</span>, <span class="ident">i8</span>, <span class="ident">i8</span>, <span class="ident">i8</span> <span class="op">|</span>
<span class="ident">x0</span>, <span class="ident">x1</span>, <span class="ident">x2</span>, <span class="ident">x3</span> <span class="op">|</span>
<span class="doccomment">/// A 32-bit wide vector with 4 `i8` lanes.</span>
}
<span class="macro">simd_u_ty</span><span class="macro">!</span> {
<span class="ident">u8x4</span>: <span class="number">4</span>, <span class="ident">u8</span>, <span class="ident">m8x4</span>, <span class="ident">u8x4_tests</span>, <span class="ident">test_v32</span> <span class="op">|</span>
<span class="ident">u8</span>, <span class="ident">u8</span>, <span class="ident">u8</span>, <span class="ident">u8</span> <span class="op">|</span>
<span class="ident">x0</span>, <span class="ident">x1</span>, <span class="ident">x2</span>, <span class="ident">x3</span> <span class="op">|</span>
<span class="doccomment">/// A 32-bit wide vector with 4 `u8` lanes.</span>
}
<span class="macro">simd_m_ty</span><span class="macro">!</span> {
<span class="ident">m8x4</span>: <span class="number">4</span>, <span class="ident">i8</span>, <span class="ident">m8x4_tests</span>, <span class="ident">test_v32</span> <span class="op">|</span>
<span class="ident">i8</span>, <span class="ident">i8</span>, <span class="ident">i8</span>, <span class="ident">i8</span> <span class="op">|</span>
<span class="ident">x0</span>, <span class="ident">x1</span>, <span class="ident">x2</span>, <span class="ident">x3</span> <span class="op">|</span>
<span class="doccomment">/// A 32-bit wide vector mask 4 lanes.</span>
}
<span class="macro">impl_from_bits</span><span class="macro">!</span>(
<span class="ident">i16x2</span>: <span class="ident">i16</span>,
<span class="ident">i16x2_from_bits</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">u16x2</span>,
<span class="ident">m16x2</span>,
<span class="ident">i8x4</span>,
<span class="ident">u8x4</span>,
<span class="ident">m8x4</span>
);
<span class="macro">impl_from_bits</span><span class="macro">!</span>(
<span class="ident">u16x2</span>: <span class="ident">u16</span>,
<span class="ident">u16x2_from_bits</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">i16x2</span>,
<span class="ident">m16x2</span>,
<span class="ident">i8x4</span>,
<span class="ident">u8x4</span>,
<span class="ident">m8x4</span>
);
<span class="macro">impl_from_bits</span><span class="macro">!</span>(
<span class="ident">i8x4</span>: <span class="ident">i8</span>,
<span class="ident">i8x2_from_bits</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">i16x2</span>,
<span class="ident">u16x2</span>,
<span class="ident">m16x2</span>,
<span class="ident">u8x4</span>,
<span class="ident">m8x4</span>
);
<span class="macro">impl_from_bits</span><span class="macro">!</span>(
<span class="ident">u8x4</span>: <span class="ident">u8</span>,
<span class="ident">u8x2_from_bits</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">i16x2</span>,
<span class="ident">u16x2</span>,
<span class="ident">m16x2</span>,
<span class="ident">i8x4</span>,
<span class="ident">m8x4</span>
);
<span class="macro">impl_from</span><span class="macro">!</span>(
<span class="ident">i16x2</span>: <span class="ident">i16</span>,
<span class="ident">i16x2_from</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">f64x2</span>,
<span class="ident">u64x2</span>,
<span class="ident">i64x2</span>,
<span class="ident">m64x2</span>,
<span class="ident">f32x2</span>,
<span class="ident">u32x2</span>,
<span class="ident">i32x2</span>,
<span class="ident">m32x2</span>,
<span class="ident">u16x2</span>,
<span class="ident">m16x2</span>,
<span class="ident">u8x2</span>,
<span class="ident">i8x2</span>,
<span class="ident">m8x2</span>
);
<span class="macro">impl_from</span><span class="macro">!</span>(
<span class="ident">u16x2</span>: <span class="ident">u16</span>,
<span class="ident">u16x2_from</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">f64x2</span>,
<span class="ident">u64x2</span>,
<span class="ident">i64x2</span>,
<span class="ident">m64x2</span>,
<span class="ident">f32x2</span>,
<span class="ident">u32x2</span>,
<span class="ident">i32x2</span>,
<span class="ident">m32x2</span>,
<span class="ident">i16x2</span>,
<span class="ident">m16x2</span>,
<span class="ident">u8x2</span>,
<span class="ident">i8x2</span>,
<span class="ident">m8x2</span>
);
<span class="macro">impl_from</span><span class="macro">!</span>(
<span class="ident">i8x4</span>: <span class="ident">i8</span>,
<span class="ident">i8x4_from</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">f64x4</span>,
<span class="ident">u64x4</span>,
<span class="ident">i64x4</span>,
<span class="ident">m64x4</span>,
<span class="ident">u32x4</span>,
<span class="ident">i32x4</span>,
<span class="ident">f32x4</span>,
<span class="ident">m32x4</span>,
<span class="ident">u16x4</span>,
<span class="ident">i16x4</span>,
<span class="ident">m16x4</span>,
<span class="ident">u8x4</span>,
<span class="ident">m8x4</span>
);
<span class="macro">impl_from</span><span class="macro">!</span>(
<span class="ident">u8x4</span>: <span class="ident">u8</span>,
<span class="ident">u8x4_from</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">f64x4</span>,
<span class="ident">u64x4</span>,
<span class="ident">i64x4</span>,
<span class="ident">m64x4</span>,
<span class="ident">u32x4</span>,
<span class="ident">i32x4</span>,
<span class="ident">f32x4</span>,
<span class="ident">m32x4</span>,
<span class="ident">u16x4</span>,
<span class="ident">i16x4</span>,
<span class="ident">m16x4</span>,
<span class="ident">i8x4</span>,
<span class="ident">m8x4</span>
);
<span class="macro">impl_from</span><span class="macro">!</span>(
<span class="ident">m8x4</span>: <span class="ident">i8</span>,
<span class="ident">m8x4_from</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">m64x4</span>,
<span class="ident">m32x4</span>,
<span class="ident">m16x4</span>
);
<span class="macro">impl_from</span><span class="macro">!</span>(
<span class="ident">m16x2</span>: <span class="ident">i16</span>,
<span class="ident">m16x2_from</span>,
<span class="ident">test_v32</span> <span class="op">|</span> <span class="ident">m64x2</span>,
<span class="ident">m32x2</span>,
<span class="ident">m8x2</span>
);
</pre>
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