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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Source to the Rust file `libcore/../stdsimd/coresimd/x86/rdtsc.rs`."><meta name="keywords" content="rust, rustlang, rust-lang"><title>rdtsc.rs.html -- source</title><link rel="stylesheet" type="text/css" href="../../../../../../normalize.css"><link rel="stylesheet" type="text/css" href="../../../../../../rustdoc.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../../../../../../dark.css"><link rel="stylesheet" type="text/css" href="../../../../../../light.css" id="themeStyle"><script src="../../../../../../storage.js"></script><link rel="shortcut icon" href="https://doc.rust-lang.org/favicon.ico"></head><body class="rustdoc source"><!--[if lte IE 8]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="sidebar"><div class="sidebar-menu">&#9776;</div><a href='../../../../../../core/index.html'><img src='https://www.rust-lang.org/logos/rust-logo-128x128-blk-v2.png' alt='logo' width='100'></a></nav><div class="theme-picker"><button id="theme-picker" aria-label="Pick another theme!"><img src="../../../../../../brush.svg" width="18" alt="Pick another theme!"></button><div id="theme-choices"></div></div><script src="../../../../../../theme.js"></script><nav class="sub"><form class="search-form js-only"><div class="search-container"><input class="search-input" name="search" autocomplete="off" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"><a id="settings-menu" href="../../../../../../settings.html"><img src="../../../../../../wheel.svg" width="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><pre class="line-numbers"><span id="1"> 1</span>
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<span class="doccomment">//! RDTSC instructions.</span>

<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">assert_instr</span>;

<span class="doccomment">/// Reads the current value of the processor’s time-stamp counter.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The processor monotonically increments the time-stamp counter MSR</span>
<span class="doccomment">/// every clock cycle and resets it to 0 whenever the processor is</span>
<span class="doccomment">/// reset.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The RDTSC instruction is not a serializing instruction. It does</span>
<span class="doccomment">/// not necessarily wait until all previous instructions have been</span>
<span class="doccomment">/// executed before reading the counter. Similarly, subsequent</span>
<span class="doccomment">/// instructions may begin execution before the read operation is</span>
<span class="doccomment">/// performed.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// On processors that support the Intel 64 architecture, the</span>
<span class="doccomment">/// high-order 32 bits of each of RAX and RDX are cleared.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel&#39;s documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_rdtsc)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">rdtsc</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">&quot;simd_x86&quot;</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">&quot;1.27.0&quot;</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_rdtsc</span>() <span class="op">-&gt;</span> <span class="ident">i64</span> {
    <span class="ident">rdtsc</span>()
}

<span class="doccomment">/// Reads the current value of the processor’s time-stamp counter and</span>
<span class="doccomment">/// the `IA32_TSC_AUX MSR`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The processor monotonically increments the time-stamp counter MSR</span>
<span class="doccomment">/// every clock cycle and resets it to 0 whenever the processor is</span>
<span class="doccomment">/// reset.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The RDTSCP instruction waits until all previous instructions have</span>
<span class="doccomment">/// been executed before reading the counter. However, subsequent</span>
<span class="doccomment">/// instructions may begin execution before the read operation is</span>
<span class="doccomment">/// performed.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// On processors that support the Intel 64 architecture, the</span>
<span class="doccomment">/// high-order 32 bits of each of RAX, RDX, and RCX are cleared.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel&#39;s documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=__rdtscp)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">rdtscp</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">&quot;simd_x86&quot;</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">&quot;1.27.0&quot;</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">__rdtscp</span>(<span class="ident">aux</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u32</span>) <span class="op">-&gt;</span> <span class="ident">u64</span> {
    <span class="ident">rdtscp</span>(<span class="ident">aux</span> <span class="kw">as</span> <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="kw">_</span>)
}

<span class="attribute">#[<span class="ident">allow</span>(<span class="ident">improper_ctypes</span>)]</span>
<span class="kw">extern</span> <span class="string">&quot;C&quot;</span> {
    <span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">&quot;llvm.x86.rdtsc&quot;</span>]</span>
    <span class="kw">fn</span> <span class="ident">rdtsc</span>() <span class="op">-&gt;</span> <span class="ident">i64</span>;
    <span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">&quot;llvm.x86.rdtscp&quot;</span>]</span>
    <span class="kw">fn</span> <span class="ident">rdtscp</span>(<span class="ident">aux</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>) <span class="op">-&gt;</span> <span class="ident">u64</span>;
}

<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">mod</span> <span class="ident">tests</span> {
    <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">x86</span>::<span class="ident">rdtsc</span>;
    <span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">simd_test</span>;

    <span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">&quot;sse2&quot;</span>)]</span>
    <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_rdtsc</span>() {
        <span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">rdtsc</span>::<span class="ident">_rdtsc</span>();
        <span class="macro">assert_ne</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">0</span>); <span class="comment">// The chances of this being 0 are infinitesimal</span>
    }

    <span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">&quot;sse2&quot;</span>)]</span>
    <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_rdtscp</span>() {
        <span class="kw">let</span> <span class="kw-2">mut</span> <span class="ident">aux</span> <span class="op">=</span> <span class="number">0</span>;
        <span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">rdtsc</span>::<span class="ident">__rdtscp</span>(<span class="kw-2">&amp;</span><span class="kw-2">mut</span> <span class="ident">aux</span>);
        <span class="macro">assert_ne</span><span class="macro">!</span>(<span class="ident">r</span>, <span class="number">0</span>); <span class="comment">// The chances of this being 0 are infinitesimal</span>
    }
}
</pre>
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