<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Source to the Rust file `libcore/../stdsimd/coresimd/x86/xsave.rs`."><meta name="keywords" content="rust, rustlang, rust-lang"><title>xsave.rs.html -- source</title><link rel="stylesheet" type="text/css" href="../../../../../../normalize.css"><link rel="stylesheet" type="text/css" href="../../../../../../rustdoc.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../../../../../../dark.css"><link rel="stylesheet" type="text/css" href="../../../../../../light.css" id="themeStyle"><script src="../../../../../../storage.js"></script><link rel="shortcut icon" href="https://doc.rust-lang.org/favicon.ico"></head><body class="rustdoc source"><!--[if lte IE 8]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="sidebar"><div class="sidebar-menu">☰</div><a href='../../../../../../core/index.html'><img src='https://www.rust-lang.org/logos/rust-logo-128x128-blk-v2.png' alt='logo' width='100'></a></nav><div class="theme-picker"><button id="theme-picker" aria-label="Pick another theme!"><img src="../../../../../../brush.svg" width="18" alt="Pick another theme!"></button><div id="theme-choices"></div></div><script src="../../../../../../theme.js"></script><nav class="sub"><form class="search-form js-only"><div class="search-container"><input class="search-input" name="search" autocomplete="off" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"><a id="settings-menu" href="../../../../../../settings.html"><img src="../../../../../../wheel.svg" width="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><pre class="line-numbers"><span id="1"> 1</span>
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</pre><pre class="rust ">
<span class="doccomment">//! `i586`'s `xsave` and `xsaveopt` target feature intrinsics</span>
<span class="attribute">#![<span class="ident">cfg_attr</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"cargo-clippy"</span>, <span class="ident">allow</span>(<span class="ident">stutter</span>))]</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">assert_instr</span>;
<span class="attribute">#[<span class="ident">allow</span>(<span class="ident">improper_ctypes</span>)]</span>
<span class="kw">extern</span> <span class="string">"C"</span> {
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsave"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsave</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xrstor"</span>]</span>
<span class="kw">fn</span> <span class="ident">xrstor</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsetbv"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsetbv</span>(<span class="ident">v</span>: <span class="ident">u32</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsaveopt"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsaveopt</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsavec"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsavec</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsaves"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsaves</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xrstors"</span>]</span>
<span class="kw">fn</span> <span class="ident">xrstors</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
}
<span class="doccomment">/// Perform a full or partial save of the enabled processor states to memory at</span>
<span class="doccomment">/// `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// State is saved based on bits `[62:0]` in `save_mask` and XCR0.</span>
<span class="doccomment">/// `mem_addr` must be aligned on a 64-byte boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The format of the XSAVE area is detailed in Section 13.4, “XSAVE Area,” of</span>
<span class="doccomment">/// Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsave)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsave</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsave</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsave</span>(
<span class="ident">mem_addr</span>,
(<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>,
<span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>,
);
}
<span class="doccomment">/// Perform a full or partial restore of the enabled processor states using</span>
<span class="doccomment">/// the state information stored in memory at `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// State is restored based on bits `[62:0]` in `rs_mask`, `XCR0`, and</span>
<span class="doccomment">/// `mem_addr.HEADER.XSTATE_BV`. `mem_addr` must be aligned on a 64-byte</span>
<span class="doccomment">/// boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xrstor)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xrstor</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xrstor</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">rs_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xrstor</span>(<span class="ident">mem_addr</span>, (<span class="ident">rs_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">rs_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="doccomment">/// `XFEATURE_ENABLED_MASK` for `XCR`</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This intrinsic maps to `XSETBV` instruction.</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">const</span> <span class="ident">_XCR_XFEATURE_ENABLED_MASK</span>: <span class="ident">u32</span> <span class="op">=</span> <span class="number">0</span>;
<span class="doccomment">/// Copy 64-bits from `val` to the extended control register (`XCR`) specified</span>
<span class="doccomment">/// by `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Currently only `XFEATURE_ENABLED_MASK` `XCR` is supported.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsetbv)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsetbv</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsetbv</span>(<span class="ident">a</span>: <span class="ident">u32</span>, <span class="ident">val</span>: <span class="ident">u64</span>) {
<span class="ident">xsetbv</span>(<span class="ident">a</span>, (<span class="ident">val</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">val</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="doccomment">/// Reads the contents of the extended control register `XCR`</span>
<span class="doccomment">/// specified in `xcr_no`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xgetbv)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xgetbv</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xgetbv</span>(<span class="ident">xcr_no</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">u64</span> {
<span class="kw">let</span> <span class="ident">eax</span>: <span class="ident">u32</span>;
<span class="kw">let</span> <span class="ident">edx</span>: <span class="ident">u32</span>;
<span class="macro">asm</span><span class="macro">!</span>(<span class="string">"xgetbv"</span> : <span class="string">"={eax}"</span>(<span class="ident">eax</span>), <span class="string">"={edx}"</span>(<span class="ident">edx</span>) : <span class="string">"{ecx}"</span>(<span class="ident">xcr_no</span>));
((<span class="ident">edx</span> <span class="kw">as</span> <span class="ident">u64</span>) <span class="op"><<</span> <span class="number">32</span>) <span class="op">|</span> (<span class="ident">eax</span> <span class="kw">as</span> <span class="ident">u64</span>)
}
<span class="doccomment">/// Perform a full or partial save of the enabled processor states to memory at</span>
<span class="doccomment">/// `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// State is saved based on bits `[62:0]` in `save_mask` and `XCR0`.</span>
<span class="doccomment">/// `mem_addr` must be aligned on a 64-byte boundary. The hardware may optimize</span>
<span class="doccomment">/// the manner in which data is saved. The performance of this instruction will</span>
<span class="doccomment">/// be equal to or better than using the `XSAVE` instruction.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsaveopt)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsaveopt"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsaveopt</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsaveopt</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsaveopt</span>(
<span class="ident">mem_addr</span>,
(<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>,
<span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>,
);
}
<span class="doccomment">/// Perform a full or partial save of the enabled processor states to memory</span>
<span class="doccomment">/// at `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// `xsavec` differs from `xsave` in that it uses compaction and that it may</span>
<span class="doccomment">/// use init optimization. State is saved based on bits `[62:0]` in `save_mask`</span>
<span class="doccomment">/// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsavec)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsavec"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsavec</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsavec</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsavec</span>(
<span class="ident">mem_addr</span>,
(<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>,
<span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>,
);
}
<span class="doccomment">/// Perform a full or partial save of the enabled processor states to memory at</span>
<span class="doccomment">/// `mem_addr`</span>
<span class="doccomment">///</span>
<span class="doccomment">/// `xsaves` differs from xsave in that it can save state components</span>
<span class="doccomment">/// corresponding to bits set in `IA32_XSS` `MSR` and that it may use the</span>
<span class="doccomment">/// modified optimization. State is saved based on bits `[62:0]` in `save_mask`</span>
<span class="doccomment">/// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsaves)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsaves"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsaves</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsaves</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsaves</span>(
<span class="ident">mem_addr</span>,
(<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>,
<span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>,
);
}
<span class="doccomment">/// Perform a full or partial restore of the enabled processor states using the</span>
<span class="doccomment">/// state information stored in memory at `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// `xrstors` differs from `xrstor` in that it can restore state components</span>
<span class="doccomment">/// corresponding to bits set in the `IA32_XSS` `MSR`; `xrstors` cannot restore</span>
<span class="doccomment">/// from an `xsave` area in which the extended region is in the standard form.</span>
<span class="doccomment">/// State is restored based on bits `[62:0]` in `rs_mask`, `XCR0`, and</span>
<span class="doccomment">/// `mem_addr.HEADER.XSTATE_BV`. `mem_addr` must be aligned on a 64-byte</span>
<span class="doccomment">/// boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xrstors)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsaves"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xrstors</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xrstors</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">rs_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xrstors</span>(<span class="ident">mem_addr</span>, (<span class="ident">rs_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">rs_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">mod</span> <span class="ident">tests</span> {
<span class="kw">use</span> <span class="ident">std</span>::<span class="ident">fmt</span>;
<span class="kw">use</span> <span class="ident">std</span>::<span class="ident">prelude</span>::<span class="ident">v1</span>::<span class="kw-2">*</span>;
<span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">x86</span>::<span class="kw-2">*</span>;
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">simd_test</span>;
<span class="attribute">#[<span class="ident">repr</span>(<span class="ident">align</span>(<span class="number">64</span>))]</span>
<span class="kw">struct</span> <span class="ident">XsaveArea</span> {
<span class="comment">// max size for 256-bit registers is 800 bytes:</span>
<span class="comment">// see https://software.intel.com/en-us/node/682996</span>
<span class="comment">// max size for 512-bit registers is 2560 bytes:</span>
<span class="comment">// FIXME: add source</span>
<span class="ident">data</span>: [<span class="ident">u8</span>; <span class="number">2560</span>],
}
<span class="kw">impl</span> <span class="ident">XsaveArea</span> {
<span class="kw">fn</span> <span class="ident">new</span>() <span class="op">-></span> <span class="ident">XsaveArea</span> {
<span class="ident">XsaveArea</span> {
<span class="ident">data</span>: [<span class="number">0</span>; <span class="number">2560</span>],
}
}
<span class="kw">fn</span> <span class="ident">ptr</span>(<span class="kw-2">&</span><span class="kw-2">mut</span> <span class="self">self</span>) <span class="op">-></span> <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span> {
<span class="kw-2">&</span><span class="kw-2">mut</span> <span class="self">self</span>.<span class="ident">data</span>[<span class="number">0</span>] <span class="kw">as</span> <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="kw">_</span> <span class="kw">as</span> <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>
}
}
<span class="kw">impl</span> <span class="ident">PartialEq</span><span class="op"><</span><span class="ident">XsaveArea</span><span class="op">></span> <span class="kw">for</span> <span class="ident">XsaveArea</span> {
<span class="kw">fn</span> <span class="ident">eq</span>(<span class="kw-2">&</span><span class="self">self</span>, <span class="ident">other</span>: <span class="kw-2">&</span><span class="ident">XsaveArea</span>) <span class="op">-></span> <span class="ident">bool</span> {
<span class="kw">for</span> <span class="ident">i</span> <span class="kw">in</span> <span class="number">0</span>..<span class="self">self</span>.<span class="ident">data</span>.<span class="ident">len</span>() {
<span class="kw">if</span> <span class="self">self</span>.<span class="ident">data</span>[<span class="ident">i</span>] <span class="op">!=</span> <span class="ident">other</span>.<span class="ident">data</span>[<span class="ident">i</span>] {
<span class="kw">return</span> <span class="bool-val">false</span>;
}
}
<span class="bool-val">true</span>
}
}
<span class="kw">impl</span> <span class="ident">fmt</span>::<span class="ident">Debug</span> <span class="kw">for</span> <span class="ident">XsaveArea</span> {
<span class="kw">fn</span> <span class="ident">fmt</span>(<span class="kw-2">&</span><span class="self">self</span>, <span class="ident">f</span>: <span class="kw-2">&</span><span class="kw-2">mut</span> <span class="ident">fmt</span>::<span class="ident">Formatter</span>) <span class="op">-></span> <span class="ident">fmt</span>::<span class="prelude-ty">Result</span> {
<span class="macro">write</span><span class="macro">!</span>(<span class="ident">f</span>, <span class="string">"["</span>)<span class="question-mark">?</span>;
<span class="kw">for</span> <span class="ident">i</span> <span class="kw">in</span> <span class="number">0</span>..<span class="self">self</span>.<span class="ident">data</span>.<span class="ident">len</span>() {
<span class="macro">write</span><span class="macro">!</span>(<span class="ident">f</span>, <span class="string">"{}"</span>, <span class="self">self</span>.<span class="ident">data</span>[<span class="ident">i</span>])<span class="question-mark">?</span>;
<span class="kw">if</span> <span class="ident">i</span> <span class="op">!=</span> <span class="self">self</span>.<span class="ident">data</span>.<span class="ident">len</span>() <span class="op">-</span> <span class="number">1</span> {
<span class="macro">write</span><span class="macro">!</span>(<span class="ident">f</span>, <span class="string">", "</span>)<span class="question-mark">?</span>;
}
}
<span class="macro">write</span><span class="macro">!</span>(<span class="ident">f</span>, <span class="string">"]"</span>)
}
}
<span class="comment">// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209</span>
<span class="comment">/*
#[simd_test(enable = "xsave")]
unsafe fn xsave() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
let mut b = XsaveArea::new();
_xsave(a.ptr(), m);
_xrstor(a.ptr(), m);
_xsave(b.ptr(), m);
assert_eq!(a, b);
}
*/</span>
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">xgetbv_xsetbv</span>() {
<span class="kw">let</span> <span class="ident">xcr_n</span>: <span class="ident">u32</span> <span class="op">=</span> <span class="ident">_XCR_XFEATURE_ENABLED_MASK</span>;
<span class="kw">let</span> <span class="ident">xcr</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="ident">_xgetbv</span>(<span class="ident">xcr_n</span>);
<span class="comment">// FIXME: XSETBV is a privileged instruction we should only test this</span>
<span class="comment">// when running in privileged mode:</span>
<span class="comment">//</span>
<span class="comment">// _xsetbv(xcr_n, xcr);</span>
<span class="kw">let</span> <span class="ident">xcr_cpy</span>: <span class="ident">u64</span> <span class="op">=</span> <span class="ident">_xgetbv</span>(<span class="ident">xcr_n</span>);
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">xcr</span>, <span class="ident">xcr_cpy</span>);
}
<span class="comment">// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209</span>
<span class="comment">/*
#[simd_test(enable = "xsave,xsaveopt")]
unsafe fn xsaveopt() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
let mut b = XsaveArea::new();
_xsaveopt(a.ptr(), m);
_xrstor(a.ptr(), m);
_xsaveopt(b.ptr(), m);
assert_eq!(a, b);
}
*/</span>
<span class="comment">// FIXME: this looks like a bug in Intel's SDE:</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">not</span>(<span class="ident">stdsimd_intel_sde</span>))]</span>
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsavec"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">xsavec</span>() {
<span class="kw">let</span> <span class="ident">m</span> <span class="op">=</span> <span class="number">0xFFFFFFFFFFFFFFFF_u64</span>; <span class="comment">//< all registers</span>
<span class="kw">let</span> <span class="kw-2">mut</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">XsaveArea</span>::<span class="ident">new</span>();
<span class="kw">let</span> <span class="kw-2">mut</span> <span class="ident">b</span> <span class="op">=</span> <span class="ident">XsaveArea</span>::<span class="ident">new</span>();
<span class="ident">_xsavec</span>(<span class="ident">a</span>.<span class="ident">ptr</span>(), <span class="ident">m</span>);
<span class="ident">_xrstor</span>(<span class="ident">a</span>.<span class="ident">ptr</span>(), <span class="ident">m</span>);
<span class="ident">_xsavec</span>(<span class="ident">b</span>.<span class="ident">ptr</span>(), <span class="ident">m</span>);
<span class="macro">assert_eq</span><span class="macro">!</span>(<span class="ident">a</span>, <span class="ident">b</span>);
}
<span class="comment">// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209</span>
<span class="comment">/*
#[simd_test(enable = "xsave,xsaves")]
unsafe fn xsaves() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
let mut b = XsaveArea::new();
_xsaves(a.ptr(), m);
_xrstors(a.ptr(), m);
_xsaves(b.ptr(), m);
assert_eq!(a, b);
}
*/</span>
}
</pre>
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