<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Source to the Rust file `libcore/../stdsimd/coresimd/x86_64/sse.rs`."><meta name="keywords" content="rust, rustlang, rust-lang"><title>sse.rs.html -- source</title><link rel="stylesheet" type="text/css" href="../../../../../../normalize.css"><link rel="stylesheet" type="text/css" href="../../../../../../rustdoc.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../../../../../../dark.css"><link rel="stylesheet" type="text/css" href="../../../../../../light.css" id="themeStyle"><script src="../../../../../../storage.js"></script><link rel="shortcut icon" href="https://doc.rust-lang.org/favicon.ico"></head><body class="rustdoc source"><!--[if lte IE 8]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="sidebar"><div class="sidebar-menu">☰</div><a href='../../../../../../core/index.html'><img src='https://www.rust-lang.org/logos/rust-logo-128x128-blk-v2.png' alt='logo' width='100'></a></nav><div class="theme-picker"><button id="theme-picker" aria-label="Pick another theme!"><img src="../../../../../../brush.svg" width="18" alt="Pick another theme!"></button><div id="theme-choices"></div></div><script src="../../../../../../theme.js"></script><nav class="sub"><form class="search-form js-only"><div class="search-container"><input class="search-input" name="search" autocomplete="off" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"><a id="settings-menu" href="../../../../../../settings.html"><img src="../../../../../../wheel.svg" width="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><pre class="line-numbers"><span id="1"> 1</span>
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</pre><pre class="rust ">
<span class="doccomment">//! `x86_64` Streaming SIMD Extensions (SSE)</span>
<span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">x86</span>::<span class="kw-2">*</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">assert_instr</span>;
<span class="attribute">#[<span class="ident">allow</span>(<span class="ident">improper_ctypes</span>)]</span>
<span class="kw">extern</span> <span class="string">"C"</span> {
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.sse.cvtss2si64"</span>]</span>
<span class="kw">fn</span> <span class="ident">cvtss2si64</span>(<span class="ident">a</span>: <span class="ident">__m128</span>) <span class="op">-></span> <span class="ident">i64</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.sse.cvttss2si64"</span>]</span>
<span class="kw">fn</span> <span class="ident">cvttss2si64</span>(<span class="ident">a</span>: <span class="ident">__m128</span>) <span class="op">-></span> <span class="ident">i64</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.sse.cvtsi642ss"</span>]</span>
<span class="kw">fn</span> <span class="ident">cvtsi642ss</span>(<span class="ident">a</span>: <span class="ident">__m128</span>, <span class="ident">b</span>: <span class="ident">i64</span>) <span class="op">-></span> <span class="ident">__m128</span>;
}
<span class="doccomment">/// Convert the lowest 32 bit float in the input vector to a 64 bit integer.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The result is rounded according to the current rounding mode. If the result</span>
<span class="doccomment">/// cannot be represented as a 64 bit integer the result will be</span>
<span class="doccomment">/// `0x8000_0000_0000_0000` (`std::i64::MIN`) or trigger an invalid operation</span>
<span class="doccomment">/// floating point exception if unmasked (see</span>
<span class="doccomment">/// [`_mm_setcsr`](fn._mm_setcsr.html)).</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This corresponds to the `CVTSS2SI` instruction (with 64 bit output).</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtss_si64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"sse"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">cvtss2si</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_mm_cvtss_si64</span>(<span class="ident">a</span>: <span class="ident">__m128</span>) <span class="op">-></span> <span class="ident">i64</span> {
<span class="ident">cvtss2si64</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Convert the lowest 32 bit float in the input vector to a 64 bit integer</span>
<span class="doccomment">/// with truncation.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The result is rounded always using truncation (round towards zero). If the</span>
<span class="doccomment">/// result cannot be represented as a 64 bit integer the result will be</span>
<span class="doccomment">/// `0x8000_0000_0000_0000` (`std::i64::MIN`) or an invalid operation floating</span>
<span class="doccomment">/// point exception if unmasked (see [`_mm_setcsr`](fn._mm_setcsr.html)).</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This corresponds to the `CVTTSS2SI` instruction (with 64 bit output).</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvttss_si64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"sse"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">cvttss2si</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_mm_cvttss_si64</span>(<span class="ident">a</span>: <span class="ident">__m128</span>) <span class="op">-></span> <span class="ident">i64</span> {
<span class="ident">cvttss2si64</span>(<span class="ident">a</span>)
}
<span class="doccomment">/// Convert a 64 bit integer to a 32 bit float. The result vector is the input</span>
<span class="doccomment">/// vector `a` with the lowest 32 bit float replaced by the converted integer.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This intrinsic corresponds to the `CVTSI2SS` instruction (with 64 bit</span>
<span class="doccomment">/// input).</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtsi64_ss)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"sse"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">cvtsi2ss</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_mm_cvtsi64_ss</span>(<span class="ident">a</span>: <span class="ident">__m128</span>, <span class="ident">b</span>: <span class="ident">i64</span>) <span class="op">-></span> <span class="ident">__m128</span> {
<span class="ident">cvtsi642ss</span>(<span class="ident">a</span>, <span class="ident">b</span>)
}
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">mod</span> <span class="ident">tests</span> {
<span class="kw">use</span> <span class="ident">std</span>::<span class="ident">f32</span>::<span class="ident">NAN</span>;
<span class="kw">use</span> <span class="ident">std</span>::<span class="ident">i64</span>::<span class="ident">MIN</span>;
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">simd_test</span>;
<span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">x86_64</span>::<span class="kw-2">*</span>;
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"sse"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_mm_cvtss_si64</span>() {
<span class="kw">let</span> <span class="ident">inputs</span> <span class="op">=</span> <span class="kw-2">&</span>[
(<span class="number">42.0f32</span>, <span class="number">42i64</span>),
(<span class="op">-</span><span class="number">31.4</span>, <span class="op">-</span><span class="number">31</span>),
(<span class="op">-</span><span class="number">33.5</span>, <span class="op">-</span><span class="number">34</span>),
(<span class="op">-</span><span class="number">34.5</span>, <span class="op">-</span><span class="number">34</span>),
(<span class="number">4.0e10</span>, <span class="number">40_000_000_000</span>),
(<span class="number">4.0e-10</span>, <span class="number">0</span>),
(<span class="ident">NAN</span>, <span class="ident">MIN</span>),
(<span class="number">2147483500.1</span>, <span class="number">2147483520</span>),
(<span class="number">9.223371e18</span>, <span class="number">9223370937343148032</span>),
];
<span class="kw">for</span> <span class="ident">i</span> <span class="kw">in</span> <span class="number">0</span>..<span class="ident">inputs</span>.<span class="ident">len</span>() {
<span class="kw">let</span> (<span class="ident">xi</span>, <span class="ident">e</span>) <span class="op">=</span> <span class="ident">inputs</span>[<span class="ident">i</span>];
<span class="kw">let</span> <span class="ident">x</span> <span class="op">=</span> <span class="ident">_mm_setr_ps</span>(<span class="ident">xi</span>, <span class="number">1.0</span>, <span class="number">3.0</span>, <span class="number">4.0</span>);
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">_mm_cvtss_si64</span>(<span class="ident">x</span>);
<span class="macro">assert_eq</span><span class="macro">!</span>(
<span class="ident">e</span>, <span class="ident">r</span>,
<span class="string">"TestCase #{} _mm_cvtss_si64({:?}) = {}, expected: {}"</span>,
<span class="ident">i</span>, <span class="ident">x</span>, <span class="ident">r</span>, <span class="ident">e</span>
);
}
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"sse"</span>)]</span>
<span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_mm_cvttss_si64</span>() {
<span class="kw">let</span> <span class="ident">inputs</span> <span class="op">=</span> <span class="kw-2">&</span>[
(<span class="number">42.0f32</span>, <span class="number">42i64</span>),
(<span class="op">-</span><span class="number">31.4</span>, <span class="op">-</span><span class="number">31</span>),
(<span class="op">-</span><span class="number">33.5</span>, <span class="op">-</span><span class="number">33</span>),
(<span class="op">-</span><span class="number">34.5</span>, <span class="op">-</span><span class="number">34</span>),
(<span class="number">10.999</span>, <span class="number">10</span>),
(<span class="op">-</span><span class="number">5.99</span>, <span class="op">-</span><span class="number">5</span>),
(<span class="number">4.0e10</span>, <span class="number">40_000_000_000</span>),
(<span class="number">4.0e-10</span>, <span class="number">0</span>),
(<span class="ident">NAN</span>, <span class="ident">MIN</span>),
(<span class="number">2147483500.1</span>, <span class="number">2147483520</span>),
(<span class="number">9.223371e18</span>, <span class="number">9223370937343148032</span>),
(<span class="number">9.223372e18</span>, <span class="ident">MIN</span>),
];
<span class="kw">for</span> <span class="ident">i</span> <span class="kw">in</span> <span class="number">0</span>..<span class="ident">inputs</span>.<span class="ident">len</span>() {
<span class="kw">let</span> (<span class="ident">xi</span>, <span class="ident">e</span>) <span class="op">=</span> <span class="ident">inputs</span>[<span class="ident">i</span>];
<span class="kw">let</span> <span class="ident">x</span> <span class="op">=</span> <span class="ident">_mm_setr_ps</span>(<span class="ident">xi</span>, <span class="number">1.0</span>, <span class="number">3.0</span>, <span class="number">4.0</span>);
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">_mm_cvttss_si64</span>(<span class="ident">x</span>);
<span class="macro">assert_eq</span><span class="macro">!</span>(
<span class="ident">e</span>, <span class="ident">r</span>,
<span class="string">"TestCase #{} _mm_cvttss_si64({:?}) = {}, expected: {}"</span>,
<span class="ident">i</span>, <span class="ident">x</span>, <span class="ident">r</span>, <span class="ident">e</span>
);
}
}
<span class="attribute">#[<span class="ident">simd_test</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"sse"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">test_mm_cvtsi64_ss</span>() {
<span class="kw">let</span> <span class="ident">inputs</span> <span class="op">=</span> <span class="kw-2">&</span>[
(<span class="number">4555i64</span>, <span class="number">4555.0f32</span>),
(<span class="number">322223333</span>, <span class="number">322223330.0</span>),
(<span class="op">-</span><span class="number">432</span>, <span class="op">-</span><span class="number">432.0</span>),
(<span class="op">-</span><span class="number">322223333</span>, <span class="op">-</span><span class="number">322223330.0</span>),
(<span class="number">9223372036854775807</span>, <span class="number">9.223372e18</span>),
(<span class="op">-</span><span class="number">9223372036854775808</span>, <span class="op">-</span><span class="number">9.223372e18</span>),
];
<span class="kw">for</span> <span class="ident">i</span> <span class="kw">in</span> <span class="number">0</span>..<span class="ident">inputs</span>.<span class="ident">len</span>() {
<span class="kw">let</span> (<span class="ident">x</span>, <span class="ident">f</span>) <span class="op">=</span> <span class="ident">inputs</span>[<span class="ident">i</span>];
<span class="kw">let</span> <span class="ident">a</span> <span class="op">=</span> <span class="ident">_mm_setr_ps</span>(<span class="number">5.0</span>, <span class="number">6.0</span>, <span class="number">7.0</span>, <span class="number">8.0</span>);
<span class="kw">let</span> <span class="ident">r</span> <span class="op">=</span> <span class="ident">_mm_cvtsi64_ss</span>(<span class="ident">a</span>, <span class="ident">x</span>);
<span class="kw">let</span> <span class="ident">e</span> <span class="op">=</span> <span class="ident">_mm_setr_ps</span>(<span class="ident">f</span>, <span class="number">6.0</span>, <span class="number">7.0</span>, <span class="number">8.0</span>);
<span class="ident">assert_eq_m128</span>(<span class="ident">e</span>, <span class="ident">r</span>);
}
}
}
</pre>
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