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</pre><pre class="rust ">
<span class="doccomment">//! `stdsimd`</span>
<span class="doccomment">/// SIMD and vendor intrinsics module.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This module is intended to be the gateway to architecture-specific</span>
<span class="doccomment">/// intrinsic functions, typically related to SIMD (but not always!). Each</span>
<span class="doccomment">/// architecture that Rust compiles to may contain a submodule here, which</span>
<span class="doccomment">/// means that this is not a portable module! If you're writing a portable</span>
<span class="doccomment">/// library take care when using these APIs!</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Under this module you'll find an architecture-named module, such as</span>
<span class="doccomment">/// `x86_64`. Each `#[cfg(target_arch)]` that Rust can compile to may have a</span>
<span class="doccomment">/// module entry here, only present on that particular target. For example the</span>
<span class="doccomment">/// `i686-pc-windows-msvc` target will have an `x86` module here, whereas</span>
<span class="doccomment">/// `x86_64-pc-windows-msvc` has `x86_64`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [rfc]: https://github.com/rust-lang/rfcs/pull/2325</span>
<span class="doccomment">/// [tracked]: https://github.com/rust-lang/rust/issues/48556</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Overview</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This module exposes vendor-specific intrinsics that typically correspond to</span>
<span class="doccomment">/// a single machine instruction. These intrinsics are not portable: their</span>
<span class="doccomment">/// availability is architecture-dependent, and not all machines of that</span>
<span class="doccomment">/// architecture might provide the intrinsic.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The `arch` module is intended to be a low-level implementation detail for</span>
<span class="doccomment">/// higher-level APIs. Using it correctly can be quite tricky as you need to</span>
<span class="doccomment">/// ensure at least a few guarantees are upheld:</span>
<span class="doccomment">///</span>
<span class="doccomment">/// * The correct architecture's module is used. For example the `arm` module</span>
<span class="doccomment">/// isn't available on the `x86_64-unknown-linux-gnu` target. This is</span>
<span class="doccomment">/// typically done by ensuring that `#[cfg]` is used appropriately when using</span>
<span class="doccomment">/// this module.</span>
<span class="doccomment">/// * The CPU the program is currently running on supports the function being</span>
<span class="doccomment">/// called. For example it is unsafe to call an AVX2 function on a CPU that</span>
<span class="doccomment">/// doesn't actually support AVX2.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// As a result of the latter of these guarantees all intrinsics in this module</span>
<span class="doccomment">/// are `unsafe` and extra care needs to be taken when calling them!</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # CPU Feature Detection</span>
<span class="doccomment">///</span>
<span class="doccomment">/// In order to call these APIs in a safe fashion there's a number of</span>
<span class="doccomment">/// mechanisms available to ensure that the correct CPU feature is available</span>
<span class="doccomment">/// to call an intrinsic. Let's consider, for example, the `_mm256_add_epi64`</span>
<span class="doccomment">/// intrinsics on the `x86` and `x86_64` architectures. This function requires</span>
<span class="doccomment">/// the AVX2 feature as [documented by Intel][intel-dox] so to correctly call</span>
<span class="doccomment">/// this function we need to (a) guarantee we only call it on `x86`/`x86_64`</span>
<span class="doccomment">/// and (b) ensure that the CPU feature is available</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [intel-dox]: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_add_epi64&expand=100</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ## Static CPU Feature Detection</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The first option available to us is to conditionally compile code via the</span>
<span class="doccomment">/// `#[cfg]` attribute. CPU features correspond to the `target_feature` cfg</span>
<span class="doccomment">/// available, and can be used like so:</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ```ignore</span>
<span class="doccomment">/// #[cfg(all(any(target_arch = "x86", target_arch = "x86_64"),</span>
<span class="doccomment">/// target_feature = "avx2"))]</span>
<span class="doccomment">/// fn foo() {</span>
<span class="doccomment">/// #[cfg(target_arch = "x86")]</span>
<span class="doccomment">/// use std::arch::x86::_mm256_add_epi64;</span>
<span class="doccomment">/// #[cfg(target_arch = "x86_64")]</span>
<span class="doccomment">/// use std::arch::x86_64::_mm256_add_epi64;</span>
<span class="doccomment">///</span>
<span class="doccomment">/// unsafe {</span>
<span class="doccomment">/// _mm256_add_epi64(...);</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// ```</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Here we're using `#[cfg(target_feature = "avx2")]` to conditionally compile</span>
<span class="doccomment">/// this function into our module. This means that if the `avx2` feature is</span>
<span class="doccomment">/// *enabled statically* then we'll use the `_mm256_add_epi64` function at</span>
<span class="doccomment">/// runtime. The `unsafe` block here can be justified through the usage of</span>
<span class="doccomment">/// `#[cfg]` to only compile the code in situations where the safety guarantees</span>
<span class="doccomment">/// are upheld.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Statically enabling a feature is typically done with the `-C</span>
<span class="doccomment">/// target-feature` or `-C target-cpu` flags to the compiler. For example if</span>
<span class="doccomment">/// your local CPU supports AVX2 then you can compile the above function with:</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ```sh</span>
<span class="doccomment">/// $ RUSTFLAGS='-C target-cpu=native' cargo build</span>
<span class="doccomment">/// ```</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Or otherwise you can specifically enable just the AVX2 feature:</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ```sh</span>
<span class="doccomment">/// $ RUSTFLAGS='-C target-feature=+avx2' cargo build</span>
<span class="doccomment">/// ```</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Note that when you compile a binary with a particular feature enabled it's</span>
<span class="doccomment">/// important to ensure that you only run the binary on systems which satisfy</span>
<span class="doccomment">/// the required feature set.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ## Dynamic CPU Feature Detection</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Sometimes statically dispatching isn't quite what you want. Instead you</span>
<span class="doccomment">/// might want to build a portable binary that runs across a variety of CPUs,</span>
<span class="doccomment">/// but at runtime it selects the most optimized implementation available. This</span>
<span class="doccomment">/// allows you to build a "least common denominator" binary which has certain</span>
<span class="doccomment">/// sections more optimized for different CPUs.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Taking our previous example from before, we're going to compile our binary</span>
<span class="doccomment">/// *without* AVX2 support, but we'd like to enable it for just one function.</span>
<span class="doccomment">/// We can do that in a manner like:</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ```ignore</span>
<span class="doccomment">/// fn foo() {</span>
<span class="doccomment">/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]</span>
<span class="doccomment">/// {</span>
<span class="doccomment">/// if is_x86_feature_detected!("avx2") {</span>
<span class="doccomment">/// return unsafe { foo_avx2() };</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// // fallback implementation without using AVX2</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]</span>
<span class="doccomment">/// #[target_feature(enable = "avx2")]</span>
<span class="doccomment">/// unsafe fn foo_avx2() {</span>
<span class="doccomment">/// #[cfg(target_arch = "x86")]</span>
<span class="doccomment">/// use std::arch::x86::_mm256_add_epi64;</span>
<span class="doccomment">/// #[cfg(target_arch = "x86_64")]</span>
<span class="doccomment">/// use std::arch::x86_64::_mm256_add_epi64;</span>
<span class="doccomment">///</span>
<span class="doccomment">/// _mm256_add_epi64(...);</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// ```</span>
<span class="doccomment">///</span>
<span class="doccomment">/// There's a couple of components in play here, so let's go through them in</span>
<span class="doccomment">/// detail!</span>
<span class="doccomment">///</span>
<span class="doccomment">/// * First up we notice the `is_x86_feature_detected!` macro. Provided by</span>
<span class="doccomment">/// the standard library, this macro will perform necessary runtime detection</span>
<span class="doccomment">/// to determine whether the CPU the program is running on supports the</span>
<span class="doccomment">/// specified feature. In this case the macro will expand to a boolean</span>
<span class="doccomment">/// expression evaluating to whether the local CPU has the AVX2 feature or</span>
<span class="doccomment">/// not.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Note that this macro, like the `arch` module, is platform-specific. The</span>
<span class="doccomment">/// name of the macro is the same across platforms, but the arguments to the</span>
<span class="doccomment">/// macro are only the features for the current platform. For example calling</span>
<span class="doccomment">/// `is_x86_feature_detected!("avx2")` on ARM will be a compile time</span>
<span class="doccomment">/// error. To ensure we don't hit this error a statement level `#[cfg]` is</span>
<span class="doccomment">/// used to only compile usage of the macro on `x86`/`x86_64`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// * Next up we see our AVX2-enabled function, `foo_avx2`. This function is</span>
<span class="doccomment">/// decorated with the `#[target_feature]` attribute which enables a CPU</span>
<span class="doccomment">/// feature for just this one function. Using a compiler flag like `-C</span>
<span class="doccomment">/// target-feature=+avx2` will enable AVX2 for the entire program, but using</span>
<span class="doccomment">/// an attribute will only enable it for the one function. Usage of the</span>
<span class="doccomment">/// `#[target_feature]` attribute currently requires the function to also be</span>
<span class="doccomment">/// `unsafe`, as we see here. This is because the function can only be</span>
<span class="doccomment">/// correctly called on systems which have the AVX2 (like the intrinsics</span>
<span class="doccomment">/// themselves).</span>
<span class="doccomment">///</span>
<span class="doccomment">/// And with all that we should have a working program! This program will run</span>
<span class="doccomment">/// across all machines and it'll use the optimized AVX2 implementation on</span>
<span class="doccomment">/// machines where support is detected.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Ergonomics</span>
<span class="doccomment">///</span>
<span class="doccomment">/// It's important to note that using the `arch` module is not the easiest</span>
<span class="doccomment">/// thing in the world, so if you're curious to try it out you may want to</span>
<span class="doccomment">/// brace yourself for some wordiness!</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The primary purpose of this module is to enable stable crates on crates.io</span>
<span class="doccomment">/// to build up much more ergonomic abstractions which end up using SIMD under</span>
<span class="doccomment">/// the hood. Over time these abstractions may also move into the standard</span>
<span class="doccomment">/// library itself, but for now this module is tasked with providing the bare</span>
<span class="doccomment">/// minimum necessary to use vendor intrinsics on stable Rust.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Other architectures</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This documentation is only for one particular architecture, you can find</span>
<span class="doccomment">/// others at:</span>
<span class="doccomment">///</span>
<span class="doccomment">/// * [`x86`]</span>
<span class="doccomment">/// * [`x86_64`]</span>
<span class="doccomment">/// * [`arm`]</span>
<span class="doccomment">/// * [`aarch64`]</span>
<span class="doccomment">/// * [`mips`]</span>
<span class="doccomment">/// * [`mips64`]</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [`x86`]: https://rust-lang-nursery.github.io/stdsimd/i686/stdsimd/arch/x86/index.html</span>
<span class="doccomment">/// [`x86_64`]: https://rust-lang-nursery.github.io/stdsimd/x86_64/stdsimd/arch/x86_64/index.html</span>
<span class="doccomment">/// [`arm`]: https://rust-lang-nursery.github.io/stdsimd/arm/stdsimd/arch/arm/index.html</span>
<span class="doccomment">/// [`aarch64`]: https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/arch/aarch64/index.html</span>
<span class="doccomment">/// [`mips`]: https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/arch/mips/index.html</span>
<span class="doccomment">/// [`mips64`]: https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/arch/mips64/index.html</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Examples</span>
<span class="doccomment">///</span>
<span class="doccomment">/// First let's take a look at not actually using any intrinsics but instead</span>
<span class="doccomment">/// using LLVM's auto-vectorization to produce optimized vectorized code for</span>
<span class="doccomment">/// AVX2 and also for the default platform.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ```rust</span>
<span class="doccomment">/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # #[cfg(not(dox))]</span>
<span class="doccomment">/// # #[macro_use]</span>
<span class="doccomment">/// # extern crate stdsimd;</span>
<span class="doccomment">///</span>
<span class="doccomment">/// fn main() {</span>
<span class="doccomment">/// let mut dst = [0];</span>
<span class="doccomment">/// add_quickly(&[1], &[2], &mut dst);</span>
<span class="doccomment">/// assert_eq!(dst[0], 3);</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// fn add_quickly(a: &[u8], b: &[u8], c: &mut [u8]) {</span>
<span class="doccomment">/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]</span>
<span class="doccomment">/// {</span>
<span class="doccomment">/// // Note that this `unsafe` block is safe because we're testing</span>
<span class="doccomment">/// // that the `avx2` feature is indeed available on our CPU.</span>
<span class="doccomment">/// if is_x86_feature_detected!("avx2") {</span>
<span class="doccomment">/// return unsafe { add_quickly_avx2(a, b, c) }</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// add_quickly_fallback(a, b, c)</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]</span>
<span class="doccomment">/// #[target_feature(enable = "avx2")]</span>
<span class="doccomment">/// unsafe fn add_quickly_avx2(a: &[u8], b: &[u8], c: &mut [u8]) {</span>
<span class="doccomment">/// add_quickly_fallback(a, b, c) // the function below is inlined here</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// fn add_quickly_fallback(a: &[u8], b: &[u8], c: &mut [u8]) {</span>
<span class="doccomment">/// for ((a, b), c) in a.iter().zip(b).zip(c) {</span>
<span class="doccomment">/// *c = *a + *b;</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// ```</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Next up let's take a look at an example of manually using intrinsics. Here</span>
<span class="doccomment">/// we'll be using SSE4.1 features to implement hex encoding.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// ```</span>
<span class="doccomment">/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]</span>
<span class="doccomment">/// # #![cfg_attr(not(dox), no_std)]</span>
<span class="doccomment">/// # #[cfg(not(dox))]</span>
<span class="doccomment">/// # extern crate std as real_std;</span>
<span class="doccomment">/// # #[cfg(not(dox))]</span>
<span class="doccomment">/// # #[macro_use]</span>
<span class="doccomment">/// # extern crate stdsimd as std;</span>
<span class="doccomment">///</span>
<span class="doccomment">/// fn main() {</span>
<span class="doccomment">/// let mut dst = [0; 32];</span>
<span class="doccomment">/// hex_encode(b"\x01\x02\x03", &mut dst);</span>
<span class="doccomment">/// assert_eq!(&dst[..6], b"010203");</span>
<span class="doccomment">///</span>
<span class="doccomment">/// let mut src = [0; 16];</span>
<span class="doccomment">/// for i in 0..16 {</span>
<span class="doccomment">/// src[i] = (i + 1) as u8;</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// hex_encode(&src, &mut dst);</span>
<span class="doccomment">/// assert_eq!(&dst, b"0102030405060708090a0b0c0d0e0f10");</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// pub fn hex_encode(src: &[u8], dst: &mut [u8]) {</span>
<span class="doccomment">/// let len = src.len().checked_mul(2).unwrap();</span>
<span class="doccomment">/// assert!(dst.len() >= len);</span>
<span class="doccomment">///</span>
<span class="doccomment">/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]</span>
<span class="doccomment">/// {</span>
<span class="doccomment">/// if is_x86_feature_detected!("sse4.1") {</span>
<span class="doccomment">/// return unsafe { hex_encode_sse41(src, dst) };</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// hex_encode_fallback(src, dst)</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// // translated from https://github.com/Matherunner/bin2hex-sse/blob/master/base16_sse4.cpp</span>
<span class="doccomment">/// #[target_feature(enable = "sse4.1")]</span>
<span class="doccomment">/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]</span>
<span class="doccomment">/// unsafe fn hex_encode_sse41(mut src: &[u8], dst: &mut [u8]) {</span>
<span class="doccomment">/// #[cfg(target_arch = "x86")]</span>
<span class="doccomment">/// use std::arch::x86::*;</span>
<span class="doccomment">/// #[cfg(target_arch = "x86_64")]</span>
<span class="doccomment">/// use std::arch::x86_64::*;</span>
<span class="doccomment">///</span>
<span class="doccomment">/// let ascii_zero = _mm_set1_epi8(b'0' as i8);</span>
<span class="doccomment">/// let nines = _mm_set1_epi8(9);</span>
<span class="doccomment">/// let ascii_a = _mm_set1_epi8((b'a' - 9 - 1) as i8);</span>
<span class="doccomment">/// let and4bits = _mm_set1_epi8(0xf);</span>
<span class="doccomment">///</span>
<span class="doccomment">/// let mut i = 0_isize;</span>
<span class="doccomment">/// while src.len() >= 16 {</span>
<span class="doccomment">/// let invec = _mm_loadu_si128(src.as_ptr() as *const _);</span>
<span class="doccomment">///</span>
<span class="doccomment">/// let masked1 = _mm_and_si128(invec, and4bits);</span>
<span class="doccomment">/// let masked2 = _mm_and_si128(_mm_srli_epi64(invec, 4), and4bits);</span>
<span class="doccomment">///</span>
<span class="doccomment">/// // return 0xff corresponding to the elements > 9, or 0x00 otherwise</span>
<span class="doccomment">/// let cmpmask1 = _mm_cmpgt_epi8(masked1, nines);</span>
<span class="doccomment">/// let cmpmask2 = _mm_cmpgt_epi8(masked2, nines);</span>
<span class="doccomment">///</span>
<span class="doccomment">/// // add '0' or the offset depending on the masks</span>
<span class="doccomment">/// let masked1 = _mm_add_epi8(</span>
<span class="doccomment">/// masked1,</span>
<span class="doccomment">/// _mm_blendv_epi8(ascii_zero, ascii_a, cmpmask1),</span>
<span class="doccomment">/// );</span>
<span class="doccomment">/// let masked2 = _mm_add_epi8(</span>
<span class="doccomment">/// masked2,</span>
<span class="doccomment">/// _mm_blendv_epi8(ascii_zero, ascii_a, cmpmask2),</span>
<span class="doccomment">/// );</span>
<span class="doccomment">///</span>
<span class="doccomment">/// // interleave masked1 and masked2 bytes</span>
<span class="doccomment">/// let res1 = _mm_unpacklo_epi8(masked2, masked1);</span>
<span class="doccomment">/// let res2 = _mm_unpackhi_epi8(masked2, masked1);</span>
<span class="doccomment">///</span>
<span class="doccomment">/// _mm_storeu_si128(dst.as_mut_ptr().offset(i * 2) as *mut _, res1);</span>
<span class="doccomment">/// _mm_storeu_si128(dst.as_mut_ptr().offset(i * 2 + 16) as *mut _,</span>
<span class="doccomment">/// res2); src = &src[16..];</span>
<span class="doccomment">/// i += 16;</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// let i = i as usize;</span>
<span class="doccomment">/// hex_encode_fallback(src, &mut dst[i * 2..]);</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// fn hex_encode_fallback(src: &[u8], dst: &mut [u8]) {</span>
<span class="doccomment">/// fn hex(byte: u8) -> u8 {</span>
<span class="doccomment">/// static TABLE: &[u8] = b"0123456789abcdef";</span>
<span class="doccomment">/// TABLE[byte as usize]</span>
<span class="doccomment">/// }</span>
<span class="doccomment">///</span>
<span class="doccomment">/// for (byte, slots) in src.iter().zip(dst.chunks_mut(2)) {</span>
<span class="doccomment">/// slots[0] = hex((*byte >> 4) & 0xf);</span>
<span class="doccomment">/// slots[1] = hex(*byte & 0xf);</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// }</span>
<span class="doccomment">/// ```</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_arch"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">arch</span> {
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">all</span>(<span class="ident">not</span>(<span class="ident">dox</span>), <span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"x86"</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">x86</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">all</span>(<span class="ident">not</span>(<span class="ident">dox</span>), <span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"x86_64"</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">x86_64</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">all</span>(<span class="ident">not</span>(<span class="ident">dox</span>), <span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"arm"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">arm</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">all</span>(<span class="ident">not</span>(<span class="ident">dox</span>), <span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"aarch64"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">aarch64</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"wasm32"</span>)]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">wasm32</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">all</span>(<span class="ident">not</span>(<span class="ident">dox</span>), <span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"mips"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">mips</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">all</span>(<span class="ident">not</span>(<span class="ident">dox</span>), <span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"mips64"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">arch</span>::<span class="ident">mips64</span>;
<span class="attribute">#[<span class="ident">doc</span>(<span class="ident">hidden</span>)]</span> <span class="comment">// unstable implementation detail</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">detect</span>;
<span class="doccomment">/// Platform-specific intrinsics for the `x86` platform.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The documentation with the full listing of `x86` intrinsics is</span>
<span class="doccomment">/// available in [libcore], but the module is re-exported here in std</span>
<span class="doccomment">/// as well.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [libcore]: ../../../core/arch/x86/index.html</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">dox</span>)]</span>
<span class="attribute">#[<span class="ident">doc</span>(<span class="ident">cfg</span>(<span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"x86"</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">x86</span> {}
<span class="doccomment">/// Platform-specific intrinsics for the `x86_64` platform.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The documentation with the full listing of `x86_64` intrinsics is</span>
<span class="doccomment">/// available in [libcore], but the module is re-exported here in std</span>
<span class="doccomment">/// as well.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [libcore]: ../../../core/arch/x86_64/index.html</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">dox</span>)]</span>
<span class="attribute">#[<span class="ident">doc</span>(<span class="ident">cfg</span>(<span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"x86_64"</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">x86_64</span> {}
<span class="doccomment">/// Platform-specific intrinsics for the `arm` platform.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The documentation with the full listing of `arm` intrinsics is</span>
<span class="doccomment">/// available in [libcore], but the module is re-exported here in std</span>
<span class="doccomment">/// as well.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [libcore]: ../../../core/arch/arm/index.html</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">dox</span>)]</span>
<span class="attribute">#[<span class="ident">doc</span>(<span class="ident">cfg</span>(<span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"arm"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">arm</span> {}
<span class="doccomment">/// Platform-specific intrinsics for the `aarch64` platform.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The documentation with the full listing of `aarch64` intrinsics is</span>
<span class="doccomment">/// available in [libcore], but the module is re-exported here in std</span>
<span class="doccomment">/// as well.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [libcore]: ../../../core/arch/aarch64/index.html</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">dox</span>)]</span>
<span class="attribute">#[<span class="ident">doc</span>(<span class="ident">cfg</span>(<span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"aarch64"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">aarch64</span> {}
<span class="doccomment">/// Platform-specific intrinsics for the `mips` platform.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The documentation with the full listing of `mips` intrinsics is</span>
<span class="doccomment">/// available in [libcore], but the module is re-exported here in std</span>
<span class="doccomment">/// as well.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [libcore]: ../../../core/arch/mips/index.html</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">dox</span>)]</span>
<span class="attribute">#[<span class="ident">doc</span>(<span class="ident">cfg</span>(<span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"mips"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">mips</span> {}
<span class="doccomment">/// Platform-specific intrinsics for the `mips64` platform.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The documentation with the full listing of `mips64` intrinsics is</span>
<span class="doccomment">/// available in [libcore], but the module is re-exported here in std</span>
<span class="doccomment">/// as well.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [libcore]: ../../../core/arch/mips64/index.html</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">dox</span>)]</span>
<span class="attribute">#[<span class="ident">doc</span>(<span class="ident">cfg</span>(<span class="ident">target_arch</span> <span class="op">=</span> <span class="string">"mips64"</span>))]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">mod</span> <span class="ident">mips64</span> {}
}
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdsimd"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">use</span> <span class="ident">coresimd</span>::<span class="ident">simd</span>;
</pre>
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