<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Source to the Rust file `src/libcore/../stdsimd/crates/core_arch/src/wasm32/simd128.rs`."><meta name="keywords" content="rust, rustlang, rust-lang"><title>simd128.rs.html -- source</title><link rel="stylesheet" type="text/css" href="../../../../../../../../normalize1.35.0.css"><link rel="stylesheet" type="text/css" href="../../../../../../../../rustdoc1.35.0.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../../../../../../../../dark1.35.0.css"><link rel="stylesheet" type="text/css" href="../../../../../../../../light1.35.0.css" id="themeStyle"><script src="../../../../../../../../storage1.35.0.js"></script><noscript><link rel="stylesheet" href="../../../../../../../../noscript1.35.0.css"></noscript><link rel="shortcut icon" href="../../../../../../../../favicon1.35.0.ico"><style type="text/css">#crate-search{background-image:url("../../../../../../../../down-arrow1.35.0.svg");}</style></head><body class="rustdoc source"><!--[if lte IE 8]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="sidebar"><div class="sidebar-menu">☰</div><a href='../../../../../../../../core/index.html'><img src='../../../../../../../../rust-logo1.35.0.png' alt='logo' width='100'></a></nav><div class="theme-picker"><button id="theme-picker" aria-label="Pick another theme!"><img src="../../../../../../../../brush1.35.0.svg" width="18" alt="Pick another theme!"></button><div id="theme-choices"></div></div><script src="../../../../../../../../theme1.35.0.js"></script><nav class="sub"><form class="search-form js-only"><div class="search-container"><div><select id="crate-search"><option value="All crates">All crates</option></select><input class="search-input" name="search" autocomplete="off" spellcheck="false" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"></div><a id="settings-menu" href="../../../../../../../../settings.html"><img src="../../../../../../../../wheel1.35.0.svg" width="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><pre class="line-numbers"><span id="1"> 1</span>
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</pre><div class="example-wrap"><pre class="rust ">
<span class="doccomment">//! This module implements the [WebAssembly `SIMD128` ISA].</span>
<span class="doccomment">//!</span>
<span class="doccomment">//! [WebAssembly `SIMD128` ISA]:</span>
<span class="doccomment">//! https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md</span>
<span class="attribute">#![<span class="ident">allow</span>(<span class="ident">non_camel_case_types</span>)]</span>
<span class="kw">use</span> <span class="kw">crate</span>::{
<span class="ident">core_arch</span>::{<span class="ident">simd</span>::<span class="kw-2">*</span>, <span class="ident">simd_llvm</span>::<span class="kw-2">*</span>},
<span class="ident">marker</span>::<span class="ident">Sized</span>,
<span class="ident">mem</span>::<span class="ident">transmute</span>,
<span class="ident">ptr</span>,
};
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">assert_instr</span>;
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">use</span> <span class="ident">wasm_bindgen_test</span>::<span class="ident">wasm_bindgen_test</span>;
<span class="macro">types</span><span class="macro">!</span> {
<span class="doccomment">/// WASM-specific 128-bit wide SIMD vector type.</span>
<span class="comment">// N.B., internals here are arbitrary.</span>
<span class="kw">pub</span> <span class="kw">struct</span> <span class="ident">v128</span>(<span class="ident">i32</span>, <span class="ident">i32</span>, <span class="ident">i32</span>, <span class="ident">i32</span>);
}
<span class="attribute">#[<span class="ident">allow</span>(<span class="ident">non_camel_case_types</span>)]</span>
<span class="attribute">#[<span class="ident">unstable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"stdimd_internal"</span>, <span class="ident">issue</span> <span class="op">=</span> <span class="string">"0"</span>)]</span>
<span class="kw">pub</span>(<span class="kw">crate</span>) <span class="kw">trait</span> <span class="ident">v128Ext</span>: <span class="ident">Sized</span> {
<span class="kw">fn</span> <span class="ident">as_v128</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">v128</span>;
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_u8x16</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">u8x16</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_u16x8</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">u16x8</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_u32x4</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">u32x4</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_u64x2</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">u64x2</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_i8x16</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">i8x16</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_i16x8</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">i16x8</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_i32x4</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">i32x4</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_i64x2</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">i64x2</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_f32x4</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">f32x4</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_f64x2</span>(<span class="self">self</span>) <span class="op">-></span> <span class="ident">f64x2</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="self">self</span>.<span class="ident">as_v128</span>()) }
}
}
<span class="kw">impl</span> <span class="ident">v128Ext</span> <span class="kw">for</span> <span class="ident">v128</span> {
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="kw">fn</span> <span class="ident">as_v128</span>(<span class="self">self</span>) <span class="op">-></span> <span class="self">Self</span> {
<span class="self">self</span>
}
}
<span class="attribute">#[<span class="ident">allow</span>(<span class="ident">improper_ctypes</span>)]</span>
<span class="kw">extern</span> <span class="string">"C"</span> {
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.anytrue.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i8x16_any_true</span>(<span class="ident">x</span>: <span class="ident">i8x16</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.alltrue.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i8x16_all_true</span>(<span class="ident">x</span>: <span class="ident">i8x16</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.sadd.sat.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i8x16_add_saturate_s</span>(<span class="ident">a</span>: <span class="ident">i8x16</span>, <span class="ident">b</span>: <span class="ident">i8x16</span>) <span class="op">-></span> <span class="ident">i8x16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.uadd.sat.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i8x16_add_saturate_u</span>(<span class="ident">a</span>: <span class="ident">i8x16</span>, <span class="ident">b</span>: <span class="ident">i8x16</span>) <span class="op">-></span> <span class="ident">i8x16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.sub.saturate.signed.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i8x16_sub_saturate_s</span>(<span class="ident">a</span>: <span class="ident">i8x16</span>, <span class="ident">b</span>: <span class="ident">i8x16</span>) <span class="op">-></span> <span class="ident">i8x16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.sub.saturate.unsigned.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i8x16_sub_saturate_u</span>(<span class="ident">a</span>: <span class="ident">i8x16</span>, <span class="ident">b</span>: <span class="ident">i8x16</span>) <span class="op">-></span> <span class="ident">i8x16</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.anytrue.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i16x8_any_true</span>(<span class="ident">x</span>: <span class="ident">i16x8</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.alltrue.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i16x8_all_true</span>(<span class="ident">x</span>: <span class="ident">i16x8</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.sadd.sat.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i16x8_add_saturate_s</span>(<span class="ident">a</span>: <span class="ident">i16x8</span>, <span class="ident">b</span>: <span class="ident">i16x8</span>) <span class="op">-></span> <span class="ident">i16x8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.uadd.sat.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i16x8_add_saturate_u</span>(<span class="ident">a</span>: <span class="ident">i16x8</span>, <span class="ident">b</span>: <span class="ident">i16x8</span>) <span class="op">-></span> <span class="ident">i16x8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.sub.saturate.signed.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i16x8_sub_saturate_s</span>(<span class="ident">a</span>: <span class="ident">i16x8</span>, <span class="ident">b</span>: <span class="ident">i16x8</span>) <span class="op">-></span> <span class="ident">i16x8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.sub.saturate.unsigned.v8i16"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i16x8_sub_saturate_u</span>(<span class="ident">a</span>: <span class="ident">i16x8</span>, <span class="ident">b</span>: <span class="ident">i16x8</span>) <span class="op">-></span> <span class="ident">i16x8</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.anytrue.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i32x4_any_true</span>(<span class="ident">x</span>: <span class="ident">i32x4</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.alltrue.v4i32"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i32x4_all_true</span>(<span class="ident">x</span>: <span class="ident">i32x4</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.anytrue.v2i64"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i64x2_any_true</span>(<span class="ident">x</span>: <span class="ident">i64x2</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.alltrue.v2i64"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_i64x2_all_true</span>(<span class="ident">x</span>: <span class="ident">i64x2</span>) <span class="op">-></span> <span class="ident">i32</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.fabs.v4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f32x4_abs</span>(<span class="ident">x</span>: <span class="ident">f32x4</span>) <span class="op">-></span> <span class="ident">f32x4</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.sqrt.v4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f32x4_sqrt</span>(<span class="ident">x</span>: <span class="ident">f32x4</span>) <span class="op">-></span> <span class="ident">f32x4</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.minimum.v4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f32x4_min</span>(<span class="ident">x</span>: <span class="ident">f32x4</span>, <span class="ident">y</span>: <span class="ident">f32x4</span>) <span class="op">-></span> <span class="ident">f32x4</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.maximum.v4f32"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f32x4_max</span>(<span class="ident">x</span>: <span class="ident">f32x4</span>, <span class="ident">y</span>: <span class="ident">f32x4</span>) <span class="op">-></span> <span class="ident">f32x4</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.fabs.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f64x2_abs</span>(<span class="ident">x</span>: <span class="ident">f64x2</span>) <span class="op">-></span> <span class="ident">f64x2</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.sqrt.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f64x2_sqrt</span>(<span class="ident">x</span>: <span class="ident">f64x2</span>) <span class="op">-></span> <span class="ident">f64x2</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.minimum.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f64x2_min</span>(<span class="ident">x</span>: <span class="ident">f64x2</span>, <span class="ident">y</span>: <span class="ident">f64x2</span>) <span class="op">-></span> <span class="ident">f64x2</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.maximum.v2f64"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_f64x2_max</span>(<span class="ident">x</span>: <span class="ident">f64x2</span>, <span class="ident">y</span>: <span class="ident">f64x2</span>) <span class="op">-></span> <span class="ident">f64x2</span>;
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.wasm.bitselect.v16i8"</span>]</span>
<span class="kw">fn</span> <span class="ident">llvm_bitselect</span>(<span class="ident">a</span>: <span class="ident">i8x16</span>, <span class="ident">b</span>: <span class="ident">i8x16</span>, <span class="ident">c</span>: <span class="ident">i8x16</span>) <span class="op">-></span> <span class="ident">i8x16</span>;
}
<span class="doccomment">/// Loads a `v128` vector from the given heap address.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">v128</span>.<span class="ident">load</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">v128_load</span>(<span class="ident">m</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">ptr</span>::<span class="ident">read</span>(<span class="ident">m</span>)
}
<span class="doccomment">/// Stores a `v128` vector to the given heap address.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">v128</span>.<span class="ident">store</span>))]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">v128_store</span>(<span class="ident">m</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">v128</span>, <span class="ident">a</span>: <span class="ident">v128</span>) {
<span class="ident">ptr</span>::<span class="ident">write</span>(<span class="ident">m</span>, <span class="ident">a</span>)
}
<span class="doccomment">/// Materializes a constant SIMD value from the immediate operands.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The `v128.const` instruction is encoded with 16 immediate bytes</span>
<span class="doccomment">/// `imm` which provide the bits of the vector directly.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">0</span>, <span class="number">1</span>, <span class="number">2</span>, <span class="number">3</span>, <span class="number">4</span>, <span class="number">5</span>, <span class="number">6</span>, <span class="number">7</span>, <span class="number">8</span>, <span class="number">9</span>, <span class="number">10</span>, <span class="number">11</span>, <span class="number">12</span>, <span class="number">13</span>, <span class="number">14</span>, <span class="number">15</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(
<span class="ident">v128</span>.<span class="kw">const</span>,
<span class="ident">a0</span> <span class="op">=</span> <span class="number">0</span>,
<span class="ident">a1</span> <span class="op">=</span> <span class="number">1</span>,
<span class="ident">a2</span> <span class="op">=</span> <span class="number">2</span>,
<span class="ident">a3</span> <span class="op">=</span> <span class="number">3</span>,
<span class="ident">a4</span> <span class="op">=</span> <span class="number">4</span>,
<span class="ident">a5</span> <span class="op">=</span> <span class="number">5</span>,
<span class="ident">a6</span> <span class="op">=</span> <span class="number">6</span>,
<span class="ident">a7</span> <span class="op">=</span> <span class="number">7</span>,
<span class="ident">a8</span> <span class="op">=</span> <span class="number">8</span>,
<span class="ident">a9</span> <span class="op">=</span> <span class="number">9</span>,
<span class="ident">a10</span> <span class="op">=</span> <span class="number">10</span>,
<span class="ident">a11</span> <span class="op">=</span> <span class="number">11</span>,
<span class="ident">a12</span> <span class="op">=</span> <span class="number">12</span>,
<span class="ident">a13</span> <span class="op">=</span> <span class="number">13</span>,
<span class="ident">a14</span> <span class="op">=</span> <span class="number">14</span>,
<span class="ident">a15</span> <span class="op">=</span> <span class="number">15</span>,
))]</span>
<span class="kw">pub</span> <span class="kw">const</span> <span class="kw">fn</span> <span class="ident">v128_const</span>(
<span class="ident">a0</span>: <span class="ident">u8</span>,
<span class="ident">a1</span>: <span class="ident">u8</span>,
<span class="ident">a2</span>: <span class="ident">u8</span>,
<span class="ident">a3</span>: <span class="ident">u8</span>,
<span class="ident">a4</span>: <span class="ident">u8</span>,
<span class="ident">a5</span>: <span class="ident">u8</span>,
<span class="ident">a6</span>: <span class="ident">u8</span>,
<span class="ident">a7</span>: <span class="ident">u8</span>,
<span class="ident">a8</span>: <span class="ident">u8</span>,
<span class="ident">a9</span>: <span class="ident">u8</span>,
<span class="ident">a10</span>: <span class="ident">u8</span>,
<span class="ident">a11</span>: <span class="ident">u8</span>,
<span class="ident">a12</span>: <span class="ident">u8</span>,
<span class="ident">a13</span>: <span class="ident">u8</span>,
<span class="ident">a14</span>: <span class="ident">u8</span>,
<span class="ident">a15</span>: <span class="ident">u8</span>,
) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">union</span> <span class="ident">U</span> {
<span class="ident">imm</span>: [<span class="ident">u8</span>; <span class="number">16</span>],
<span class="ident">vec</span>: <span class="ident">v128</span>,
}
<span class="kw">unsafe</span> {
<span class="ident">U</span> {
<span class="ident">imm</span>: [
<span class="ident">a0</span>, <span class="ident">a1</span>, <span class="ident">a2</span>, <span class="ident">a3</span>, <span class="ident">a4</span>, <span class="ident">a5</span>, <span class="ident">a6</span>, <span class="ident">a7</span>, <span class="ident">a8</span>, <span class="ident">a9</span>, <span class="ident">a10</span>, <span class="ident">a11</span>, <span class="ident">a12</span>, <span class="ident">a13</span>, <span class="ident">a14</span>, <span class="ident">a15</span>,
],
}
.<span class="ident">vec</span>
}
}
<span class="doccomment">/// Creates a vector with identical lanes.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Constructs a vector with `x` replicated to all 16 lanes.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">splat</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_splat</span>(<span class="ident">a</span>: <span class="ident">i8</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">i8x16</span>::<span class="ident">splat</span>(<span class="ident">a</span>)) }
}
<span class="doccomment">/// Extracts a lane from a 128-bit vector interpreted as 16 packed i8 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Extracts the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` from `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 16.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i8x16_extract_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>) <span class="op">-></span> <span class="ident">i8</span> {
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="attribute">#[<span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">extract_lane_s</span>)]</span>
<span class="kw">fn</span> <span class="ident">extract_lane_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">i8x16_extract_lane</span>(<span class="ident">a</span>, <span class="number">0</span>) <span class="kw">as</span> <span class="ident">i32</span> }
}
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="attribute">#[<span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">extract_lane_u</span>)]</span>
<span class="kw">fn</span> <span class="ident">extract_lane_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">u32</span> {
<span class="kw">unsafe</span> { <span class="ident">i8x16_extract_lane</span>(<span class="ident">a</span>, <span class="number">0</span>) <span class="kw">as</span> <span class="ident">u32</span> }
}
<span class="ident">simd_extract</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>)
}
<span class="doccomment">/// Replaces a lane from a 128-bit vector interpreted as 16 packed i8 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Replaces the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` with `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 16.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">replace_lane</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i8x16_replace_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>, <span class="ident">val</span>: <span class="ident">i8</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">transmute</span>(<span class="ident">simd_insert</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">val</span>))
}
<span class="doccomment">/// Creates a vector with identical lanes.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Construct a vector with `x` replicated to all 8 lanes.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">splat</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_splat</span>(<span class="ident">a</span>: <span class="ident">i16</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">i16x8</span>::<span class="ident">splat</span>(<span class="ident">a</span>)) }
}
<span class="doccomment">/// Extracts a lane from a 128-bit vector interpreted as 8 packed i16 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Extracts a the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` from `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 8.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i16x8_extract_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>) <span class="op">-></span> <span class="ident">i16</span> {
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="attribute">#[<span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">extract_lane_s</span>)]</span>
<span class="kw">fn</span> <span class="ident">extract_lane_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">i16x8_extract_lane</span>(<span class="ident">a</span>, <span class="number">0</span>) <span class="kw">as</span> <span class="ident">i32</span> }
}
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="attribute">#[<span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">extract_lane_u</span>)]</span>
<span class="kw">fn</span> <span class="ident">extract_lane_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">u32</span> {
<span class="kw">unsafe</span> { <span class="ident">i16x8_extract_lane</span>(<span class="ident">a</span>, <span class="number">0</span>) <span class="kw">as</span> <span class="ident">u32</span> }
}
<span class="ident">simd_extract</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>)
}
<span class="doccomment">/// Replaces a lane from a 128-bit vector interpreted as 8 packed i16 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Replaces the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` with `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 8.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">replace_lane</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i16x8_replace_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>, <span class="ident">val</span>: <span class="ident">i16</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">transmute</span>(<span class="ident">simd_insert</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">val</span>))
}
<span class="doccomment">/// Creates a vector with identical lanes.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Constructs a vector with `x` replicated to all 4 lanes.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">splat</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_splat</span>(<span class="ident">a</span>: <span class="ident">i32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">i32x4</span>::<span class="ident">splat</span>(<span class="ident">a</span>)) }
}
<span class="doccomment">/// Extracts a lane from a 128-bit vector interpreted as 4 packed i32 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Extracts the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` from `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 4.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">extract_lane_s</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i32x4_extract_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="ident">simd_extract</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>)
}
<span class="doccomment">/// Replaces a lane from a 128-bit vector interpreted as 4 packed i32 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Replaces the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` with `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 4.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">replace_lane</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i32x4_replace_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>, <span class="ident">val</span>: <span class="ident">i32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">transmute</span>(<span class="ident">simd_insert</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">val</span>))
}
<span class="doccomment">/// Creates a vector with identical lanes.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Construct a vector with `x` replicated to all 2 lanes.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">splat</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_splat</span>(<span class="ident">a</span>: <span class="ident">i64</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">i64x2</span>::<span class="ident">splat</span>(<span class="ident">a</span>)) }
}
<span class="doccomment">/// Extracts a lane from a 128-bit vector interpreted as 2 packed i64 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Extracts the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` from `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 2.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">extract_lane_s</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i64x2_extract_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>) <span class="op">-></span> <span class="ident">i64</span> {
<span class="ident">simd_extract</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>)
}
<span class="doccomment">/// Replaces a lane from a 128-bit vector interpreted as 2 packed i64 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Replaces the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` with `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 2.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">replace_lane</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">i64x2_replace_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>, <span class="ident">val</span>: <span class="ident">i64</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">transmute</span>(<span class="ident">simd_insert</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">val</span>))
}
<span class="doccomment">/// Creates a vector with identical lanes.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Constructs a vector with `x` replicated to all 4 lanes.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">splat</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_splat</span>(<span class="ident">a</span>: <span class="ident">f32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">f32x4</span>::<span class="ident">splat</span>(<span class="ident">a</span>)) }
}
<span class="doccomment">/// Extracts a lane from a 128-bit vector interpreted as 4 packed f32 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Extracts the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` from `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 4.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">extract_lane_s</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">f32x4_extract_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>) <span class="op">-></span> <span class="ident">f32</span> {
<span class="ident">simd_extract</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>)
}
<span class="doccomment">/// Replaces a lane from a 128-bit vector interpreted as 4 packed f32 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Replaces the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` with `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 4.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">replace_lane</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">f32x4_replace_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>, <span class="ident">val</span>: <span class="ident">f32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">transmute</span>(<span class="ident">simd_insert</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">val</span>))
}
<span class="doccomment">/// Creates a vector with identical lanes.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Constructs a vector with `x` replicated to all 2 lanes.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">splat</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_splat</span>(<span class="ident">a</span>: <span class="ident">f64</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">f64x2</span>::<span class="ident">splat</span>(<span class="ident">a</span>)) }
}
<span class="doccomment">/// Extracts lane from a 128-bit vector interpreted as 2 packed f64 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Extracts the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` from `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 2.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">extract_lane_s</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">f64x2_extract_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>) <span class="op">-></span> <span class="ident">f64</span> {
<span class="ident">simd_extract</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>)
}
<span class="doccomment">/// Replaces a lane from a 128-bit vector interpreted as 2 packed f64 numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Replaces the scalar value of lane specified in the immediate mode operand</span>
<span class="doccomment">/// `imm` with `a`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// # Unsafety</span>
<span class="doccomment">///</span>
<span class="doccomment">/// This function has undefined behavior if `imm` is greater than or equal to</span>
<span class="doccomment">/// 2.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">replace_lane</span>, <span class="ident">imm</span> <span class="op">=</span> <span class="number">0</span>))]</span>
<span class="attribute">#[<span class="ident">rustc_args_required_const</span>(<span class="number">1</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">f64x2_replace_lane</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">imm</span>: <span class="ident">usize</span>, <span class="ident">val</span>: <span class="ident">f64</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="ident">transmute</span>(<span class="ident">simd_insert</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">imm</span> <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">val</span>))
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were equal, or all zeros if the elements were not equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">eq</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_eq</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_eq</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were not equal, or all zeros if the elements were equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">ne</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_ne</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ne</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">lt_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_lt_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">lt_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_lt_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u8x16</span>(), <span class="ident">b</span>.<span class="ident">as_u8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">gt_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_gt_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">gt_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_gt_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u8x16</span>(), <span class="ident">b</span>.<span class="ident">as_u8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">le_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_le_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">le_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_le_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u8x16</span>(), <span class="ident">b</span>.<span class="ident">as_u8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">ge_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_ge_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 16 eight-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">ge_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_ge_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i8x16</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u8x16</span>(), <span class="ident">b</span>.<span class="ident">as_u8x16</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were equal, or all zeros if the elements were not equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">eq</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_eq</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_eq</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were not equal, or all zeros if the elements were equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">ne</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_ne</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ne</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">lt_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_lt_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">lt_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_lt_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u16x8</span>(), <span class="ident">b</span>.<span class="ident">as_u16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">gt_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_gt_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">gt_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_gt_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u16x8</span>(), <span class="ident">b</span>.<span class="ident">as_u16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">le_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_le_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">le_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_le_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u16x8</span>(), <span class="ident">b</span>.<span class="ident">as_u16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">ge_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_ge_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">ge_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_ge_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i16x8</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u16x8</span>(), <span class="ident">b</span>.<span class="ident">as_u16x8</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were equal, or all zeros if the elements were not equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">eq</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_eq</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_eq</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were not equal, or all zeros if the elements were equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">ne</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_ne</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ne</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">lt_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_lt_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">lt_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_lt_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u32x4</span>(), <span class="ident">b</span>.<span class="ident">as_u32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">gt_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_gt_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">gt_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_gt_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u32x4</span>(), <span class="ident">b</span>.<span class="ident">as_u32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">le_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_le_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">le_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_le_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u32x4</span>(), <span class="ident">b</span>.<span class="ident">as_u32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">ge_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_ge_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">ge_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_ge_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u32x4</span>(), <span class="ident">b</span>.<span class="ident">as_u32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were equal, or all zeros if the elements were not equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">eq</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_eq</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_eq</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were not equal, or all zeros if the elements were equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">ne</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_ne</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ne</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">lt</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_lt</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">gt</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_gt</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">le</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_le</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">ge</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_ge</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were equal, or all zeros if the elements were not equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">eq</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_eq</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_eq</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise elements</span>
<span class="doccomment">/// were not equal, or all zeros if the elements were equal.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">ne</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_ne</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ne</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">lt</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_lt</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_lt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">gt</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_gt</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_gt</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is less than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">le</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_le</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_le</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Returns a new vector where each lane is all ones if the pairwise left</span>
<span class="doccomment">/// element is greater than the pairwise right element, or all zeros otherwise.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">ge</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_ge</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_ge</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Flips each bit of the 128-bit input vector.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">v128</span>.<span class="ident">not</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">v128_not</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_xor</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">i64x2</span>(<span class="op">!</span><span class="number">0</span>, <span class="op">!</span><span class="number">0</span>))) }
}
<span class="doccomment">/// Performs a bitwise and of the two input 128-bit vectors, returning the</span>
<span class="doccomment">/// resulting vector.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">v128</span>.<span class="ident">and</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">v128_and</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_and</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">b</span>.<span class="ident">as_i64x2</span>())) }
}
<span class="doccomment">/// Performs a bitwise or of the two input 128-bit vectors, returning the</span>
<span class="doccomment">/// resulting vector.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">v128</span>.<span class="ident">or</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">v128_or</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_or</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">b</span>.<span class="ident">as_i64x2</span>())) }
}
<span class="doccomment">/// Performs a bitwise xor of the two input 128-bit vectors, returning the</span>
<span class="doccomment">/// resulting vector.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">v128</span>.<span class="ident">xor</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">v128_xor</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_xor</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">b</span>.<span class="ident">as_i64x2</span>())) }
}
<span class="doccomment">/// Use the bitmask in `c` to select bits from `v1` when 1 and `v2` when 0.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">v128</span>.<span class="ident">bitselect</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">v128_bitselect</span>(<span class="ident">v1</span>: <span class="ident">v128</span>, <span class="ident">v2</span>: <span class="ident">v128</span>, <span class="ident">c</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_bitselect</span>(<span class="ident">c</span>.<span class="ident">as_i8x16</span>(), <span class="ident">v1</span>.<span class="ident">as_i8x16</span>(), <span class="ident">v2</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Negates a 128-bit vectors intepreted as sixteen 8-bit signed integers</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">neg</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_neg</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">i8x16</span>::<span class="ident">splat</span>(<span class="op">-</span><span class="number">1</span>))) }
}
<span class="doccomment">/// Returns 1 if any lane is nonzero or 0 if all lanes are zero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">any_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_any_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i8x16_any_true</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>()) }
}
<span class="doccomment">/// Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">all_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_all_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i8x16_all_true</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>()) }
}
<span class="doccomment">/// Shifts each lane to the left by the specified number of bits.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_shl</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shl</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">i8x16</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i8</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, sign</span>
<span class="doccomment">/// extending.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_shr_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">i8x16</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i8</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, shifting in</span>
<span class="doccomment">/// zeros.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_shr_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_u8x16</span>(), <span class="ident">u8x16</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">u8</span>))) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_add</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_add</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed sixteen 8-bit signed</span>
<span class="doccomment">/// integers, saturating on overflow to `i8::max_value()`.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">add_saturate_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_add_saturate_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i8x16_add_saturate_s</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed sixteen 8-bit unsigned</span>
<span class="doccomment">/// integers, saturating on overflow to `u8::max_value()`.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">add_saturate_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_add_saturate_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i8x16_add_saturate_u</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">sub</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_sub</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_sub</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit</span>
<span class="doccomment">/// signed integers, saturating on overflow to `i8::min_value()`.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">sub_saturate_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_sub_saturate_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i8x16_sub_saturate_s</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit</span>
<span class="doccomment">/// unsigned integers, saturating on overflow to 0.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">sub_saturate_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_sub_saturate_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i8x16_sub_saturate_u</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Multiplies two 128-bit vectors as if they were two packed sixteen 8-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i8x16</span>.<span class="ident">mul</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i8x16_mul</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_i8x16</span>(), <span class="ident">b</span>.<span class="ident">as_i8x16</span>())) }
}
<span class="doccomment">/// Negates a 128-bit vectors intepreted as eight 16-bit signed integers</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">neg</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_neg</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">i16x8</span>::<span class="ident">splat</span>(<span class="op">-</span><span class="number">1</span>))) }
}
<span class="doccomment">/// Returns 1 if any lane is nonzero or 0 if all lanes are zero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">any_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_any_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i16x8_any_true</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>()) }
}
<span class="doccomment">/// Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">all_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_all_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i16x8_all_true</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>()) }
}
<span class="doccomment">/// Shifts each lane to the left by the specified number of bits.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_shl</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shl</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">i16x8</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i16</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, sign</span>
<span class="doccomment">/// extending.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_shr_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">i16x8</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i16</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, shifting in</span>
<span class="doccomment">/// zeros.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_shr_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_u16x8</span>(), <span class="ident">u16x8</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">u16</span>))) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed eight 16-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_add</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_add</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed eight 16-bit signed</span>
<span class="doccomment">/// integers, saturating on overflow to `i16::max_value()`.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">add_saturate_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_add_saturate_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i16x8_add_saturate_s</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed eight 16-bit unsigned</span>
<span class="doccomment">/// integers, saturating on overflow to `u16::max_value()`.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">add_saturate_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_add_saturate_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i16x8_add_saturate_u</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">sub</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_sub</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_sub</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed eight 16-bit</span>
<span class="doccomment">/// signed integers, saturating on overflow to `i16::min_value()`.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">sub_saturate_s</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_sub_saturate_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i16x8_sub_saturate_s</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed eight 16-bit</span>
<span class="doccomment">/// unsigned integers, saturating on overflow to 0.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">sub_saturate_u</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_sub_saturate_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_i16x8_sub_saturate_u</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Multiplies two 128-bit vectors as if they were two packed eight 16-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i16x8</span>.<span class="ident">mul</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i16x8_mul</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_i16x8</span>(), <span class="ident">b</span>.<span class="ident">as_i16x8</span>())) }
}
<span class="doccomment">/// Negates a 128-bit vectors intepreted as four 32-bit signed integers</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">neg</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_neg</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">i32x4</span>::<span class="ident">splat</span>(<span class="op">-</span><span class="number">1</span>))) }
}
<span class="doccomment">/// Returns 1 if any lane is nonzero or 0 if all lanes are zero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">any_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_any_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i32x4_any_true</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>()) }
}
<span class="doccomment">/// Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">all_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_all_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i32x4_all_true</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>()) }
}
<span class="doccomment">/// Shifts each lane to the left by the specified number of bits.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_shl</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shl</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">i32x4</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i32</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, sign</span>
<span class="doccomment">/// extending.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_shr_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">i32x4</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i32</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, shifting in</span>
<span class="doccomment">/// zeros.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_shr_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_u32x4</span>(), <span class="ident">u32x4</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">u32</span>))) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed four 32-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_add</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_add</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">sub</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_sub</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_sub</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Multiplies two 128-bit vectors as if they were two packed four 32-bit</span>
<span class="doccomment">/// signed integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">mul</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_mul</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>(), <span class="ident">b</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Negates a 128-bit vectors intepreted as two 64-bit signed integers</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i32x4</span>.<span class="ident">neg</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_neg</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">i64x2</span>::<span class="ident">splat</span>(<span class="op">-</span><span class="number">1</span>))) }
}
<span class="doccomment">/// Returns 1 if any lane is nonzero or 0 if all lanes are zero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">any_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_any_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i64x2_any_true</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>()) }
}
<span class="doccomment">/// Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">all_true</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_all_true</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">i32</span> {
<span class="kw">unsafe</span> { <span class="ident">llvm_i64x2_all_true</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>()) }
}
<span class="doccomment">/// Shifts each lane to the left by the specified number of bits.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_shl</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shl</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">i64x2</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i64</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, sign</span>
<span class="doccomment">/// extending.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_shr_s</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">i64x2</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">i64</span>))) }
}
<span class="doccomment">/// Shifts each lane to the right by the specified number of bits, shifting in</span>
<span class="doccomment">/// zeros.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// Only the low bits of the shift amount are used if the shift amount is</span>
<span class="doccomment">/// greater than the lane width.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">shl</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_shr_u</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">amt</span>: <span class="ident">u32</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_shr</span>(<span class="ident">a</span>.<span class="ident">as_u64x2</span>(), <span class="ident">u64x2</span>::<span class="ident">splat</span>(<span class="ident">amt</span> <span class="kw">as</span> <span class="ident">u64</span>))) }
}
<span class="doccomment">/// Adds two 128-bit vectors as if they were two packed two 64-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_add</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_add</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">b</span>.<span class="ident">as_i64x2</span>())) }
}
<span class="doccomment">/// Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">i64x2</span>.<span class="ident">sub</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_sub</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_sub</span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>(), <span class="ident">b</span>.<span class="ident">as_i64x2</span>())) }
}
<span class="doccomment">/// Calculates the absolute value of each lane of a 128-bit vector interpreted</span>
<span class="doccomment">/// as four 32-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">abs</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_abs</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f32x4_abs</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Negates each lane of a 128-bit vector interpreted as four 32-bit floating</span>
<span class="doccomment">/// point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">abs</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_neg</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">f32x4_mul</span>(<span class="ident">a</span>, <span class="ident">transmute</span>(<span class="ident">f32x4</span>(<span class="op">-</span><span class="number">1.0</span>, <span class="op">-</span><span class="number">1.0</span>, <span class="op">-</span><span class="number">1.0</span>, <span class="op">-</span><span class="number">1.0</span>))) }
}
<span class="doccomment">/// Calculates the square root of each lane of a 128-bit vector interpreted as</span>
<span class="doccomment">/// four 32-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">sqrt</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_sqrt</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f32x4_sqrt</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Adds pairwise lanes of two 128-bit vectors interpreted as four 32-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_add</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_add</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Subtracts pairwise lanes of two 128-bit vectors interpreted as four 32-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">sub</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_sub</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_sub</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Multiplies pairwise lanes of two 128-bit vectors interpreted as four 32-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">mul</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_mul</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Divides pairwise lanes of two 128-bit vectors interpreted as four 32-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">div</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_div</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_div</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted</span>
<span class="doccomment">/// as four 32-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">min</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_min</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f32x4_min</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted</span>
<span class="doccomment">/// as four 32-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f32x4</span>.<span class="ident">max</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_max</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f32x4_max</span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>(), <span class="ident">b</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Calculates the absolute value of each lane of a 128-bit vector interpreted</span>
<span class="doccomment">/// as two 64-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">abs</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_abs</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f64x2_abs</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Negates each lane of a 128-bit vector interpreted as two 64-bit floating</span>
<span class="doccomment">/// point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">abs</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_neg</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">f64x2_mul</span>(<span class="ident">a</span>, <span class="ident">transmute</span>(<span class="ident">f64x2</span>(<span class="op">-</span><span class="number">1.0</span>, <span class="op">-</span><span class="number">1.0</span>))) }
}
<span class="doccomment">/// Calculates the square root of each lane of a 128-bit vector interpreted as</span>
<span class="doccomment">/// two 64-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">sqrt</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_sqrt</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f64x2_sqrt</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Adds pairwise lanes of two 128-bit vectors interpreted as two 64-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">add</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_add</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_add</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Subtracts pairwise lanes of two 128-bit vectors interpreted as two 64-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">sub</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_sub</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_sub</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Multiplies pairwise lanes of two 128-bit vectors interpreted as two 64-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">mul</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_mul</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_mul</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Divides pairwise lanes of two 128-bit vectors interpreted as two 64-bit</span>
<span class="doccomment">/// floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">div</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_div</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_div</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted</span>
<span class="doccomment">/// as two 64-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">min</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_min</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f64x2_min</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted</span>
<span class="doccomment">/// as two 64-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">f64x2</span>.<span class="ident">max</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_max</span>(<span class="ident">a</span>: <span class="ident">v128</span>, <span class="ident">b</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">llvm_f64x2_max</span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>(), <span class="ident">b</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as four 32-bit floating point numbers</span>
<span class="doccomment">/// into a 128-bit vector of four 32-bit signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// NaN is converted to 0 and if it's out of bounds it becomes the nearest</span>
<span class="doccomment">/// representable intger.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"i32x4.trunc_s/f32x4:sat"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_trunc_s_f32x4_sat</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as four 32-bit floating point numbers</span>
<span class="doccomment">/// into a 128-bit vector of four 32-bit unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// NaN is converted to 0 and if it's out of bounds it becomes the nearest</span>
<span class="doccomment">/// representable intger.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"i32x4.trunc_u/f32x4:sat"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i32x4_trunc_u_f32x4_sat</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">u32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f32x4</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as two 64-bit floating point numbers</span>
<span class="doccomment">/// into a 128-bit vector of two 64-bit signed integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// NaN is converted to 0 and if it's out of bounds it becomes the nearest</span>
<span class="doccomment">/// representable intger.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"i32x4.trunc_s/f32x4:sat"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_trunc_s_f64x2_sat</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">i64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as two 64-bit floating point numbers</span>
<span class="doccomment">/// into a 128-bit vector of two 64-bit unsigned integers.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// NaN is converted to 0 and if it's out of bounds it becomes the nearest</span>
<span class="doccomment">/// representable intger.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"i64x2.trunc_u/f64x2:sat"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">i64x2_trunc_u_f64x2_sat</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">u64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_f64x2</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as four 32-bit signed integers into a</span>
<span class="doccomment">/// 128-bit vector of four 32-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"f32x4.convert_s/i32x4"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_convert_s_i32x4</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">f32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i32x4</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as four 32-bit unsigned integers into a</span>
<span class="doccomment">/// 128-bit vector of four 32-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"f32x4.convert_u/i32x4"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f32x4_convert_u_i32x4</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">f32x4</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u32x4</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as two 64-bit signed integers into a</span>
<span class="doccomment">/// 128-bit vector of two 64-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"f64x2.convert_s/i64x2"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_convert_s_i64x2</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">f64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_i64x2</span>())) }
}
<span class="doccomment">/// Converts a 128-bit vector interpreted as two 64-bit unsigned integers into a</span>
<span class="doccomment">/// 128-bit vector of two 64-bit floating point numbers.</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="string">"f64x2.convert_u/i64x2"</span>))]</span>
<span class="kw">pub</span> <span class="kw">fn</span> <span class="ident">f64x2_convert_u_i64x2</span>(<span class="ident">a</span>: <span class="ident">v128</span>) <span class="op">-></span> <span class="ident">v128</span> {
<span class="kw">unsafe</span> { <span class="ident">transmute</span>(<span class="ident">simd_cast</span>::<span class="op"><</span><span class="kw">_</span>, <span class="ident">f64x2</span><span class="op">></span>(<span class="ident">a</span>.<span class="ident">as_u64x2</span>())) }
}
<span class="comment">// #[cfg(test)]</span>
<span class="comment">// pub mod tests {</span>
<span class="comment">// use super::*;</span>
<span class="comment">// use std;</span>
<span class="comment">// use std::mem;</span>
<span class="comment">// use std::prelude::v1::*;</span>
<span class="comment">// use wasm_bindgen_test::*;</span>
<span class="comment">//</span>
<span class="comment">// fn compare_bytes(a: v128, b: v128) {</span>
<span class="comment">// let a: [u8; 16] = unsafe { transmute(a) };</span>
<span class="comment">// let b: [u8; 16] = unsafe { transmute(b) };</span>
<span class="comment">// assert_eq!(a, b);</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn v128_const() {</span>
<span class="comment">// const A: v128 = unsafe {</span>
<span class="comment">// v128::const_([</span>
<span class="comment">// 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,</span>
<span class="comment">// ])</span>
<span class="comment">// };</span>
<span class="comment">// compare_bytes(A, A);</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// macro_rules! test_splat {</span>
<span class="comment">// ($test_id:ident: $id:ident($val:expr) => $($vals:expr),*) => {</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn $test_id() {</span>
<span class="comment">// const A: v128 = unsafe {</span>
<span class="comment">// $id::splat($val)</span>
<span class="comment">// };</span>
<span class="comment">// const B: v128 = unsafe {</span>
<span class="comment">// v128::const_([$($vals),*])</span>
<span class="comment">// };</span>
<span class="comment">// compare_bytes(A, B);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// test_splat!(i8x16_splat: i8x16(42) => 42,42,42,42,42,42,42,42,42,42,42,42,42,42,42,42);</span>
<span class="comment">// test_splat!(i16x8_splat: i16x8(42) => 42, 0, 42, 0, 42, 0, 42, 0, 42, 0, 42, 0, 42, 0, 42, 0);</span>
<span class="comment">// test_splat!(i32x4_splat: i32x4(42) => 42, 0, 0, 0, 42, 0, 0, 0, 42, 0, 0, 0, 42, 0, 0, 0);</span>
<span class="comment">// test_splat!(i64x2_splat: i64x2(42) => 42, 0, 0, 0, 0, 0, 0, 0, 42, 0, 0, 0, 0, 0, 0, 0);</span>
<span class="comment">// test_splat!(f32x4_splat: f32x4(42.) => 0, 0, 40, 66, 0, 0, 40, 66, 0, 0, 40, 66, 0, 0, 40, 66);</span>
<span class="comment">// test_splat!(f64x2_splat: f64x2(42.) => 0, 0, 0, 0, 0, 0, 69, 64, 0, 0, 0, 0, 0, 0, 69, 64);</span>
<span class="comment">//</span>
<span class="comment">// // tests extract and replace lanes</span>
<span class="comment">// macro_rules! test_extract {</span>
<span class="comment">// ($test_id:ident: $id:ident[$ety:ident] => $extract_fn:ident | [$val:expr; $count:expr]</span>
<span class="comment">// | [$($vals:expr),*] => ($other:expr)</span>
<span class="comment">// | $($ids:expr),*) => {</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn $test_id() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// // splat vector and check that all indices contain the same value</span>
<span class="comment">// // splatted:</span>
<span class="comment">// const A: v128 = unsafe {</span>
<span class="comment">// $id::splat($val)</span>
<span class="comment">// };</span>
<span class="comment">// $(</span>
<span class="comment">// assert_eq!($id::$extract_fn(A, $ids) as $ety, $val);</span>
<span class="comment">// )*;</span>
<span class="comment">//</span>
<span class="comment">// // create a vector from array and check that the indices contain</span>
<span class="comment">// // the same values as in the array:</span>
<span class="comment">// let arr: [$ety; $count] = [$($vals),*];</span>
<span class="comment">// let mut vec: v128 = transmute(arr);</span>
<span class="comment">// $(</span>
<span class="comment">// assert_eq!($id::$extract_fn(vec, $ids) as $ety, arr[$ids]);</span>
<span class="comment">// )*;</span>
<span class="comment">//</span>
<span class="comment">// // replace lane 0 with another value</span>
<span class="comment">// vec = $id::replace_lane(vec, 0, $other);</span>
<span class="comment">// assert_ne!($id::$extract_fn(vec, 0) as $ety, arr[0]);</span>
<span class="comment">// assert_eq!($id::$extract_fn(vec, 0) as $ety, $other);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// test_extract!(i8x16_extract_u: i8x16[u8] => extract_lane_u | [255; 16]</span>
<span class="comment">// | [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] => (42)</span>
<span class="comment">// | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15</span>
<span class="comment">// );</span>
<span class="comment">// test_extract!(i8x16_extract_s: i8x16[i8] => extract_lane_s | [-122; 16]</span>
<span class="comment">// | [0, -1, 2, -3, 4, -5, 6, -7, 8, -9, 10, -11, 12, -13, 14, -15] => (-42)</span>
<span class="comment">// | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15</span>
<span class="comment">// );</span>
<span class="comment">//</span>
<span class="comment">// test_extract!(i16x8_extract_u: i16x8[u16] => extract_lane_u | [255; 8]</span>
<span class="comment">// | [0, 1, 2, 3, 4, 5, 6, 7] => (42) | 0, 1, 2, 3, 4, 5, 6, 7</span>
<span class="comment">// );</span>
<span class="comment">// test_extract!(i16x8_extract_s: i16x8[i16] => extract_lane_s | [-122; 8]</span>
<span class="comment">// | [0, -1, 2, -3, 4, -5, 6, -7] => (-42) | 0, 1, 2, 3, 4, 5, 6, 7</span>
<span class="comment">// );</span>
<span class="comment">// test_extract!(i32x4_extract: i32x4[i32] => extract_lane | [-122; 4]</span>
<span class="comment">// | [0, -1, 2, -3] => (42) | 0, 1, 2, 3</span>
<span class="comment">// );</span>
<span class="comment">// test_extract!(i64x2_extract: i64x2[i64] => extract_lane | [-122; 2]</span>
<span class="comment">// | [0, -1] => (42) | 0, 1</span>
<span class="comment">// );</span>
<span class="comment">// test_extract!(f32x4_extract: f32x4[f32] => extract_lane | [-122.; 4]</span>
<span class="comment">// | [0., -1., 2., -3.] => (42.) | 0, 1, 2, 3</span>
<span class="comment">// );</span>
<span class="comment">// test_extract!(f64x2_extract: f64x2[f64] => extract_lane | [-122.; 2]</span>
<span class="comment">// | [0., -1.] => (42.) | 0, 1</span>
<span class="comment">// );</span>
<span class="comment">//</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn v8x16_shuffle() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let a = [0_u8, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15];</span>
<span class="comment">// let b = [</span>
<span class="comment">// 16_u8, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,</span>
<span class="comment">// 31,</span>
<span class="comment">// ];</span>
<span class="comment">//</span>
<span class="comment">// let vec_a: v128 = transmute(a);</span>
<span class="comment">// let vec_b: v128 = transmute(b);</span>
<span class="comment">//</span>
<span class="comment">// let vec_r = v8x16_shuffle!(</span>
<span class="comment">// vec_a,</span>
<span class="comment">// vec_b,</span>
<span class="comment">// [0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30]</span>
<span class="comment">// );</span>
<span class="comment">//</span>
<span class="comment">// let e =</span>
<span class="comment">// [0_u8, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30];</span>
<span class="comment">// let vec_e: v128 = transmute(e);</span>
<span class="comment">// compare_bytes(vec_r, vec_e);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// macro_rules! floating_point {</span>
<span class="comment">// (f32) => {</span>
<span class="comment">// true</span>
<span class="comment">// };</span>
<span class="comment">// (f64) => {</span>
<span class="comment">// true</span>
<span class="comment">// };</span>
<span class="comment">// ($id:ident) => {</span>
<span class="comment">// false</span>
<span class="comment">// };</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// trait IsNan: Sized {</span>
<span class="comment">// fn is_nan(self) -> bool {</span>
<span class="comment">// false</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// impl IsNan for i8 {}</span>
<span class="comment">// impl IsNan for i16 {}</span>
<span class="comment">// impl IsNan for i32 {}</span>
<span class="comment">// impl IsNan for i64 {}</span>
<span class="comment">//</span>
<span class="comment">// macro_rules! test_bop {</span>
<span class="comment">// ($id:ident[$ety:ident; $ecount:expr] |</span>
<span class="comment">// $binary_op:ident [$op_test_id:ident] :</span>
<span class="comment">// ([$($in_a:expr),*], [$($in_b:expr),*]) => [$($out:expr),*]) => {</span>
<span class="comment">// test_bop!(</span>
<span class="comment">// $id[$ety; $ecount] => $ety | $binary_op [ $op_test_id ]:</span>
<span class="comment">// ([$($in_a),*], [$($in_b),*]) => [$($out),*]</span>
<span class="comment">// );</span>
<span class="comment">//</span>
<span class="comment">// };</span>
<span class="comment">// ($id:ident[$ety:ident; $ecount:expr] => $oty:ident |</span>
<span class="comment">// $binary_op:ident [$op_test_id:ident] :</span>
<span class="comment">// ([$($in_a:expr),*], [$($in_b:expr),*]) => [$($out:expr),*]) => {</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn $op_test_id() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let a_input: [$ety; $ecount] = [$($in_a),*];</span>
<span class="comment">// let b_input: [$ety; $ecount] = [$($in_b),*];</span>
<span class="comment">// let output: [$oty; $ecount] = [$($out),*];</span>
<span class="comment">//</span>
<span class="comment">// let a_vec_in: v128 = transmute(a_input);</span>
<span class="comment">// let b_vec_in: v128 = transmute(b_input);</span>
<span class="comment">// let vec_res: v128 = $id::$binary_op(a_vec_in, b_vec_in);</span>
<span class="comment">//</span>
<span class="comment">// let res: [$oty; $ecount] = transmute(vec_res);</span>
<span class="comment">//</span>
<span class="comment">// if !floating_point!($ety) {</span>
<span class="comment">// assert_eq!(res, output);</span>
<span class="comment">// } else {</span>
<span class="comment">// for i in 0..$ecount {</span>
<span class="comment">// let r = res[i];</span>
<span class="comment">// let o = output[i];</span>
<span class="comment">// assert_eq!(r.is_nan(), o.is_nan());</span>
<span class="comment">// if !r.is_nan() {</span>
<span class="comment">// assert_eq!(r, o);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// macro_rules! test_bops {</span>
<span class="comment">// ($id:ident[$ety:ident; $ecount:expr] |</span>
<span class="comment">// $binary_op:ident [$op_test_id:ident]:</span>
<span class="comment">// ([$($in_a:expr),*], $in_b:expr) => [$($out:expr),*]) => {</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn $op_test_id() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let a_input: [$ety; $ecount] = [$($in_a),*];</span>
<span class="comment">// let output: [$ety; $ecount] = [$($out),*];</span>
<span class="comment">//</span>
<span class="comment">// let a_vec_in: v128 = transmute(a_input);</span>
<span class="comment">// let vec_res: v128 = $id::$binary_op(a_vec_in, $in_b);</span>
<span class="comment">//</span>
<span class="comment">// let res: [$ety; $ecount] = transmute(vec_res);</span>
<span class="comment">// assert_eq!(res, output);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// macro_rules! test_uop {</span>
<span class="comment">// ($id:ident[$ety:ident; $ecount:expr] |</span>
<span class="comment">// $unary_op:ident [$op_test_id:ident]: [$($in_a:expr),*] => [$($out:expr),*]) => {</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn $op_test_id() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let a_input: [$ety; $ecount] = [$($in_a),*];</span>
<span class="comment">// let output: [$ety; $ecount] = [$($out),*];</span>
<span class="comment">//</span>
<span class="comment">// let a_vec_in: v128 = transmute(a_input);</span>
<span class="comment">// let vec_res: v128 = $id::$unary_op(a_vec_in);</span>
<span class="comment">//</span>
<span class="comment">// let res: [$ety; $ecount] = transmute(vec_res);</span>
<span class="comment">// assert_eq!(res, output);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | add[i8x16_add_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i8::max_value(), 1, 1, 1, 1, 1, 1, 1, 1],</span>
<span class="comment">// [8, i8::min_value(), 10, 11, 12, 13, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1]) =></span>
<span class="comment">// [8, i8::max_value(), 12, 14, 16, 18, 20, i8::min_value(), 2, 2, 2, 2, 2, 2, 2, 2]);</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | sub[i8x16_sub_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, -1, 1, 1, 1, 1, 1, 1, 1, 1],</span>
<span class="comment">// [8, i8::min_value(), 10, 11, 12, 13, 14, i8::max_value(), 1, 1, 1, 1, 1, 1, 1, 1]) =></span>
<span class="comment">// [-8, i8::max_value(), -8, -8, -8, -8, -8, i8::min_value(), 0, 0, 0, 0, 0, 0, 0, 0]);</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | mul[i8x16_mul_test]:</span>
<span class="comment">// ([0, -2, 2, 3, 4, 5, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1],</span>
<span class="comment">// [8, i8::min_value(), 10, 11, 12, 13, 14, i8::max_value(), 1, 1, 1, 1, 1, 1, 1, 1]) =></span>
<span class="comment">// [0, 0, 20, 33, 48, 65, 84, -2, 1, 1, 1, 1, 1, 1, 1, 1]);</span>
<span class="comment">// test_uop!(i8x16[i8; 16] | neg[i8x16_neg_test]:</span>
<span class="comment">// [8, i8::min_value(), 10, 11, 12, 13, 14, i8::max_value(), 1, 1, 1, 1, 1, 1, 1, 1] =></span>
<span class="comment">// [-8, i8::min_value(), -10, -11, -12, -13, -14, i8::min_value() + 1, -1, -1, -1, -1, -1, -1, -1, -1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | add[i16x8_add_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i16::max_value()],</span>
<span class="comment">// [8, i16::min_value(), 10, 11, 12, 13, 14, 1]) =></span>
<span class="comment">// [8, i16::max_value(), 12, 14, 16, 18, 20, i16::min_value()]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | sub[i16x8_sub_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, -1],</span>
<span class="comment">// [8, i16::min_value(), 10, 11, 12, 13, 14, i16::max_value()]) =></span>
<span class="comment">// [-8, i16::max_value(), -8, -8, -8, -8, -8, i16::min_value()]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | mul[i16x8_mul_test]:</span>
<span class="comment">// ([0, -2, 2, 3, 4, 5, 6, 2],</span>
<span class="comment">// [8, i16::min_value(), 10, 11, 12, 13, 14, i16::max_value()]) =></span>
<span class="comment">// [0, 0, 20, 33, 48, 65, 84, -2]);</span>
<span class="comment">// test_uop!(i16x8[i16; 8] | neg[i16x8_neg_test]:</span>
<span class="comment">// [8, i16::min_value(), 10, 11, 12, 13, 14, i16::max_value()] =></span>
<span class="comment">// [-8, i16::min_value(), -10, -11, -12, -13, -14, i16::min_value() + 1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | add[i32x4_add_test]:</span>
<span class="comment">// ([0, -1, 2, i32::max_value()],</span>
<span class="comment">// [8, i32::min_value(), 10, 1]) =></span>
<span class="comment">// [8, i32::max_value(), 12, i32::min_value()]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | sub[i32x4_sub_test]:</span>
<span class="comment">// ([0, -1, 2, -1],</span>
<span class="comment">// [8, i32::min_value(), 10, i32::max_value()]) =></span>
<span class="comment">// [-8, i32::max_value(), -8, i32::min_value()]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | mul[i32x4_mul_test]:</span>
<span class="comment">// ([0, -2, 2, 2],</span>
<span class="comment">// [8, i32::min_value(), 10, i32::max_value()]) =></span>
<span class="comment">// [0, 0, 20, -2]);</span>
<span class="comment">// test_uop!(i32x4[i32; 4] | neg[i32x4_neg_test]:</span>
<span class="comment">// [8, i32::min_value(), 10, i32::max_value()] =></span>
<span class="comment">// [-8, i32::min_value(), -10, i32::min_value() + 1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | add[i64x2_add_test]:</span>
<span class="comment">// ([-1, i64::max_value()],</span>
<span class="comment">// [i64::min_value(), 1]) =></span>
<span class="comment">// [i64::max_value(), i64::min_value()]);</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | sub[i64x2_sub_test]:</span>
<span class="comment">// ([-1, -1],</span>
<span class="comment">// [i64::min_value(), i64::max_value()]) =></span>
<span class="comment">// [ i64::max_value(), i64::min_value()]);</span>
<span class="comment">// // note: mul for i64x2 is not part of the spec</span>
<span class="comment">// test_uop!(i64x2[i64; 2] | neg[i64x2_neg_test]:</span>
<span class="comment">// [i64::min_value(), i64::max_value()] =></span>
<span class="comment">// [i64::min_value(), i64::min_value() + 1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bops!(i8x16[i8; 16] | shl[i8x16_shl_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i8::max_value(), 1, 1, 1, 1, 1, 1, 1, 1], 1) =></span>
<span class="comment">// [0, -2, 4, 6, 8, 10, 12, -2, 2, 2, 2, 2, 2, 2, 2, 2]);</span>
<span class="comment">// test_bops!(i16x8[i16; 8] | shl[i16x8_shl_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i16::max_value()], 1) =></span>
<span class="comment">// [0, -2, 4, 6, 8, 10, 12, -2]);</span>
<span class="comment">// test_bops!(i32x4[i32; 4] | shl[i32x4_shl_test]:</span>
<span class="comment">// ([0, -1, 2, 3], 1) => [0, -2, 4, 6]);</span>
<span class="comment">// test_bops!(i64x2[i64; 2] | shl[i64x2_shl_test]:</span>
<span class="comment">// ([0, -1], 1) => [0, -2]);</span>
<span class="comment">//</span>
<span class="comment">// test_bops!(i8x16[i8; 16] | shr_s[i8x16_shr_s_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i8::max_value(), 1, 1, 1, 1, 1, 1, 1, 1], 1) =></span>
<span class="comment">// [0, -1, 1, 1, 2, 2, 3, 63, 0, 0, 0, 0, 0, 0, 0, 0]);</span>
<span class="comment">// test_bops!(i16x8[i16; 8] | shr_s[i16x8_shr_s_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i16::max_value()], 1) =></span>
<span class="comment">// [0, -1, 1, 1, 2, 2, 3, i16::max_value() / 2]);</span>
<span class="comment">// test_bops!(i32x4[i32; 4] | shr_s[i32x4_shr_s_test]:</span>
<span class="comment">// ([0, -1, 2, 3], 1) => [0, -1, 1, 1]);</span>
<span class="comment">// test_bops!(i64x2[i64; 2] | shr_s[i64x2_shr_s_test]:</span>
<span class="comment">// ([0, -1], 1) => [0, -1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bops!(i8x16[i8; 16] | shr_u[i8x16_uhr_u_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i8::max_value(), 1, 1, 1, 1, 1, 1, 1, 1], 1) =></span>
<span class="comment">// [0, i8::max_value(), 1, 1, 2, 2, 3, 63, 0, 0, 0, 0, 0, 0, 0, 0]);</span>
<span class="comment">// test_bops!(i16x8[i16; 8] | shr_u[i16x8_uhr_u_test]:</span>
<span class="comment">// ([0, -1, 2, 3, 4, 5, 6, i16::max_value()], 1) =></span>
<span class="comment">// [0, i16::max_value(), 1, 1, 2, 2, 3, i16::max_value() / 2]);</span>
<span class="comment">// test_bops!(i32x4[i32; 4] | shr_u[i32x4_uhr_u_test]:</span>
<span class="comment">// ([0, -1, 2, 3], 1) => [0, i32::max_value(), 1, 1]);</span>
<span class="comment">// test_bops!(i64x2[i64; 2] | shr_u[i64x2_uhr_u_test]:</span>
<span class="comment">// ([0, -1], 1) => [0, i64::max_value()]);</span>
<span class="comment">//</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn v128_bitwise_logical_ops() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let a: [u32; 4] = [u32::max_value(), 0, u32::max_value(), 0];</span>
<span class="comment">// let b: [u32; 4] = [u32::max_value(); 4];</span>
<span class="comment">// let c: [u32; 4] = [0; 4];</span>
<span class="comment">//</span>
<span class="comment">// let vec_a: v128 = transmute(a);</span>
<span class="comment">// let vec_b: v128 = transmute(b);</span>
<span class="comment">// let vec_c: v128 = transmute(c);</span>
<span class="comment">//</span>
<span class="comment">// let r: v128 = v128::and(vec_a, vec_a);</span>
<span class="comment">// compare_bytes(r, vec_a);</span>
<span class="comment">// let r: v128 = v128::and(vec_a, vec_b);</span>
<span class="comment">// compare_bytes(r, vec_a);</span>
<span class="comment">// let r: v128 = v128::or(vec_a, vec_b);</span>
<span class="comment">// compare_bytes(r, vec_b);</span>
<span class="comment">// let r: v128 = v128::not(vec_b);</span>
<span class="comment">// compare_bytes(r, vec_c);</span>
<span class="comment">// let r: v128 = v128::xor(vec_a, vec_c);</span>
<span class="comment">// compare_bytes(r, vec_a);</span>
<span class="comment">//</span>
<span class="comment">// let r: v128 = v128::bitselect(vec_b, vec_c, vec_b);</span>
<span class="comment">// compare_bytes(r, vec_b);</span>
<span class="comment">// let r: v128 = v128::bitselect(vec_b, vec_c, vec_c);</span>
<span class="comment">// compare_bytes(r, vec_c);</span>
<span class="comment">// let r: v128 = v128::bitselect(vec_b, vec_c, vec_a);</span>
<span class="comment">// compare_bytes(r, vec_a);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// macro_rules! test_bool_red {</span>
<span class="comment">// ($id:ident[$test_id:ident] | [$($true:expr),*] | [$($false:expr),*] | [$($alt:expr),*]) => {</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn $test_id() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let vec_a: v128 = transmute([$($true),*]); // true</span>
<span class="comment">// let vec_b: v128 = transmute([$($false),*]); // false</span>
<span class="comment">// let vec_c: v128 = transmute([$($alt),*]); // alternating</span>
<span class="comment">//</span>
<span class="comment">// assert_eq!($id::any_true(vec_a), 1);</span>
<span class="comment">// assert_eq!($id::any_true(vec_b), 0);</span>
<span class="comment">// assert_eq!($id::any_true(vec_c), 1);</span>
<span class="comment">//</span>
<span class="comment">// assert_eq!($id::all_true(vec_a), 1);</span>
<span class="comment">// assert_eq!($id::all_true(vec_b), 0);</span>
<span class="comment">// assert_eq!($id::all_true(vec_c), 0);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// test_bool_red!(</span>
<span class="comment">// i8x16[i8x16_boolean_reductions]</span>
<span class="comment">// | [1_i8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]</span>
<span class="comment">// | [0_i8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]</span>
<span class="comment">// | [1_i8, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]</span>
<span class="comment">// );</span>
<span class="comment">// test_bool_red!(</span>
<span class="comment">// i16x8[i16x8_boolean_reductions]</span>
<span class="comment">// | [1_i16, 1, 1, 1, 1, 1, 1, 1]</span>
<span class="comment">// | [0_i16, 0, 0, 0, 0, 0, 0, 0]</span>
<span class="comment">// | [1_i16, 0, 1, 0, 1, 0, 1, 0]</span>
<span class="comment">// );</span>
<span class="comment">// test_bool_red!(</span>
<span class="comment">// i32x4[i32x4_boolean_reductions]</span>
<span class="comment">// | [1_i32, 1, 1, 1]</span>
<span class="comment">// | [0_i32, 0, 0, 0]</span>
<span class="comment">// | [1_i32, 0, 1, 0]</span>
<span class="comment">// );</span>
<span class="comment">// test_bool_red!(</span>
<span class="comment">// i64x2[i64x2_boolean_reductions] | [1_i64, 1] | [0_i64, 0] | [1_i64, 0]</span>
<span class="comment">// );</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | eq[i8x16_eq_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],</span>
<span class="comment">// [0, 2, 2, 4, 4, 6, 6, 7, 8, 10, 10, 12, 12, 14, 14, 15]) =></span>
<span class="comment">// [-1, 0, -1, 0 ,-1, 0, -1, -1, -1, 0, -1, 0 ,-1, 0, -1, -1]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | eq[i16x8_eq_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 2, 4, 4, 6, 6, 7]) =></span>
<span class="comment">// [-1, 0, -1, 0 ,-1, 0, -1, -1]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | eq[i32x4_eq_test]:</span>
<span class="comment">// ([0, 1, 2, 3], [0, 2, 2, 4]) => [-1, 0, -1, 0]);</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | eq[i64x2_eq_test]: ([0, 1], [0, 2]) => [-1, 0]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] => i32 | eq[f32x4_eq_test]:</span>
<span class="comment">// ([0., 1., 2., 3.], [0., 2., 2., 4.]) => [-1, 0, -1, 0]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] => i64 | eq[f64x2_eq_test]: ([0., 1.], [0., 2.]) => [-1, 0]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | ne[i8x16_ne_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],</span>
<span class="comment">// [0, 2, 2, 4, 4, 6, 6, 7, 8, 10, 10, 12, 12, 14, 14, 15]) =></span>
<span class="comment">// [0, -1, 0, -1 ,0, -1, 0, 0, 0, -1, 0, -1 ,0, -1, 0, 0]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | ne[i16x8_ne_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 2, 4, 4, 6, 6, 7]) =></span>
<span class="comment">// [0, -1, 0, -1 ,0, -1, 0, 0]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | ne[i32x4_ne_test]:</span>
<span class="comment">// ([0, 1, 2, 3], [0, 2, 2, 4]) => [0, -1, 0, -1]);</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | ne[i64x2_ne_test]: ([0, 1], [0, 2]) => [0, -1]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] => i32 | ne[f32x4_ne_test]:</span>
<span class="comment">// ([0., 1., 2., 3.], [0., 2., 2., 4.]) => [0, -1, 0, -1]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] => i64 | ne[f64x2_ne_test]: ([0., 1.], [0., 2.]) => [0, -1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | lt[i8x16_lt_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],</span>
<span class="comment">// [0, 2, 2, 4, 4, 6, 6, 7, 8, 10, 10, 12, 12, 14, 14, 15]) =></span>
<span class="comment">// [0, -1, 0, -1 ,0, -1, 0, 0, 0, -1, 0, -1 ,0, -1, 0, 0]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | lt[i16x8_lt_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 2, 4, 4, 6, 6, 7]) =></span>
<span class="comment">// [0, -1, 0, -1 ,0, -1, 0, 0]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | lt[i32x4_lt_test]:</span>
<span class="comment">// ([0, 1, 2, 3], [0, 2, 2, 4]) => [0, -1, 0, -1]);</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | lt[i64x2_lt_test]: ([0, 1], [0, 2]) => [0, -1]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] => i32 | lt[f32x4_lt_test]:</span>
<span class="comment">// ([0., 1., 2., 3.], [0., 2., 2., 4.]) => [0, -1, 0, -1]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] => i64 | lt[f64x2_lt_test]: ([0., 1.], [0., 2.]) => [0, -1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | gt[i8x16_gt_test]:</span>
<span class="comment">// ([0, 2, 2, 4, 4, 6, 6, 7, 8, 10, 10, 12, 12, 14, 14, 15],</span>
<span class="comment">// [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) =></span>
<span class="comment">// [0, -1, 0, -1 ,0, -1, 0, 0, 0, -1, 0, -1 ,0, -1, 0, 0]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | gt[i16x8_gt_test]:</span>
<span class="comment">// ([0, 2, 2, 4, 4, 6, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7]) =></span>
<span class="comment">// [0, -1, 0, -1 ,0, -1, 0, 0]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | gt[i32x4_gt_test]:</span>
<span class="comment">// ([0, 2, 2, 4], [0, 1, 2, 3]) => [0, -1, 0, -1]);</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | gt[i64x2_gt_test]: ([0, 2], [0, 1]) => [0, -1]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] => i32 | gt[f32x4_gt_test]:</span>
<span class="comment">// ([0., 2., 2., 4.], [0., 1., 2., 3.]) => [0, -1, 0, -1]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] => i64 | gt[f64x2_gt_test]: ([0., 2.], [0., 1.]) => [0, -1]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | ge[i8x16_ge_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],</span>
<span class="comment">// [0, 2, 2, 4, 4, 6, 6, 7, 8, 10, 10, 12, 12, 14, 14, 15]) =></span>
<span class="comment">// [-1, 0, -1, 0 ,-1, 0, -1, -1, -1, 0, -1, 0 ,-1, 0, -1, -1]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | ge[i16x8_ge_test]:</span>
<span class="comment">// ([0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 2, 4, 4, 6, 6, 7]) =></span>
<span class="comment">// [-1, 0, -1, 0 ,-1, 0, -1, -1]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | ge[i32x4_ge_test]:</span>
<span class="comment">// ([0, 1, 2, 3], [0, 2, 2, 4]) => [-1, 0, -1, 0]);</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | ge[i64x2_ge_test]: ([0, 1], [0, 2]) => [-1, 0]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] => i32 | ge[f32x4_ge_test]:</span>
<span class="comment">// ([0., 1., 2., 3.], [0., 2., 2., 4.]) => [-1, 0, -1, 0]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] => i64 | ge[f64x2_ge_test]: ([0., 1.], [0., 2.]) => [-1, 0]);</span>
<span class="comment">//</span>
<span class="comment">// test_bop!(i8x16[i8; 16] | le[i8x16_le_test]:</span>
<span class="comment">// ([0, 2, 2, 4, 4, 6, 6, 7, 8, 10, 10, 12, 12, 14, 14, 15],</span>
<span class="comment">// [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]</span>
<span class="comment">// ) =></span>
<span class="comment">// [-1, 0, -1, 0 ,-1, 0, -1, -1, -1, 0, -1, 0 ,-1, 0, -1, -1]);</span>
<span class="comment">// test_bop!(i16x8[i16; 8] | le[i16x8_le_test]:</span>
<span class="comment">// ([0, 2, 2, 4, 4, 6, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7]) =></span>
<span class="comment">// [-1, 0, -1, 0 ,-1, 0, -1, -1]);</span>
<span class="comment">// test_bop!(i32x4[i32; 4] | le[i32x4_le_test]:</span>
<span class="comment">// ([0, 2, 2, 4], [0, 1, 2, 3]) => [-1, 0, -1, 0]);</span>
<span class="comment">// test_bop!(i64x2[i64; 2] | le[i64x2_le_test]: ([0, 2], [0, 1]) => [-1, 0]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] => i32 | le[f32x4_le_test]:</span>
<span class="comment">// ([0., 2., 2., 4.], [0., 1., 2., 3.]) => [-1, 0, -1, -0]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] => i64 | le[f64x2_le_test]: ([0., 2.], [0., 1.]) => [-1, 0]);</span>
<span class="comment">//</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn v128_bitwise_load_store() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let mut arr: [i32; 4] = [0, 1, 2, 3];</span>
<span class="comment">//</span>
<span class="comment">// let vec = v128::load(arr.as_ptr() as *const v128);</span>
<span class="comment">// let vec = i32x4::add(vec, vec);</span>
<span class="comment">// v128::store(arr.as_mut_ptr() as *mut v128, vec);</span>
<span class="comment">//</span>
<span class="comment">// assert_eq!(arr, [0, 2, 4, 6]);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// test_uop!(f32x4[f32; 4] | neg[f32x4_neg_test]: [0., 1., 2., 3.] => [ 0., -1., -2., -3.]);</span>
<span class="comment">// test_uop!(f32x4[f32; 4] | abs[f32x4_abs_test]: [0., -1., 2., -3.] => [ 0., 1., 2., 3.]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | min[f32x4_min_test]:</span>
<span class="comment">// ([0., -1., 7., 8.], [1., -3., -4., 10.]) => [0., -3., -4., 8.]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | min[f32x4_min_test_nan]:</span>
<span class="comment">// ([0., -1., 7., 8.], [1., -3., -4., std::f32::NAN])</span>
<span class="comment">// => [0., -3., -4., std::f32::NAN]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | max[f32x4_max_test]:</span>
<span class="comment">// ([0., -1., 7., 8.], [1., -3., -4., 10.]) => [1., -1., 7., 10.]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | max[f32x4_max_test_nan]:</span>
<span class="comment">// ([0., -1., 7., 8.], [1., -3., -4., std::f32::NAN])</span>
<span class="comment">// => [1., -1., 7., std::f32::NAN]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | add[f32x4_add_test]:</span>
<span class="comment">// ([0., -1., 7., 8.], [1., -3., -4., 10.]) => [1., -4., 3., 18.]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | sub[f32x4_sub_test]:</span>
<span class="comment">// ([0., -1., 7., 8.], [1., -3., -4., 10.]) => [-1., 2., 11., -2.]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | mul[f32x4_mul_test]:</span>
<span class="comment">// ([0., -1., 7., 8.], [1., -3., -4., 10.]) => [0., 3., -28., 80.]);</span>
<span class="comment">// test_bop!(f32x4[f32; 4] | div[f32x4_div_test]:</span>
<span class="comment">// ([0., -8., 70., 8.], [1., 4., 10., 2.]) => [0., -2., 7., 4.]);</span>
<span class="comment">//</span>
<span class="comment">// test_uop!(f64x2[f64; 2] | neg[f64x2_neg_test]: [0., 1.] => [ 0., -1.]);</span>
<span class="comment">// test_uop!(f64x2[f64; 2] | abs[f64x2_abs_test]: [0., -1.] => [ 0., 1.]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | min[f64x2_min_test]:</span>
<span class="comment">// ([0., -1.], [1., -3.]) => [0., -3.]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | min[f64x2_min_test_nan]:</span>
<span class="comment">// ([7., 8.], [-4., std::f64::NAN])</span>
<span class="comment">// => [ -4., std::f64::NAN]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | max[f64x2_max_test]:</span>
<span class="comment">// ([0., -1.], [1., -3.]) => [1., -1.]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | max[f64x2_max_test_nan]:</span>
<span class="comment">// ([7., 8.], [ -4., std::f64::NAN])</span>
<span class="comment">// => [7., std::f64::NAN]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | add[f64x2_add_test]:</span>
<span class="comment">// ([0., -1.], [1., -3.]) => [1., -4.]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | sub[f64x2_sub_test]:</span>
<span class="comment">// ([0., -1.], [1., -3.]) => [-1., 2.]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | mul[f64x2_mul_test]:</span>
<span class="comment">// ([0., -1.], [1., -3.]) => [0., 3.]);</span>
<span class="comment">// test_bop!(f64x2[f64; 2] | div[f64x2_div_test]:</span>
<span class="comment">// ([0., -8.], [1., 4.]) => [0., -2.]);</span>
<span class="comment">//</span>
<span class="comment">// macro_rules! test_conv {</span>
<span class="comment">// ($test_id:ident | $conv_id:ident | $to_ty:ident | $from:expr, $to:expr) => {</span>
<span class="comment">// #[wasm_bindgen_test]</span>
<span class="comment">// fn $test_id() {</span>
<span class="comment">// unsafe {</span>
<span class="comment">// let from: v128 = transmute($from);</span>
<span class="comment">// let to: v128 = transmute($to);</span>
<span class="comment">//</span>
<span class="comment">// let r: v128 = $to_ty::$conv_id(from);</span>
<span class="comment">//</span>
<span class="comment">// compare_bytes(r, to);</span>
<span class="comment">// }</span>
<span class="comment">// }</span>
<span class="comment">// };</span>
<span class="comment">// }</span>
<span class="comment">//</span>
<span class="comment">// test_conv!(</span>
<span class="comment">// f32x4_convert_s_i32x4 | convert_s_i32x4 | f32x4 | [1_i32, 2, 3, 4],</span>
<span class="comment">// [1_f32, 2., 3., 4.]</span>
<span class="comment">// );</span>
<span class="comment">// test_conv!(</span>
<span class="comment">// f32x4_convert_u_i32x4</span>
<span class="comment">// | convert_u_i32x4</span>
<span class="comment">// | f32x4</span>
<span class="comment">// | [u32::max_value(), 2, 3, 4],</span>
<span class="comment">// [u32::max_value() as f32, 2., 3., 4.]</span>
<span class="comment">// );</span>
<span class="comment">// test_conv!(</span>
<span class="comment">// f64x2_convert_s_i64x2 | convert_s_i64x2 | f64x2 | [1_i64, 2],</span>
<span class="comment">// [1_f64, 2.]</span>
<span class="comment">// );</span>
<span class="comment">// test_conv!(</span>
<span class="comment">// f64x2_convert_u_i64x2</span>
<span class="comment">// | convert_u_i64x2</span>
<span class="comment">// | f64x2</span>
<span class="comment">// | [u64::max_value(), 2],</span>
<span class="comment">// [18446744073709552000.0, 2.]</span>
<span class="comment">// );</span>
<span class="comment">//</span>
<span class="comment">// // FIXME: this fails, and produces -2147483648 instead of saturating at</span>
<span class="comment">// // i32::max_value() test_conv!(i32x4_trunc_s_f32x4_sat | trunc_s_f32x4_sat</span>
<span class="comment">// // | i32x4 | [1_f32, 2., (i32::max_value() as f32 + 1.), 4.],</span>
<span class="comment">// // [1_i32, 2, i32::max_value(), 4]); FIXME: add other saturating tests</span>
<span class="comment">// }</span>
</pre></div>
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