<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="Source to the Rust file `src/libcore/../stdsimd/crates/core_arch/src/x86_64/xsave.rs`."><meta name="keywords" content="rust, rustlang, rust-lang"><title>xsave.rs.html -- source</title><link rel="stylesheet" type="text/css" href="../../../../../../../../normalize1.35.0.css"><link rel="stylesheet" type="text/css" href="../../../../../../../../rustdoc1.35.0.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../../../../../../../../dark1.35.0.css"><link rel="stylesheet" type="text/css" href="../../../../../../../../light1.35.0.css" id="themeStyle"><script src="../../../../../../../../storage1.35.0.js"></script><noscript><link rel="stylesheet" href="../../../../../../../../noscript1.35.0.css"></noscript><link rel="shortcut icon" href="../../../../../../../../favicon1.35.0.ico"><style type="text/css">#crate-search{background-image:url("../../../../../../../../down-arrow1.35.0.svg");}</style></head><body class="rustdoc source"><!--[if lte IE 8]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="sidebar"><div class="sidebar-menu">☰</div><a href='../../../../../../../../core/index.html'><img src='../../../../../../../../rust-logo1.35.0.png' alt='logo' width='100'></a></nav><div class="theme-picker"><button id="theme-picker" aria-label="Pick another theme!"><img src="../../../../../../../../brush1.35.0.svg" width="18" alt="Pick another theme!"></button><div id="theme-choices"></div></div><script src="../../../../../../../../theme1.35.0.js"></script><nav class="sub"><form class="search-form js-only"><div class="search-container"><div><select id="crate-search"><option value="All crates">All crates</option></select><input class="search-input" name="search" autocomplete="off" spellcheck="false" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"></div><a id="settings-menu" href="../../../../../../../../settings.html"><img src="../../../../../../../../wheel1.35.0.svg" width="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><pre class="line-numbers"><span id="1"> 1</span>
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</pre><div class="example-wrap"><pre class="rust ">
<span class="doccomment">//! `x86_64`'s `xsave` and `xsaveopt` target feature intrinsics</span>
<span class="attribute">#![<span class="ident">cfg_attr</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"cargo-clippy"</span>, <span class="ident">allow</span>(<span class="ident">clippy</span>::<span class="ident">module_name_repetitions</span>))]</span>
<span class="attribute">#[<span class="ident">cfg</span>(<span class="ident">test</span>)]</span>
<span class="kw">use</span> <span class="ident">stdsimd_test</span>::<span class="ident">assert_instr</span>;
<span class="attribute">#[<span class="ident">allow</span>(<span class="ident">improper_ctypes</span>)]</span>
<span class="kw">extern</span> <span class="string">"C"</span> {
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsave64"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsave64</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xrstor64"</span>]</span>
<span class="kw">fn</span> <span class="ident">xrstor64</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsaveopt64"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsaveopt64</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsavec64"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsavec64</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xsaves64"</span>]</span>
<span class="kw">fn</span> <span class="ident">xsaves64</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
<span class="attribute">#[<span class="ident">link_name</span> <span class="op">=</span> <span class="string">"llvm.x86.xrstors64"</span>]</span>
<span class="kw">fn</span> <span class="ident">xrstors64</span>(<span class="ident">p</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">hi</span>: <span class="ident">u32</span>, <span class="ident">lo</span>: <span class="ident">u32</span>) <span class="op">-></span> ();
}
<span class="doccomment">/// Performs a full or partial save of the enabled processor states to memory at</span>
<span class="doccomment">/// `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// State is saved based on bits `[62:0]` in `save_mask` and XCR0.</span>
<span class="doccomment">/// `mem_addr` must be aligned on a 64-byte boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// The format of the XSAVE area is detailed in Section 13.4, “XSAVE Area,” of</span>
<span class="doccomment">/// Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsave64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsave64</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsave64</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsave64</span>(<span class="ident">mem_addr</span>, (<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="doccomment">/// Performs a full or partial restore of the enabled processor states using</span>
<span class="doccomment">/// the state information stored in memory at `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// State is restored based on bits `[62:0]` in `rs_mask`, `XCR0`, and</span>
<span class="doccomment">/// `mem_addr.HEADER.XSTATE_BV`. `mem_addr` must be aligned on a 64-byte</span>
<span class="doccomment">/// boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xrstor64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xrstor64</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xrstor64</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">rs_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xrstor64</span>(<span class="ident">mem_addr</span>, (<span class="ident">rs_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">rs_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="doccomment">/// Performs a full or partial save of the enabled processor states to memory at</span>
<span class="doccomment">/// `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// State is saved based on bits `[62:0]` in `save_mask` and `XCR0`.</span>
<span class="doccomment">/// `mem_addr` must be aligned on a 64-byte boundary. The hardware may optimize</span>
<span class="doccomment">/// the manner in which data is saved. The performance of this instruction will</span>
<span class="doccomment">/// be equal to or better than using the `XSAVE64` instruction.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsaveopt64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsaveopt"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsaveopt64</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsaveopt64</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsaveopt64</span>(<span class="ident">mem_addr</span>, (<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="doccomment">/// Performs a full or partial save of the enabled processor states to memory</span>
<span class="doccomment">/// at `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// `xsavec` differs from `xsave` in that it uses compaction and that it may</span>
<span class="doccomment">/// use init optimization. State is saved based on bits `[62:0]` in `save_mask`</span>
<span class="doccomment">/// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsavec64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsavec"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsavec64</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsavec64</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsavec64</span>(<span class="ident">mem_addr</span>, (<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="doccomment">/// Performs a full or partial save of the enabled processor states to memory at</span>
<span class="doccomment">/// `mem_addr`</span>
<span class="doccomment">///</span>
<span class="doccomment">/// `xsaves` differs from xsave in that it can save state components</span>
<span class="doccomment">/// corresponding to bits set in `IA32_XSS` `MSR` and that it may use the</span>
<span class="doccomment">/// modified optimization. State is saved based on bits `[62:0]` in `save_mask`</span>
<span class="doccomment">/// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xsaves64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsaves"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xsaves64</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xsaves64</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw-2">mut</span> <span class="ident">u8</span>, <span class="ident">save_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xsaves64</span>(<span class="ident">mem_addr</span>, (<span class="ident">save_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">save_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="doccomment">/// Performs a full or partial restore of the enabled processor states using the</span>
<span class="doccomment">/// state information stored in memory at `mem_addr`.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// `xrstors` differs from `xrstor` in that it can restore state components</span>
<span class="doccomment">/// corresponding to bits set in the `IA32_XSS` `MSR`; `xrstors` cannot restore</span>
<span class="doccomment">/// from an `xsave` area in which the extended region is in the standard form.</span>
<span class="doccomment">/// State is restored based on bits `[62:0]` in `rs_mask`, `XCR0`, and</span>
<span class="doccomment">/// `mem_addr.HEADER.XSTATE_BV`. `mem_addr` must be aligned on a 64-byte</span>
<span class="doccomment">/// boundary.</span>
<span class="doccomment">///</span>
<span class="doccomment">/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_xrstors64)</span>
<span class="attribute">#[<span class="ident">inline</span>]</span>
<span class="attribute">#[<span class="ident">target_feature</span>(<span class="ident">enable</span> <span class="op">=</span> <span class="string">"xsave,xsaves"</span>)]</span>
<span class="attribute">#[<span class="ident">cfg_attr</span>(<span class="ident">test</span>, <span class="ident">assert_instr</span>(<span class="ident">xrstors64</span>))]</span>
<span class="attribute">#[<span class="ident">stable</span>(<span class="ident">feature</span> <span class="op">=</span> <span class="string">"simd_x86"</span>, <span class="ident">since</span> <span class="op">=</span> <span class="string">"1.27.0"</span>)]</span>
<span class="kw">pub</span> <span class="kw">unsafe</span> <span class="kw">fn</span> <span class="ident">_xrstors64</span>(<span class="ident">mem_addr</span>: <span class="kw-2">*</span><span class="kw">const</span> <span class="ident">u8</span>, <span class="ident">rs_mask</span>: <span class="ident">u64</span>) {
<span class="ident">xrstors64</span>(<span class="ident">mem_addr</span>, (<span class="ident">rs_mask</span> <span class="op">>></span> <span class="number">32</span>) <span class="kw">as</span> <span class="ident">u32</span>, <span class="ident">rs_mask</span> <span class="kw">as</span> <span class="ident">u32</span>);
}
<span class="comment">// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209</span>
<span class="comment">// All these tests fail with Intel SDE.</span>
<span class="comment">/*
#[cfg(test)]
mod tests {
use crate::core_arch::x86::x86_64::xsave;
use stdsimd_test::simd_test;
use std::fmt;
// FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
#[repr(align(64))]
struct XsaveArea {
// max size for 256-bit registers is 800 bytes:
// see https://software.intel.com/en-us/node/682996
// max size for 512-bit registers is 2560 bytes:
// FIXME: add source
data: [u8; 2560],
}
impl XsaveArea {
fn new() -> XsaveArea {
XsaveArea { data: [0; 2560] }
}
fn ptr(&mut self) -> *mut u8 {
&mut self.data[0] as *mut _ as *mut u8
}
}
impl PartialEq<XsaveArea> for XsaveArea {
fn eq(&self, other: &XsaveArea) -> bool {
for i in 0..self.data.len() {
if self.data[i] != other.data[i] {
return false;
}
}
true
}
}
impl fmt::Debug for XsaveArea {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
write!(f, "[")?;
for i in 0..self.data.len() {
write!(f, "{}", self.data[i])?;
if i != self.data.len() - 1 {
write!(f, ", ")?;
}
}
write!(f, "]")
}
}
#[simd_test(enable = "xsave")]
unsafe fn xsave64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
let mut b = XsaveArea::new();
xsave::_xsave64(a.ptr(), m);
xsave::_xrstor64(a.ptr(), m);
xsave::_xsave64(b.ptr(), m);
assert_eq!(a, b);
}
#[simd_test(enable = "xsave,xsaveopt")]
unsafe fn xsaveopt64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
let mut b = XsaveArea::new();
xsave::_xsaveopt64(a.ptr(), m);
xsave::_xrstor64(a.ptr(), m);
xsave::_xsaveopt64(b.ptr(), m);
assert_eq!(a, b);
}
#[simd_test(enable = "xsave,xsavec")]
unsafe fn xsavec64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
let mut b = XsaveArea::new();
xsave::_xsavec64(a.ptr(), m);
xsave::_xrstor64(a.ptr(), m);
xsave::_xsavec64(b.ptr(), m);
assert_eq!(a, b);
}
#[simd_test(enable = "xsave,xsaves")]
unsafe fn xsaves64() {
let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
let mut a = XsaveArea::new();
let mut b = XsaveArea::new();
xsave::_xsaves64(a.ptr(), m);
xsave::_xrstors64(a.ptr(), m);
xsave::_xsaves64(b.ptr(), m);
assert_eq!(a, b);
}
}
*/</span>
</pre></div>
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