.TH "cudaDeviceProp" 3 "24 Apr 2019" "Version 6.0" "Doxygen" \" -*- nroff -*-
.ad l
.nh
.SH NAME
cudaDeviceProp \- 
.SH SYNOPSIS
.br
.PP
.SS "Data Fields"

.in +1c
.ti -1c
.RI "int \fBasyncEngineCount\fP"
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.ti -1c
.RI "int \fBcanMapHostMemory\fP"
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.ti -1c
.RI "int \fBcanUseHostPointerForRegisteredMem\fP"
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.ti -1c
.RI "int \fBclockRate\fP"
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.ti -1c
.RI "int \fBcomputeMode\fP"
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.ti -1c
.RI "int \fBcomputePreemptionSupported\fP"
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.ti -1c
.RI "int \fBconcurrentKernels\fP"
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.ti -1c
.RI "int \fBconcurrentManagedAccess\fP"
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.ti -1c
.RI "int \fBcooperativeLaunch\fP"
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.ti -1c
.RI "int \fBcooperativeMultiDeviceLaunch\fP"
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.ti -1c
.RI "int \fBdeviceOverlap\fP"
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.ti -1c
.RI "int \fBdirectManagedMemAccessFromHost\fP"
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.ti -1c
.RI "int \fBECCEnabled\fP"
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.ti -1c
.RI "int \fBglobalL1CacheSupported\fP"
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.ti -1c
.RI "int \fBhostNativeAtomicSupported\fP"
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.ti -1c
.RI "int \fBintegrated\fP"
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.ti -1c
.RI "int \fBisMultiGpuBoard\fP"
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.ti -1c
.RI "int \fBkernelExecTimeoutEnabled\fP"
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.ti -1c
.RI "int \fBl2CacheSize\fP"
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.ti -1c
.RI "int \fBlocalL1CacheSupported\fP"
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.ti -1c
.RI "char \fBluid\fP [8]"
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.ti -1c
.RI "unsigned int \fBluidDeviceNodeMask\fP"
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.ti -1c
.RI "int \fBmanagedMemory\fP"
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.ti -1c
.RI "int \fBmaxGridSize\fP [3]"
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.ti -1c
.RI "int \fBmaxSurface1D\fP"
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.ti -1c
.RI "int \fBmaxSurface1DLayered\fP [2]"
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.ti -1c
.RI "int \fBmaxSurface2D\fP [2]"
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.RI "int \fBmaxSurface2DLayered\fP [3]"
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.RI "int \fBmaxSurface3D\fP [3]"
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.ti -1c
.RI "int \fBmaxSurfaceCubemap\fP"
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.ti -1c
.RI "int \fBmaxSurfaceCubemapLayered\fP [2]"
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.ti -1c
.RI "int \fBmaxTexture1D\fP"
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.ti -1c
.RI "int \fBmaxTexture1DLayered\fP [2]"
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.ti -1c
.RI "int \fBmaxTexture1DLinear\fP"
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.ti -1c
.RI "int \fBmaxTexture1DMipmap\fP"
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.ti -1c
.RI "int \fBmaxTexture2D\fP [2]"
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.ti -1c
.RI "int \fBmaxTexture2DGather\fP [2]"
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.ti -1c
.RI "int \fBmaxTexture2DLayered\fP [3]"
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.ti -1c
.RI "int \fBmaxTexture2DLinear\fP [3]"
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.RI "int \fBmaxTexture2DMipmap\fP [2]"
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.ti -1c
.RI "int \fBmaxTexture3D\fP [3]"
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.ti -1c
.RI "int \fBmaxTexture3DAlt\fP [3]"
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.ti -1c
.RI "int \fBmaxTextureCubemap\fP"
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.ti -1c
.RI "int \fBmaxTextureCubemapLayered\fP [2]"
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.ti -1c
.RI "int \fBmaxThreadsDim\fP [3]"
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.ti -1c
.RI "int \fBmaxThreadsPerBlock\fP"
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.ti -1c
.RI "int \fBmaxThreadsPerMultiProcessor\fP"
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.ti -1c
.RI "int \fBmemoryBusWidth\fP"
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.ti -1c
.RI "int \fBmemoryClockRate\fP"
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.ti -1c
.RI "size_t \fBmemPitch\fP"
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.ti -1c
.RI "int \fBmultiGpuBoardGroupID\fP"
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.RI "int \fBmultiProcessorCount\fP"
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.RI "int \fBpageableMemoryAccess\fP"
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.RI "int \fBpageableMemoryAccessUsesHostPageTables\fP"
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.RI "int \fBpciBusID\fP"
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.RI "int \fBpciDeviceID\fP"
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.RI "int \fBpciDomainID\fP"
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.RI "int \fBregsPerBlock\fP"
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.ti -1c
.RI "int \fBregsPerMultiprocessor\fP"
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.RI "size_t \fBsharedMemPerBlock\fP"
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.ti -1c
.RI "size_t \fBsharedMemPerBlockOptin\fP"
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.ti -1c
.RI "size_t \fBsharedMemPerMultiprocessor\fP"
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.RI "int \fBsingleToDoublePrecisionPerfRatio\fP"
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.ti -1c
.RI "int \fBstreamPrioritiesSupported\fP"
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.RI "size_t \fBsurfaceAlignment\fP"
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.RI "int \fBtccDriver\fP"
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.RI "size_t \fBtextureAlignment\fP"
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.RI "size_t \fBtexturePitchAlignment\fP"
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.ti -1c
.RI "size_t \fBtotalConstMem\fP"
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.ti -1c
.RI "size_t \fBtotalGlobalMem\fP"
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.ti -1c
.RI "int \fBunifiedAddressing\fP"
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.ti -1c
.RI "cudaUUID_t \fBuuid\fP"
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.ti -1c
.RI "int \fBwarpSize\fP"
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.in -1c
.SH "Detailed Description"
.PP 
CUDA device properties 
.SH "Field Documentation"
.PP 
.SS "int \fBcudaDeviceProp::asyncEngineCount\fP"
.PP
Number of asynchronous engines 
.SS "int \fBcudaDeviceProp::canMapHostMemory\fP"
.PP
Device can map host memory with cudaHostAlloc/cudaHostGetDevicePointer 
.SS "int \fBcudaDeviceProp::canUseHostPointerForRegisteredMem\fP"
.PP
Device can access host registered memory at the same virtual address as the CPU 
.SS "int \fBcudaDeviceProp::clockRate\fP"
.PP
Clock frequency in kilohertz 
.SS "int \fBcudaDeviceProp::computeMode\fP"
.PP
Compute mode (See \fBcudaComputeMode\fP) 
.SS "int \fBcudaDeviceProp::computePreemptionSupported\fP"
.PP
Device supports Compute Preemption 
.SS "int \fBcudaDeviceProp::concurrentKernels\fP"
.PP
Device can possibly execute multiple kernels concurrently 
.SS "int \fBcudaDeviceProp::concurrentManagedAccess\fP"
.PP
Device can coherently access managed memory concurrently with the CPU 
.SS "int \fBcudaDeviceProp::cooperativeLaunch\fP"
.PP
Device supports launching cooperative kernels via \fBcudaLaunchCooperativeKernel\fP 
.SS "int \fBcudaDeviceProp::cooperativeMultiDeviceLaunch\fP"
.PP
Device can participate in cooperative kernels launched via \fBcudaLaunchCooperativeKernelMultiDevice\fP 
.SS "int \fBcudaDeviceProp::deviceOverlap\fP"
.PP
Device can concurrently copy memory and execute a kernel. Deprecated. Use instead asyncEngineCount. 
.SS "int \fBcudaDeviceProp::directManagedMemAccessFromHost\fP"
.PP
Host can directly access managed memory on the device without migration. 
.SS "int \fBcudaDeviceProp::ECCEnabled\fP"
.PP
Device has ECC support enabled 
.SS "int \fBcudaDeviceProp::globalL1CacheSupported\fP"
.PP
Device supports caching globals in L1 
.SS "int \fBcudaDeviceProp::hostNativeAtomicSupported\fP"
.PP
Link between the device and the host supports native atomic operations 
.SS "int \fBcudaDeviceProp::integrated\fP"
.PP
Device is integrated as opposed to discrete 
.SS "int \fBcudaDeviceProp::isMultiGpuBoard\fP"
.PP
Device is on a multi-GPU board 
.SS "int \fBcudaDeviceProp::kernelExecTimeoutEnabled\fP"
.PP
Specified whether there is a run time limit on kernels 
.SS "int \fBcudaDeviceProp::l2CacheSize\fP"
.PP
Size of L2 cache in bytes 
.SS "int \fBcudaDeviceProp::localL1CacheSupported\fP"
.PP
Device supports caching locals in L1 
.SS "char \fBcudaDeviceProp::luid\fP[8]"
.PP
8-byte locally unique identifier. Value is undefined on TCC and non-Windows platforms 
.SS "unsigned int \fBcudaDeviceProp::luidDeviceNodeMask\fP"
.PP
LUID device node mask. Value is undefined on TCC and non-Windows platforms 
.SS "int \fBcudaDeviceProp::managedMemory\fP"
.PP
Device supports allocating managed memory on this system 
.SS "int \fBcudaDeviceProp::maxGridSize\fP[3]"
.PP
Maximum size of each dimension of a grid 
.SS "int \fBcudaDeviceProp::maxSurface1D\fP"
.PP
Maximum 1D surface size 
.SS "int \fBcudaDeviceProp::maxSurface1DLayered\fP[2]"
.PP
Maximum 1D layered surface dimensions 
.SS "int \fBcudaDeviceProp::maxSurface2D\fP[2]"
.PP
Maximum 2D surface dimensions 
.SS "int \fBcudaDeviceProp::maxSurface2DLayered\fP[3]"
.PP
Maximum 2D layered surface dimensions 
.SS "int \fBcudaDeviceProp::maxSurface3D\fP[3]"
.PP
Maximum 3D surface dimensions 
.SS "int \fBcudaDeviceProp::maxSurfaceCubemap\fP"
.PP
Maximum Cubemap surface dimensions 
.SS "int \fBcudaDeviceProp::maxSurfaceCubemapLayered\fP[2]"
.PP
Maximum Cubemap layered surface dimensions 
.SS "int \fBcudaDeviceProp::maxTexture1D\fP"
.PP
Maximum 1D texture size 
.SS "int \fBcudaDeviceProp::maxTexture1DLayered\fP[2]"
.PP
Maximum 1D layered texture dimensions 
.SS "int \fBcudaDeviceProp::maxTexture1DLinear\fP"
.PP
Maximum size for 1D textures bound to linear memory 
.SS "int \fBcudaDeviceProp::maxTexture1DMipmap\fP"
.PP
Maximum 1D mipmapped texture size 
.SS "int \fBcudaDeviceProp::maxTexture2D\fP[2]"
.PP
Maximum 2D texture dimensions 
.SS "int \fBcudaDeviceProp::maxTexture2DGather\fP[2]"
.PP
Maximum 2D texture dimensions if texture gather operations have to be performed 
.SS "int \fBcudaDeviceProp::maxTexture2DLayered\fP[3]"
.PP
Maximum 2D layered texture dimensions 
.SS "int \fBcudaDeviceProp::maxTexture2DLinear\fP[3]"
.PP
Maximum dimensions (width, height, pitch) for 2D textures bound to pitched memory 
.SS "int \fBcudaDeviceProp::maxTexture2DMipmap\fP[2]"
.PP
Maximum 2D mipmapped texture dimensions 
.SS "int \fBcudaDeviceProp::maxTexture3D\fP[3]"
.PP
Maximum 3D texture dimensions 
.SS "int \fBcudaDeviceProp::maxTexture3DAlt\fP[3]"
.PP
Maximum alternate 3D texture dimensions 
.SS "int \fBcudaDeviceProp::maxTextureCubemap\fP"
.PP
Maximum Cubemap texture dimensions 
.SS "int \fBcudaDeviceProp::maxTextureCubemapLayered\fP[2]"
.PP
Maximum Cubemap layered texture dimensions 
.SS "int \fBcudaDeviceProp::maxThreadsDim\fP[3]"
.PP
Maximum size of each dimension of a block 
.SS "int \fBcudaDeviceProp::maxThreadsPerBlock\fP"
.PP
Maximum number of threads per block 
.SS "int \fBcudaDeviceProp::maxThreadsPerMultiProcessor\fP"
.PP
Maximum resident threads per multiprocessor 
.SS "int \fBcudaDeviceProp::memoryBusWidth\fP"
.PP
Global memory bus width in bits 
.SS "int \fBcudaDeviceProp::memoryClockRate\fP"
.PP
Peak memory clock frequency in kilohertz 
.SS "size_t \fBcudaDeviceProp::memPitch\fP"
.PP
Maximum pitch in bytes allowed by memory copies 
.SS "int \fBcudaDeviceProp::multiGpuBoardGroupID\fP"
.PP
Unique identifier for a group of devices on the same multi-GPU board 
.SS "int \fBcudaDeviceProp::multiProcessorCount\fP"
.PP
Number of multiprocessors on device 
.SS "int \fBcudaDeviceProp::pageableMemoryAccess\fP"
.PP
Device supports coherently accessing pageable memory without calling cudaHostRegister on it 
.SS "int \fBcudaDeviceProp::pageableMemoryAccessUsesHostPageTables\fP"
.PP
Device accesses pageable memory via the host's page tables 
.SS "int \fBcudaDeviceProp::pciBusID\fP"
.PP
PCI bus ID of the device 
.SS "int \fBcudaDeviceProp::pciDeviceID\fP"
.PP
PCI device ID of the device 
.SS "int \fBcudaDeviceProp::pciDomainID\fP"
.PP
PCI domain ID of the device 
.SS "int \fBcudaDeviceProp::regsPerBlock\fP"
.PP
32-bit registers available per block 
.SS "int \fBcudaDeviceProp::regsPerMultiprocessor\fP"
.PP
32-bit registers available per multiprocessor 
.SS "size_t \fBcudaDeviceProp::sharedMemPerBlock\fP"
.PP
Shared memory available per block in bytes 
.SS "size_t \fBcudaDeviceProp::sharedMemPerBlockOptin\fP"
.PP
Per device maximum shared memory per block usable by special opt in 
.SS "size_t \fBcudaDeviceProp::sharedMemPerMultiprocessor\fP"
.PP
Shared memory available per multiprocessor in bytes 
.SS "int \fBcudaDeviceProp::singleToDoublePrecisionPerfRatio\fP"
.PP
Ratio of single precision performance (in floating-point operations per second) to double precision performance 
.SS "int \fBcudaDeviceProp::streamPrioritiesSupported\fP"
.PP
Device supports stream priorities 
.SS "size_t \fBcudaDeviceProp::surfaceAlignment\fP"
.PP
Alignment requirements for surfaces 
.SS "int \fBcudaDeviceProp::tccDriver\fP"
.PP
1 if device is a Tesla device using TCC driver, 0 otherwise 
.SS "size_t \fBcudaDeviceProp::textureAlignment\fP"
.PP
Alignment requirement for textures 
.SS "size_t \fBcudaDeviceProp::texturePitchAlignment\fP"
.PP
Pitch alignment requirement for texture references bound to pitched memory 
.SS "size_t \fBcudaDeviceProp::totalConstMem\fP"
.PP
Constant memory available on device in bytes 
.SS "size_t \fBcudaDeviceProp::totalGlobalMem\fP"
.PP
Global memory available on device in bytes 
.SS "int \fBcudaDeviceProp::unifiedAddressing\fP"
.PP
Device shares a unified address space with the host 
.SS "cudaUUID_t \fBcudaDeviceProp::uuid\fP"
.PP
16-byte unique identifier 
.SS "int \fBcudaDeviceProp::warpSize\fP"
.PP
Warp size in threads 

.SH "Author"
.PP 
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